#include <linux/slab.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/uaccess.h>
#include <asm/smp.h>
#include <asm/time.h>
#include <asm/ps3.h>
#include <asm/lv1call.h>
#include <asm/cell-pmu.h>
Go to the source code of this file.
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| void | ps3_set_bookmark (u64 bookmark) |
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| | EXPORT_SYMBOL_GPL (ps3_set_bookmark) |
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| void | ps3_set_pm_bookmark (u64 tag, u64 incident, u64 th_id) |
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| | EXPORT_SYMBOL_GPL (ps3_set_pm_bookmark) |
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| u32 | ps3_read_phys_ctr (u32 cpu, u32 phys_ctr) |
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| | EXPORT_SYMBOL_GPL (ps3_read_phys_ctr) |
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| void | ps3_write_phys_ctr (u32 cpu, u32 phys_ctr, u32 val) |
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| | EXPORT_SYMBOL_GPL (ps3_write_phys_ctr) |
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| u32 | ps3_read_ctr (u32 cpu, u32 ctr) |
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| | EXPORT_SYMBOL_GPL (ps3_read_ctr) |
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| void | ps3_write_ctr (u32 cpu, u32 ctr, u32 val) |
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| | EXPORT_SYMBOL_GPL (ps3_write_ctr) |
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| u32 | ps3_read_pm07_control (u32 cpu, u32 ctr) |
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| | EXPORT_SYMBOL_GPL (ps3_read_pm07_control) |
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| void | ps3_write_pm07_control (u32 cpu, u32 ctr, u32 val) |
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| | EXPORT_SYMBOL_GPL (ps3_write_pm07_control) |
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| u32 | ps3_read_pm (u32 cpu, enum pm_reg_name reg) |
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| | EXPORT_SYMBOL_GPL (ps3_read_pm) |
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| void | ps3_write_pm (u32 cpu, enum pm_reg_name reg, u32 val) |
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| | EXPORT_SYMBOL_GPL (ps3_write_pm) |
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| u32 | ps3_get_ctr_size (u32 cpu, u32 phys_ctr) |
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| | EXPORT_SYMBOL_GPL (ps3_get_ctr_size) |
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| void | ps3_set_ctr_size (u32 cpu, u32 phys_ctr, u32 ctr_size) |
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| | EXPORT_SYMBOL_GPL (ps3_set_ctr_size) |
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| int | ps3_set_signal (u64 signal_group, u8 signal_bit, u16 sub_unit, u8 bus_word) |
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| | EXPORT_SYMBOL_GPL (ps3_set_signal) |
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| u32 | ps3_get_hw_thread_id (int cpu) |
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| | EXPORT_SYMBOL_GPL (ps3_get_hw_thread_id) |
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| void | ps3_enable_pm (u32 cpu) |
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| | EXPORT_SYMBOL_GPL (ps3_enable_pm) |
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| void | ps3_disable_pm (u32 cpu) |
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| | EXPORT_SYMBOL_GPL (ps3_disable_pm) |
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| int | ps3_lpm_copy_tb (unsigned long offset, void *buf, unsigned long count, unsigned long *bytes_copied) |
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| | EXPORT_SYMBOL_GPL (ps3_lpm_copy_tb) |
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| int | ps3_lpm_copy_tb_to_user (unsigned long offset, void __user *buf, unsigned long count, unsigned long *bytes_copied) |
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| | EXPORT_SYMBOL_GPL (ps3_lpm_copy_tb_to_user) |
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| u32 | ps3_get_and_clear_pm_interrupts (u32 cpu) |
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| | EXPORT_SYMBOL_GPL (ps3_get_and_clear_pm_interrupts) |
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| void | ps3_enable_pm_interrupts (u32 cpu, u32 thread, u32 mask) |
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| | EXPORT_SYMBOL_GPL (ps3_enable_pm_interrupts) |
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| void | ps3_disable_pm_interrupts (u32 cpu) |
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| | EXPORT_SYMBOL_GPL (ps3_disable_pm_interrupts) |
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| int | ps3_lpm_open (enum ps3_lpm_tb_type tb_type, void *tb_cache, u64 tb_cache_size) |
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| | EXPORT_SYMBOL_GPL (ps3_lpm_open) |
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| int | ps3_lpm_close (void) |
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| | EXPORT_SYMBOL_GPL (ps3_lpm_close) |
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| | module_init (ps3_lpm_init) |
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| | module_exit (ps3_lpm_exit) |
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| | MODULE_LICENSE ("GPL v2") |
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| | MODULE_DESCRIPTION ("PS3 Logical Performance Monitor Driver") |
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| | MODULE_AUTHOR ("Sony Corporation") |
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| | MODULE_ALIAS (PS3_MODULE_ALIAS_LPM) |
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| #define PM_ISLAND2_BASE_SIGNAL_GROUP_NUMBER 0 |
| #define PM_ISLAND2_SIGNAL_GROUP_NUMBER1 6 |
| #define PM_ISLAND2_SIGNAL_GROUP_NUMBER2 7 |
| #define PM_ISLAND3_BASE_SIGNAL_GROUP_NUMBER 7 |
| #define PM_ISLAND4_BASE_SIGNAL_GROUP_NUMBER 15 |
| #define PM_ISLAND5_BASE_SIGNAL_GROUP_NUMBER 18 |
| #define PM_ISLAND6_BASE_SIGNAL_GROUP_NUMBER 24 |
| #define PM_ISLAND7_BASE_SIGNAL_GROUP_NUMBER 49 |
| #define PM_ISLAND8_BASE_SIGNAL_GROUP_NUMBER 52 |
| #define PM_SIG_GROUP_MFC_MAX 60 |
| #define PM_SIG_GROUP_SPU 41 |
| #define PM_SIG_GROUP_SPU_EVENT 43 |
| #define PM_SIG_GROUP_SPU_TRIGGER 42 |
| #define PM_SPU_EVENT_SIGNAL_GROUP_NUMBER 18 |
| #define PM_SPU_TRIGGER_SIGNAL_GROUP_NUMBER 17 |
| #define PS3_LPM_SHADOW_REG_INIT 0xFFFFFFFF00000000ULL |
| #define PS3_PM_BOOKMARK_START 0x8000000000000000ULL |
| #define PS3_PM_BOOKMARK_STOP 0x4000000000000000ULL |
| #define PS3_PM_BOOKMARK_TAG_KERNEL 0x1000000000000000ULL |
| #define PS3_PM_BOOKMARK_TAG_MASK_HI 0xF000000000000000ULL |
| #define PS3_PM_BOOKMARK_TAG_MASK_LO 0x0F00000000000000ULL |
| #define PS3_PM_BOOKMARK_TAG_USER 0x3000000000000000ULL |
| #define PS3_PM_CONTROL_PPU_COUNT_MODE_MASK 0x000C0000 |
| #define PS3_PM_CONTROL_PPU_COUNT_MODE_PROBLEM 0x00080000 |
| #define PS3_PM_CONTROL_PPU_TH0_BOOKMARK 0x00001000 |
| #define PS3_PM_CONTROL_PPU_TH1_BOOKMARK 0x00000800 |
| #define PS3_PM_COUNTER_MASK_HI 0xFFFFFFFF00000000ULL |
| #define PS3_PM_COUNTER_MASK_LO 0x00000000FFFFFFFFULL |
| #define PS3_PM_START_STOP_PPU_TH0_BOOKMARK_START 0x02000000 |
| #define PS3_PM_START_STOP_PPU_TH0_BOOKMARK_STOP 0x00020000 |
| #define PS3_PM_START_STOP_PPU_TH1_BOOKMARK_START 0x01000000 |
| #define PS3_PM_START_STOP_PPU_TH1_BOOKMARK_STOP 0x00010000 |
| #define PS3_PM_START_STOP_START_MASK 0xFF000000 |
| #define PS3_PM_START_STOP_STOP_MASK 0x00FF0000 |
| #define PS3_WRITE_PM_MASK 0xFFFFFFFFFFFFFFFFULL |
- Enumerator:
| PS3_LPM_DEFAULT_TB_CACHE_SIZE |
|
Definition at line 144 of file ps3-lpm.c.
use_start_stop_bookmark - Enable the PPU bookmark trace.
And it enables PPU bookmark triggers ONLY if the other triggers are not set. The start/stop bookmarks are inserted at ps3_enable_pm() and ps3_disable_pm() to start/stop LPM.
Used to get good quality of the performance counter.
- Enumerator:
-
Definition at line 174 of file ps3-lpm.c.
| MODULE_AUTHOR |
( |
"Sony Corporation" |
| ) |
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| MODULE_DESCRIPTION |
( |
"PS3 Logical Performance Monitor Driver" |
| ) |
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| module_exit |
( |
ps3_lpm_exit |
| ) |
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| module_init |
( |
ps3_lpm_init |
| ) |
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| MODULE_LICENSE |
( |
"GPL v2" |
| ) |
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ps3_disable_pm - Disable the entire performance monitoring unit.
Definition at line 894 of file ps3-lpm.c.
| void ps3_disable_pm_interrupts |
( |
u32 |
cpu | ) |
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ps3_enable_pm_interrupts -
Disabling interrupts for the entire performance monitoring unit.
Definition at line 1068 of file ps3-lpm.c.
ps3_enable_pm - Enable the entire performance monitoring unit.
When we enable the LPM, all pending writes to counters get committed.
Definition at line 850 of file ps3-lpm.c.
ps3_enable_pm_interrupts -
Enabling interrupts for the entire performance monitoring unit. Enables the interrupt bits in the pm_status register.
Definition at line 1055 of file ps3-lpm.c.
| u32 ps3_get_and_clear_pm_interrupts |
( |
u32 |
cpu | ) |
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ps3_get_and_clear_pm_interrupts -
Clearing interrupts for the entire performance monitoring unit. Reading pm_status clears the interrupt bits.
Definition at line 1042 of file ps3-lpm.c.
| u32 ps3_get_ctr_size |
( |
u32 |
cpu, |
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u32 |
phys_ctr |
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) |
| |
ps3_get_ctr_size - Get the size of a physical counter.
Returns either 16 or 32.
Definition at line 521 of file ps3-lpm.c.
| u32 ps3_get_hw_thread_id |
( |
int |
cpu | ) |
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ps3_lpm_close - Close the lpm device.
Definition at line 1173 of file ps3-lpm.c.
| int ps3_lpm_copy_tb |
( |
unsigned long |
offset, |
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|
void * |
buf, |
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unsigned long |
count, |
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unsigned long * |
bytes_copied |
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) |
| |
ps3_lpm_copy_tb - Copy data from the trace buffer to a kernel buffer. : Offset in bytes from the start of the trace buffer. : Copy destination. : Maximum count of bytes to copy. : Pointer to a variable that will receive the number of bytes copied to .
On error will contain any successfully copied trace buffer data and bytes_copied will be set to the number of bytes successfully copied.
Definition at line 929 of file ps3-lpm.c.
ps3_lpm_copy_tb_to_user - Copy data from the trace buffer to a user buffer. : Offset in bytes from the start of the trace buffer. : A __user copy destination. : Maximum count of bytes to copy. : Pointer to a variable that will receive the number of bytes copied to .
On error will contain any successfully copied trace buffer data and bytes_copied will be set to the number of bytes successfully copied.
Definition at line 984 of file ps3-lpm.c.
ps3_lpm_open - Open the logical performance monitor device. : Specifies the type of trace buffer lv1 should use for this lpm instance, specified by one of enum ps3_lpm_tb_type. : Optional user supplied buffer to use as the trace buffer cache. If NULL, the driver will allocate and manage an internal buffer. Unused when when is PS3_LPM_TB_TYPE_NONE. : The size in bytes of the user supplied buffer. Unused when is NULL or is PS3_LPM_TB_TYPE_NONE.
Definition at line 1086 of file ps3-lpm.c.
ps3_read_ctr - Read counter.
Read 16 or 32 bits depending on the current size of the counter. Counters 4, 5, 6 & 7 are always 16 bit.
Definition at line 315 of file ps3-lpm.c.
| u32 ps3_read_phys_ctr |
( |
u32 |
cpu, |
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u32 |
phys_ctr |
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) |
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ps3_read_phys_ctr - Read physical counter registers.
Each physical counter can act as one 32 bit counter or as two 16 bit counters.
Definition at line 210 of file ps3-lpm.c.
ps3_read_pm - Read Other LPM control registers.
Definition at line 399 of file ps3-lpm.c.
| u32 ps3_read_pm07_control |
( |
u32 |
cpu, |
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u32 |
ctr |
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) |
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ps3_read_pm07_control - Read counter control registers.
Each logical counter has a corresponding control register.
Definition at line 362 of file ps3-lpm.c.
| void ps3_set_bookmark |
( |
u64 |
bookmark | ) |
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ps3_set_ctr_size - Set the size of a physical counter to 16 or 32 bits.
Definition at line 540 of file ps3-lpm.c.
| int ps3_set_signal |
( |
u64 |
signal_group, |
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u8 |
signal_bit, |
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u16 |
sub_unit, |
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u8 |
bus_word |
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) |
| |
ps3_write_ctr - Write counter.
Write 16 or 32 bits depending on the current size of the counter. Counters 4, 5, 6 & 7 are always 16 bit.
Definition at line 336 of file ps3-lpm.c.
ps3_write_phys_ctr - Write physical counter registers.
Each physical counter can act as one 32 bit counter or as two 16 bit counters.
Definition at line 254 of file ps3-lpm.c.
ps3_write_pm - Write Other LPM control registers.
Definition at line 451 of file ps3-lpm.c.
ps3_write_pm07_control - Write counter control registers.
Each logical counter has a corresponding control register.
Definition at line 374 of file ps3-lpm.c.
1.8.2