Linux Kernel
3.7.1
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#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/firmware.h>
#include "qib.h"
#include "qib_7220.h"
Go to the source code of this file.
Data Structures | |
struct | dds_init |
struct | rxeq_init |
Macros | |
#define | SD7220_FW_NAME "qlogic/sd7220.fw" |
#define | KREG_IDX(regname) (QIB_7220_##regname##_OFFS / sizeof(u64)) |
#define | kr_hwerrclear KREG_IDX(HwErrClear) |
#define | kr_hwerrmask KREG_IDX(HwErrMask) |
#define | kr_hwerrstatus KREG_IDX(HwErrStatus) |
#define | kr_ibcstatus KREG_IDX(IBCStatus) |
#define | kr_ibserdesctrl KREG_IDX(IBSerDesCtrl) |
#define | kr_scratch KREG_IDX(Scratch) |
#define | kr_xgxs_cfg KREG_IDX(XGXSCfg) |
#define | kr_ibsd_epb_access_ctrl KREG_IDX(ibsd_epb_access_ctrl) |
#define | kr_ibsd_epb_transaction_reg KREG_IDX(ibsd_epb_transaction_reg) |
#define | kr_pciesd_epb_transaction_reg KREG_IDX(pciesd_epb_transaction_reg) |
#define | kr_pciesd_epb_access_ctrl KREG_IDX(pciesd_epb_access_ctrl) |
#define | kr_serdes_ddsrxeq0 KREG_IDX(SerDes_DDSRXEQ0) |
#define | kr_serdes_maptable KREG_IDX(IBSerDesMappTable) |
#define | PCIE_SERDES0 0 |
#define | PCIE_SERDES1 1 |
#define | EPB_ADDR_SHF 8 |
#define | EPB_LOC(chn, elt, reg) |
#define | EPB_IB_QUAD0_CS_SHF (25) |
#define | EPB_IB_QUAD0_CS (1U << EPB_IB_QUAD0_CS_SHF) |
#define | EPB_IB_UC_CS_SHF (26) |
#define | EPB_PCIE_UC_CS_SHF (27) |
#define | EPB_GLOBAL_WR (1U << (EPB_ADDR_SHF + 8)) |
#define | QLOGIC_IB_HWE_IB_UC_MEMORYPARITYERR 0x0000004000000000ULL |
#define | IB_MPREG5 (EPB_LOC(6, 0, 0xE) | (1L << EPB_IB_UC_CS_SHF)) |
#define | IB_MPREG6 (EPB_LOC(6, 0, 0xF) | (1U << EPB_IB_UC_CS_SHF)) |
#define | UC_PAR_CLR_D 8 |
#define | UC_PAR_CLR_M 0xC |
#define | IB_CTRL2(chn) (EPB_LOC(chn, 7, 3) | EPB_IB_QUAD0_CS) |
#define | START_EQ1(chan) EPB_LOC(chan, 7, 0x27) |
#define | IBSD_RESYNC_TRIES 3 |
#define | IB_PGUDP(chn) (EPB_LOC((chn), 2, 1) | EPB_IB_QUAD0_CS) |
#define | IB_CMUDONE(chn) (EPB_LOC((chn), 7, 0xF) | EPB_IB_QUAD0_CS) |
#define | EPB_ACC_REQ 1 |
#define | EPB_ACC_GNT 0x100 |
#define | EPB_DATA_MASK 0xFF |
#define | EPB_RD (1ULL << 24) |
#define | EPB_TRANS_RDY (1ULL << 31) |
#define | EPB_TRANS_ERR (1ULL << 30) |
#define | EPB_TRANS_TRIES 5 |
#define | EPB_ROM_R (2) |
#define | EPB_ROM_W (1) |
#define | EPB_UC_CTL EPB_LOC(6, 0, 0) |
#define | EPB_MADDRL EPB_LOC(6, 0, 2) |
#define | EPB_MADDRH EPB_LOC(6, 0, 3) |
#define | EPB_ROMDATA EPB_LOC(6, 0, 4) |
#define | EPB_RAMDATA EPB_LOC(6, 0, 5) |
#define | PROG_CHUNK 64 |
#define | VFY_CHUNK 64 |
#define | SD_PRAM_ERROR_LIMIT 42 |
#define | IB_SERDES_TRIM_DONE (1ULL << 11) |
#define | TRIM_TMO (30) |
#define | TX_FAST_ELT (9) |
#define | NUM_DDS_REGS 6 |
#define | DDS_REG_MAP 0x76A910 /* LSB-first list of regs (in elt 9) to mod */ |
#define | DDS_VAL(amp_d, main_d, ipst_d, ipre_d, amp_s, main_s, ipst_s, ipre_s) |
#define | DDS_3M 0 |
#define | DDS_1M 13 |
#define | RXEQ_INIT_RDESC(elt, addr) (((elt) & 0xF) | ((addr) << 4)) |
#define | RXEQ_VAL(elt, adr, val0, val1, val2, val3) {RXEQ_INIT_RDESC((elt), (adr)), {(val0), (val1), (val2), (val3)} } |
#define | RXEQ_VAL_ALL(elt, adr, val) {RXEQ_INIT_RDESC((elt), (adr)), {(val), (val), (val), (val)} } |
#define | RXEQ_SDR_DFELTH 0 |
#define | RXEQ_SDR_TLTH 0 |
#define | RXEQ_SDR_G1CNT_Z1CNT 0x11 |
#define | RXEQ_SDR_ZCNT 23 |
#define | DDS_ROWS (16) |
#define | RXEQ_ROWS ARRAY_SIZE(rxeq_init_vals) |
#define | CMUCTRL5 EPB_LOC(7, 0, 0x15) |
#define | RXHSCTRL0(chan) EPB_LOC(chan, 6, 0) |
#define | VCDL_DAC2(chan) EPB_LOC(chan, 6, 5) |
#define | VCDL_CTRL0(chan) EPB_LOC(chan, 6, 6) |
#define | VCDL_CTRL2(chan) EPB_LOC(chan, 6, 8) |
#define | START_EQ2(chan) EPB_LOC(chan, 7, 0x28) |
#define | BACTRL(chnl) EPB_LOC(chnl, 6, 0x0E) |
#define | LDOUTCTRL1(chnl) EPB_LOC(chnl, 7, 6) |
#define | RXHSSTATUS(chnl) EPB_LOC(chnl, 6, 0xF) |
#define | RELOCK_FIRST_MS 3 |
#define | RXLSPPM(chan) EPB_LOC(chan, 0, 2) |
Functions | |
MODULE_FIRMWARE (SD7220_FW_NAME) | |
void | qib_sd7220_clr_ibpar (struct qib_devdata *dd) |
int | qib_sd7220_init (struct qib_devdata *dd) |
module_param_named (rxeq_default_set, qib_rxeq_set, uint, S_IWUSR|S_IRUGO) | |
MODULE_PARM_DESC (rxeq_default_set,"Which set [0..3] of Rx Equalization values is default") | |
int | qib_sd7220_presets (struct qib_devdata *dd) |
void | toggle_7220_rclkrls (struct qib_devdata *dd) |
void | shutdown_7220_relock_poll (struct qib_devdata *dd) |
module_param_named (relock_by_timer, qib_relock_by_timer, uint, S_IWUSR|S_IRUGO) | |
MODULE_PARM_DESC (relock_by_timer,"Allow relock attempt if link not up") | |
void | set_7220_relock_poll (struct qib_devdata *dd, int ibup) |
#define BACTRL | ( | chnl | ) | EPB_LOC(chnl, 6, 0x0E) |
Definition at line 1303 of file qib_sd7220.c.
#define CMUCTRL5 EPB_LOC(7, 0, 0x15) |
Definition at line 1111 of file qib_sd7220.c.
#define DDS_1M 13 |
#define DDS_3M 0 |
#define DDS_REG_MAP 0x76A910 /* LSB-first list of regs (in elt 9) to mod */ |
Definition at line 962 of file qib_sd7220.c.
#define DDS_ROWS (16) |
Definition at line 1037 of file qib_sd7220.c.
#define DDS_VAL | ( | amp_d, | |
main_d, | |||
ipst_d, | |||
ipre_d, | |||
amp_s, | |||
main_s, | |||
ipst_s, | |||
ipre_s | |||
) |
Definition at line 964 of file qib_sd7220.c.
#define EPB_ACC_GNT 0x100 |
Definition at line 538 of file qib_sd7220.c.
#define EPB_ACC_REQ 1 |
Definition at line 537 of file qib_sd7220.c.
#define EPB_ADDR_SHF 8 |
Definition at line 87 of file qib_sd7220.c.
#define EPB_DATA_MASK 0xFF |
Definition at line 539 of file qib_sd7220.c.
#define EPB_GLOBAL_WR (1U << (EPB_ADDR_SHF + 8)) |
Definition at line 95 of file qib_sd7220.c.
#define EPB_IB_QUAD0_CS (1U << EPB_IB_QUAD0_CS_SHF) |
Definition at line 92 of file qib_sd7220.c.
#define EPB_IB_QUAD0_CS_SHF (25) |
Definition at line 91 of file qib_sd7220.c.
#define EPB_IB_UC_CS_SHF (26) |
Definition at line 93 of file qib_sd7220.c.
Definition at line 88 of file qib_sd7220.c.
#define EPB_MADDRH EPB_LOC(6, 0, 3) |
Definition at line 738 of file qib_sd7220.c.
#define EPB_MADDRL EPB_LOC(6, 0, 2) |
Definition at line 737 of file qib_sd7220.c.
#define EPB_PCIE_UC_CS_SHF (27) |
Definition at line 94 of file qib_sd7220.c.
#define EPB_RAMDATA EPB_LOC(6, 0, 5) |
Definition at line 740 of file qib_sd7220.c.
#define EPB_RD (1ULL << 24) |
Definition at line 540 of file qib_sd7220.c.
#define EPB_ROM_R (2) |
Definition at line 730 of file qib_sd7220.c.
#define EPB_ROM_W (1) |
Definition at line 731 of file qib_sd7220.c.
#define EPB_ROMDATA EPB_LOC(6, 0, 4) |
Definition at line 739 of file qib_sd7220.c.
#define EPB_TRANS_ERR (1ULL << 30) |
Definition at line 542 of file qib_sd7220.c.
#define EPB_TRANS_RDY (1ULL << 31) |
Definition at line 541 of file qib_sd7220.c.
#define EPB_TRANS_TRIES 5 |
Definition at line 543 of file qib_sd7220.c.
#define EPB_UC_CTL EPB_LOC(6, 0, 0) |
Definition at line 736 of file qib_sd7220.c.
Definition at line 173 of file qib_sd7220.c.
#define IB_CTRL2 | ( | chn | ) | (EPB_LOC(chn, 7, 3) | EPB_IB_QUAD0_CS) |
Definition at line 140 of file qib_sd7220.c.
#define IB_MPREG5 (EPB_LOC(6, 0, 0xE) | (1L << EPB_IB_UC_CS_SHF)) |
Definition at line 136 of file qib_sd7220.c.
#define IB_MPREG6 (EPB_LOC(6, 0, 0xF) | (1U << EPB_IB_UC_CS_SHF)) |
Definition at line 137 of file qib_sd7220.c.
#define IB_PGUDP | ( | chn | ) | (EPB_LOC((chn), 2, 1) | EPB_IB_QUAD0_CS) |
Definition at line 172 of file qib_sd7220.c.
#define IB_SERDES_TRIM_DONE (1ULL << 11) |
Definition at line 924 of file qib_sd7220.c.
#define IBSD_RESYNC_TRIES 3 |
Definition at line 171 of file qib_sd7220.c.
#define kr_hwerrclear KREG_IDX(HwErrClear) |
Definition at line 56 of file qib_sd7220.c.
#define kr_hwerrmask KREG_IDX(HwErrMask) |
Definition at line 57 of file qib_sd7220.c.
#define kr_hwerrstatus KREG_IDX(HwErrStatus) |
Definition at line 58 of file qib_sd7220.c.
#define kr_ibcstatus KREG_IDX(IBCStatus) |
Definition at line 59 of file qib_sd7220.c.
#define kr_ibsd_epb_access_ctrl KREG_IDX(ibsd_epb_access_ctrl) |
Definition at line 64 of file qib_sd7220.c.
#define kr_ibsd_epb_transaction_reg KREG_IDX(ibsd_epb_transaction_reg) |
Definition at line 65 of file qib_sd7220.c.
#define kr_ibserdesctrl KREG_IDX(IBSerDesCtrl) |
Definition at line 60 of file qib_sd7220.c.
#define kr_pciesd_epb_access_ctrl KREG_IDX(pciesd_epb_access_ctrl) |
Definition at line 67 of file qib_sd7220.c.
#define kr_pciesd_epb_transaction_reg KREG_IDX(pciesd_epb_transaction_reg) |
Definition at line 66 of file qib_sd7220.c.
#define kr_scratch KREG_IDX(Scratch) |
Definition at line 61 of file qib_sd7220.c.
#define kr_serdes_ddsrxeq0 KREG_IDX(SerDes_DDSRXEQ0) |
Definition at line 68 of file qib_sd7220.c.
#define kr_serdes_maptable KREG_IDX(IBSerDesMappTable) |
Definition at line 74 of file qib_sd7220.c.
#define kr_xgxs_cfg KREG_IDX(XGXSCfg) |
Definition at line 62 of file qib_sd7220.c.
Definition at line 55 of file qib_sd7220.c.
#define LDOUTCTRL1 | ( | chnl | ) | EPB_LOC(chnl, 7, 6) |
Definition at line 1304 of file qib_sd7220.c.
#define NUM_DDS_REGS 6 |
Definition at line 961 of file qib_sd7220.c.
#define PCIE_SERDES0 0 |
Definition at line 80 of file qib_sd7220.c.
#define PCIE_SERDES1 1 |
Definition at line 81 of file qib_sd7220.c.
#define PROG_CHUNK 64 |
Definition at line 855 of file qib_sd7220.c.
#define QLOGIC_IB_HWE_IB_UC_MEMORYPARITYERR 0x0000004000000000ULL |
Definition at line 135 of file qib_sd7220.c.
#define RELOCK_FIRST_MS 3 |
Definition at line 1344 of file qib_sd7220.c.
#define RXEQ_INIT_RDESC | ( | elt, | |
addr | |||
) | (((elt) & 0xF) | ((addr) << 4)) |
Definition at line 1001 of file qib_sd7220.c.
#define RXEQ_ROWS ARRAY_SIZE(rxeq_init_vals) |
Definition at line 1038 of file qib_sd7220.c.
#define RXEQ_SDR_DFELTH 0 |
Definition at line 1008 of file qib_sd7220.c.
#define RXEQ_SDR_G1CNT_Z1CNT 0x11 |
Definition at line 1010 of file qib_sd7220.c.
#define RXEQ_SDR_TLTH 0 |
Definition at line 1009 of file qib_sd7220.c.
#define RXEQ_SDR_ZCNT 23 |
Definition at line 1011 of file qib_sd7220.c.
#define RXEQ_VAL | ( | elt, | |
adr, | |||
val0, | |||
val1, | |||
val2, | |||
val3 | |||
) | {RXEQ_INIT_RDESC((elt), (adr)), {(val0), (val1), (val2), (val3)} } |
Definition at line 1002 of file qib_sd7220.c.
#define RXEQ_VAL_ALL | ( | elt, | |
adr, | |||
val | |||
) | {RXEQ_INIT_RDESC((elt), (adr)), {(val), (val), (val), (val)} } |
Definition at line 1005 of file qib_sd7220.c.
Definition at line 1112 of file qib_sd7220.c.
#define RXHSSTATUS | ( | chnl | ) | EPB_LOC(chnl, 6, 0xF) |
Definition at line 1305 of file qib_sd7220.c.
Definition at line 1345 of file qib_sd7220.c.
#define SD7220_FW_NAME "qlogic/sd7220.fw" |
Definition at line 47 of file qib_sd7220.c.
#define SD_PRAM_ERROR_LIMIT 42 |
Definition at line 879 of file qib_sd7220.c.
Definition at line 141 of file qib_sd7220.c.
Definition at line 1116 of file qib_sd7220.c.
#define TRIM_TMO (30) |
Definition at line 925 of file qib_sd7220.c.
#define TX_FAST_ELT (9) |
Definition at line 952 of file qib_sd7220.c.
#define UC_PAR_CLR_D 8 |
Definition at line 138 of file qib_sd7220.c.
#define UC_PAR_CLR_M 0xC |
Definition at line 139 of file qib_sd7220.c.
Definition at line 1114 of file qib_sd7220.c.
Definition at line 1115 of file qib_sd7220.c.
Definition at line 1113 of file qib_sd7220.c.
#define VFY_CHUNK 64 |
Definition at line 878 of file qib_sd7220.c.
MODULE_FIRMWARE | ( | SD7220_FW_NAME | ) |
void qib_sd7220_clr_ibpar | ( | struct qib_devdata * | dd | ) |
Definition at line 143 of file qib_sd7220.c.
int qib_sd7220_init | ( | struct qib_devdata * | dd | ) |
Definition at line 393 of file qib_sd7220.c.
int qib_sd7220_presets | ( | struct qib_devdata * | dd | ) |
Definition at line 1265 of file qib_sd7220.c.
void set_7220_relock_poll | ( | struct qib_devdata * | dd, |
int | ibup | ||
) |
Definition at line 1418 of file qib_sd7220.c.
void shutdown_7220_relock_poll | ( | struct qib_devdata * | dd | ) |
Definition at line 1377 of file qib_sd7220.c.
void toggle_7220_rclkrls | ( | struct qib_devdata * | dd | ) |
Definition at line 1346 of file qib_sd7220.c.