Data Structures
struct	qla4_83xx_reset_template_hdr

struct	qla4_83xx_reset_entry_hdr

struct	qla4_83xx_poll

struct	qla4_83xx_rmw

struct	qla4_83xx_entry

struct	qla4_83xx_quad_entry

struct	qla4_83xx_reset_template

struct	qla83xx_minidump_entry_pollrd

struct	qla83xx_minidump_entry_rdmux2

struct	qla83xx_minidump_entry_pollrdmwr

struct	qla4_83xx_idc_information

Macros
#define	QLA83XX_FLASH_SPI_STATUS 0x2808E010

#define	QLA83XX_FLASH_SPI_CONTROL 0x2808E014

#define	QLA83XX_FLASH_STATUS 0x42100004

#define	QLA83XX_FLASH_CONTROL 0x42110004

#define	QLA83XX_FLASH_ADDR 0x42110008

#define	QLA83XX_FLASH_WRDATA 0x4211000C

#define	QLA83XX_FLASH_RDDATA 0x42110018

#define	QLA83XX_FLASH_DIRECT_WINDOW 0x42110030

#define	QLA83XX_FLASH_DIRECT_DATA(DATA) (0x42150000 \| (0x0000FFFF&DATA))

#define	QLA83XX_FLASH_LOCK 0x3850

#define	QLA83XX_FLASH_UNLOCK 0x3854

#define	QLA83XX_FLASH_LOCK_ID 0x3500

#define	QLA83XX_DRV_LOCK 0x3868

#define	QLA83XX_DRV_UNLOCK 0x386C

#define	QLA83XX_DRV_LOCK_ID 0x3504

#define	QLA83XX_DRV_LOCKRECOVERY 0x379C

#define	QLA83XX_IDC_VER_MAJ_VALUE 0x1

#define	QLA83XX_IDC_VER_MIN_VALUE 0x0

#define	QLA83XX_CRB_IDC_VER_MAJOR 0x3780

#define	QLA83XX_CRB_IDC_VER_MINOR 0x3798

#define	QLA83XX_IDC_DRV_CTRL 0x3790

#define	QLA83XX_IDC_DRV_AUDIT 0x3794

#define	QLA83XX_SRE_SHIM_CONTROL 0x0D200284

#define	QLA83XX_PORT0_RXB_PAUSE_THRS 0x0B2003A4

#define	QLA83XX_PORT1_RXB_PAUSE_THRS 0x0B2013A4

#define	QLA83XX_PORT0_RXB_TC_MAX_CELL 0x0B200388

#define	QLA83XX_PORT1_RXB_TC_MAX_CELL 0x0B201388

#define	QLA83XX_PORT0_RXB_TC_STATS 0x0B20039C

#define	QLA83XX_PORT1_RXB_TC_STATS 0x0B20139C

#define	QLA83XX_PORT2_IFB_PAUSE_THRS 0x0B200704

#define	QLA83XX_PORT3_IFB_PAUSE_THRS 0x0B201704

#define	QLA83XX_SET_PAUSE_VAL 0x0

#define	QLA83XX_SET_TC_MAX_CELL_VAL 0x03FF03FF

#define	QLA83XX_PEG_HALT_STATUS1 0x34A8

#define	QLA83XX_PEG_HALT_STATUS2 0x34AC

#define	QLA83XX_PEG_ALIVE_COUNTER 0x34B0 /* FW_HEARTBEAT */

#define	QLA83XX_FW_CAPABILITIES 0x3528

#define	QLA83XX_CRB_DRV_ACTIVE 0x3788 /* IDC_DRV_PRESENCE */

#define	QLA83XX_CRB_DEV_STATE 0x3784 /* IDC_DEV_STATE */

#define	QLA83XX_CRB_DRV_STATE 0x378C /* IDC_DRV_ACK */

#define	QLA83XX_CRB_DRV_SCRATCH 0x3548

#define	QLA83XX_CRB_DEV_PART_INFO1 0x37E0

#define	QLA83XX_CRB_DEV_PART_INFO2 0x37E4

#define	QLA83XX_FW_VER_MAJOR 0x3550

#define	QLA83XX_FW_VER_MINOR 0x3554

#define	QLA83XX_FW_VER_SUB 0x3558

#define	QLA83XX_NPAR_STATE 0x359C

#define	QLA83XX_FW_IMAGE_VALID 0x35FC

#define	QLA83XX_CMDPEG_STATE 0x3650

#define	QLA83XX_ASIC_TEMP 0x37B4

#define	QLA83XX_FW_API 0x356C

#define	QLA83XX_DRV_OP_MODE 0x3570

#define	QLA83XX_CRB_WIN_BASE 0x3800

#define	QLA83XX_CRB_WIN_FUNC(f) (QLA83XX_CRB_WIN_BASE+((f)*4))

#define	QLA83XX_SEM_LOCK_BASE 0x3840

#define	QLA83XX_SEM_UNLOCK_BASE 0x3844

#define	QLA83XX_SEM_LOCK_FUNC(f) (QLA83XX_SEM_LOCK_BASE+((f)*8))

#define	QLA83XX_SEM_UNLOCK_FUNC(f) (QLA83XX_SEM_UNLOCK_BASE+((f)*8))

#define	QLA83XX_LINK_STATE(f) (0x3698+((f) > 7 ? 4 : 0))

#define	QLA83XX_LINK_SPEED(f) (0x36E0+(((f) >> 2) * 4))

#define	QLA83XX_MAX_LINK_SPEED(f) (0x36F0+(((f) / 4) * 4))

#define	QLA83XX_LINK_SPEED_FACTOR 10

#define	QLA83xx_FLASH_MAX_WAIT_USEC 100

#define	QLA83XX_FLASH_LOCK_TIMEOUT 10000

#define	QLA83XX_FLASH_SECTOR_SIZE 65536

#define	QLA83XX_DRV_LOCK_TIMEOUT 2000

#define	QLA83XX_FLASH_SECTOR_ERASE_CMD 0xdeadbeef

#define	QLA83XX_FLASH_WRITE_CMD 0xdacdacda

#define	QLA83XX_FLASH_BUFFER_WRITE_CMD 0xcadcadca

#define	QLA83XX_FLASH_READ_RETRY_COUNT 2000

#define	QLA83XX_FLASH_STATUS_READY 0x6

#define	QLA83XX_FLASH_BUFFER_WRITE_MIN 2

#define	QLA83XX_FLASH_BUFFER_WRITE_MAX 64

#define	QLA83XX_FLASH_STATUS_REG_POLL_DELAY 1

#define	QLA83XX_ERASE_MODE 1

#define	QLA83XX_WRITE_MODE 2

#define	QLA83XX_DWORD_WRITE_MODE 3

#define	QLA83XX_GLOBAL_RESET 0x38CC

#define	QLA83XX_WILDCARD 0x38F0

#define	QLA83XX_INFORMANT 0x38FC

#define	QLA83XX_HOST_MBX_CTRL 0x3038

#define	QLA83XX_FW_MBX_CTRL 0x303C

#define	QLA83XX_BOOTLOADER_ADDR 0x355C

#define	QLA83XX_BOOTLOADER_SIZE 0x3560

#define	QLA83XX_FW_IMAGE_ADDR 0x3564

#define	QLA83XX_MBX_INTR_ENABLE 0x1000

#define	QLA83XX_MBX_INTR_MASK 0x1200

#define	DONTRESET_BIT0 0x1

#define	GRACEFUL_RESET_BIT1 0x2

#define	QLA83XX_HALT_STATUS_INFORMATIONAL (0x1 << 29)

#define	QLA83XX_HALT_STATUS_FW_RESET (0x2 << 29)

#define	QLA83XX_HALT_STATUS_UNRECOVERABLE (0x4 << 29)

#define	QLA83XX_BOOTLOADER_FLASH_ADDR 0x10000

#define	QLA83XX_BOOT_FROM_FLASH 0

#define	QLA83XX_IDC_PARAM_ADDR 0x3e8020

#define	QLA83XX_MAX_RESET_SEQ_ENTRIES 16

#define	QLA83XX_RESTART_TEMPLATE_SIZE 0x2000

#define	QLA83XX_RESET_TEMPLATE_ADDR 0x4F0000

#define	QLA83XX_RESET_SEQ_VERSION 0x0101

#define	OPCODE_NOP 0x0000

#define	OPCODE_WRITE_LIST 0x0001

#define	OPCODE_READ_WRITE_LIST 0x0002

#define	OPCODE_POLL_LIST 0x0004

#define	OPCODE_POLL_WRITE_LIST 0x0008

#define	OPCODE_READ_MODIFY_WRITE 0x0010

#define	OPCODE_SEQ_PAUSE 0x0020

#define	OPCODE_SEQ_END 0x0040

#define	OPCODE_TMPL_END 0x0080

#define	OPCODE_POLL_READ_LIST 0x0100

#define	RESET_TMPLT_HDR_SIGNATURE 0xCAFE

Variables
struct qla4_83xx_reset_template_hdr	__packed

Macro Definition Documentation

#define DONTRESET_BIT0 0x1

Definition at line 137 of file ql4_83xx.h.

#define GRACEFUL_RESET_BIT1 0x2

Definition at line 138 of file ql4_83xx.h.

#define OPCODE_NOP 0x0000

Definition at line 156 of file ql4_83xx.h.

#define OPCODE_POLL_LIST 0x0004

Definition at line 159 of file ql4_83xx.h.

#define OPCODE_POLL_READ_LIST 0x0100

Definition at line 165 of file ql4_83xx.h.

#define OPCODE_POLL_WRITE_LIST 0x0008

Definition at line 160 of file ql4_83xx.h.

#define OPCODE_READ_MODIFY_WRITE 0x0010

Definition at line 161 of file ql4_83xx.h.

#define OPCODE_READ_WRITE_LIST 0x0002

Definition at line 158 of file ql4_83xx.h.

#define OPCODE_SEQ_END 0x0040

Definition at line 163 of file ql4_83xx.h.

#define OPCODE_SEQ_PAUSE 0x0020

Definition at line 162 of file ql4_83xx.h.

#define OPCODE_TMPL_END 0x0080

Definition at line 164 of file ql4_83xx.h.

#define OPCODE_WRITE_LIST 0x0001

Definition at line 157 of file ql4_83xx.h.

#define QLA83XX_ASIC_TEMP 0x37B4

Definition at line 76 of file ql4_83xx.h.

#define QLA83XX_BOOT_FROM_FLASH 0

Definition at line 146 of file ql4_83xx.h.

#define QLA83XX_BOOTLOADER_ADDR 0x355C

Definition at line 130 of file ql4_83xx.h.

#define QLA83XX_BOOTLOADER_FLASH_ADDR 0x10000

Definition at line 145 of file ql4_83xx.h.

#define QLA83XX_BOOTLOADER_SIZE 0x3560

Definition at line 131 of file ql4_83xx.h.

#define QLA83XX_CMDPEG_STATE 0x3650

Definition at line 75 of file ql4_83xx.h.

#define QLA83XX_CRB_DEV_PART_INFO1 0x37E0

Definition at line 67 of file ql4_83xx.h.

#define QLA83XX_CRB_DEV_PART_INFO2 0x37E4

Definition at line 68 of file ql4_83xx.h.

#define QLA83XX_CRB_DEV_STATE 0x3784 /* IDC_DEV_STATE */

Definition at line 64 of file ql4_83xx.h.

#define QLA83XX_CRB_DRV_ACTIVE 0x3788 /* IDC_DRV_PRESENCE */

Definition at line 63 of file ql4_83xx.h.

#define QLA83XX_CRB_DRV_SCRATCH 0x3548

Definition at line 66 of file ql4_83xx.h.

#define QLA83XX_CRB_DRV_STATE 0x378C /* IDC_DRV_ACK */

Definition at line 65 of file ql4_83xx.h.

#define QLA83XX_CRB_IDC_VER_MAJOR 0x3780

Definition at line 40 of file ql4_83xx.h.

#define QLA83XX_CRB_IDC_VER_MINOR 0x3798

Definition at line 41 of file ql4_83xx.h.

#define QLA83XX_CRB_WIN_BASE 0x3800

Definition at line 97 of file ql4_83xx.h.

#define QLA83XX_CRB_WIN_FUNC ( f ) (QLA83XX_CRB_WIN_BASE+((f)*4))

Definition at line 98 of file ql4_83xx.h.

#define QLA83XX_DRV_LOCK 0x3868

Definition at line 30 of file ql4_83xx.h.

#define QLA83XX_DRV_LOCK_ID 0x3504

Definition at line 32 of file ql4_83xx.h.

#define QLA83XX_DRV_LOCK_TIMEOUT 2000

Definition at line 112 of file ql4_83xx.h.

#define QLA83XX_DRV_LOCKRECOVERY 0x379C

Definition at line 33 of file ql4_83xx.h.

#define QLA83XX_DRV_OP_MODE 0x3570

Definition at line 78 of file ql4_83xx.h.

#define QLA83XX_DRV_UNLOCK 0x386C

Definition at line 31 of file ql4_83xx.h.

#define QLA83XX_DWORD_WRITE_MODE 3

Definition at line 123 of file ql4_83xx.h.

#define QLA83XX_ERASE_MODE 1

Definition at line 121 of file ql4_83xx.h.

#define QLA83XX_FLASH_ADDR 0x42110008

Definition at line 16 of file ql4_83xx.h.

#define QLA83XX_FLASH_BUFFER_WRITE_CMD 0xcadcadca

Definition at line 115 of file ql4_83xx.h.

#define QLA83XX_FLASH_BUFFER_WRITE_MAX 64

Definition at line 119 of file ql4_83xx.h.

#define QLA83XX_FLASH_BUFFER_WRITE_MIN 2

Definition at line 118 of file ql4_83xx.h.

#define QLA83XX_FLASH_CONTROL 0x42110004

Definition at line 15 of file ql4_83xx.h.

#define QLA83XX_FLASH_DIRECT_DATA ( DATA ) (0x42150000 | (0x0000FFFF&DATA))

Definition at line 20 of file ql4_83xx.h.

#define QLA83XX_FLASH_DIRECT_WINDOW 0x42110030

Definition at line 19 of file ql4_83xx.h.

#define QLA83XX_FLASH_LOCK 0x3850

Definition at line 25 of file ql4_83xx.h.

#define QLA83XX_FLASH_LOCK_ID 0x3500

Definition at line 27 of file ql4_83xx.h.

#define QLA83XX_FLASH_LOCK_TIMEOUT 10000

Definition at line 110 of file ql4_83xx.h.

#define QLA83xx_FLASH_MAX_WAIT_USEC 100

Definition at line 109 of file ql4_83xx.h.

#define QLA83XX_FLASH_RDDATA 0x42110018

Definition at line 18 of file ql4_83xx.h.

#define QLA83XX_FLASH_READ_RETRY_COUNT 2000

Definition at line 116 of file ql4_83xx.h.

#define QLA83XX_FLASH_SECTOR_ERASE_CMD 0xdeadbeef

Definition at line 113 of file ql4_83xx.h.

#define QLA83XX_FLASH_SECTOR_SIZE 65536

Definition at line 111 of file ql4_83xx.h.

#define QLA83XX_FLASH_SPI_CONTROL 0x2808E014

Definition at line 13 of file ql4_83xx.h.

#define QLA83XX_FLASH_SPI_STATUS 0x2808E010

Definition at line 12 of file ql4_83xx.h.

#define QLA83XX_FLASH_STATUS 0x42100004

Definition at line 14 of file ql4_83xx.h.

#define QLA83XX_FLASH_STATUS_READY 0x6

Definition at line 117 of file ql4_83xx.h.

#define QLA83XX_FLASH_STATUS_REG_POLL_DELAY 1

Definition at line 120 of file ql4_83xx.h.

#define QLA83XX_FLASH_UNLOCK 0x3854

Definition at line 26 of file ql4_83xx.h.

#define QLA83XX_FLASH_WRDATA 0x4211000C

Definition at line 17 of file ql4_83xx.h.

#define QLA83XX_FLASH_WRITE_CMD 0xdacdacda

Definition at line 114 of file ql4_83xx.h.

#define QLA83XX_FW_API 0x356C

Definition at line 77 of file ql4_83xx.h.

#define QLA83XX_FW_CAPABILITIES 0x3528

Definition at line 62 of file ql4_83xx.h.

#define QLA83XX_FW_IMAGE_ADDR 0x3564

Definition at line 132 of file ql4_83xx.h.

#define QLA83XX_FW_IMAGE_VALID 0x35FC

Definition at line 74 of file ql4_83xx.h.

#define QLA83XX_FW_MBX_CTRL 0x303C

Definition at line 129 of file ql4_83xx.h.

#define QLA83XX_FW_VER_MAJOR 0x3550

Definition at line 70 of file ql4_83xx.h.

#define QLA83XX_FW_VER_MINOR 0x3554

Definition at line 71 of file ql4_83xx.h.

#define QLA83XX_FW_VER_SUB 0x3558

Definition at line 72 of file ql4_83xx.h.

#define QLA83XX_GLOBAL_RESET 0x38CC

Definition at line 125 of file ql4_83xx.h.

#define QLA83XX_HALT_STATUS_FW_RESET (0x2 << 29)

Definition at line 141 of file ql4_83xx.h.

#define QLA83XX_HALT_STATUS_INFORMATIONAL (0x1 << 29)

Definition at line 140 of file ql4_83xx.h.

#define QLA83XX_HALT_STATUS_UNRECOVERABLE (0x4 << 29)

Definition at line 142 of file ql4_83xx.h.

#define QLA83XX_HOST_MBX_CTRL 0x3038

Definition at line 128 of file ql4_83xx.h.

#define QLA83XX_IDC_DRV_AUDIT 0x3794

Definition at line 43 of file ql4_83xx.h.

#define QLA83XX_IDC_DRV_CTRL 0x3790

Definition at line 42 of file ql4_83xx.h.

#define QLA83XX_IDC_PARAM_ADDR 0x3e8020

Definition at line 148 of file ql4_83xx.h.

#define QLA83XX_IDC_VER_MAJ_VALUE 0x1

Definition at line 36 of file ql4_83xx.h.

#define QLA83XX_IDC_VER_MIN_VALUE 0x0

Definition at line 37 of file ql4_83xx.h.

#define QLA83XX_INFORMANT 0x38FC

Definition at line 127 of file ql4_83xx.h.

#define QLA83XX_LINK_SPEED ( f ) (0x36E0+(((f) >> 2) * 4))

Definition at line 104 of file ql4_83xx.h.

#define QLA83XX_LINK_SPEED_FACTOR 10

Definition at line 106 of file ql4_83xx.h.

#define QLA83XX_LINK_STATE ( f ) (0x3698+((f) > 7 ? 4 : 0))

Definition at line 103 of file ql4_83xx.h.

#define QLA83XX_MAX_LINK_SPEED ( f ) (0x36F0+(((f) / 4) * 4))

Definition at line 105 of file ql4_83xx.h.

#define QLA83XX_MAX_RESET_SEQ_ENTRIES 16

Definition at line 150 of file ql4_83xx.h.

#define QLA83XX_MBX_INTR_ENABLE 0x1000

Definition at line 133 of file ql4_83xx.h.

#define QLA83XX_MBX_INTR_MASK 0x1200

Definition at line 134 of file ql4_83xx.h.

#define QLA83XX_NPAR_STATE 0x359C

Definition at line 73 of file ql4_83xx.h.

#define QLA83XX_PEG_ALIVE_COUNTER 0x34B0 /* FW_HEARTBEAT */

Definition at line 61 of file ql4_83xx.h.

#define QLA83XX_PEG_HALT_STATUS1 0x34A8

Definition at line 59 of file ql4_83xx.h.

#define QLA83XX_PEG_HALT_STATUS2 0x34AC

Definition at line 60 of file ql4_83xx.h.

#define QLA83XX_PORT0_RXB_PAUSE_THRS 0x0B2003A4

Definition at line 45 of file ql4_83xx.h.

#define QLA83XX_PORT0_RXB_TC_MAX_CELL 0x0B200388

Definition at line 47 of file ql4_83xx.h.

#define QLA83XX_PORT0_RXB_TC_STATS 0x0B20039C

Definition at line 49 of file ql4_83xx.h.

#define QLA83XX_PORT1_RXB_PAUSE_THRS 0x0B2013A4

Definition at line 46 of file ql4_83xx.h.

#define QLA83XX_PORT1_RXB_TC_MAX_CELL 0x0B201388

Definition at line 48 of file ql4_83xx.h.

#define QLA83XX_PORT1_RXB_TC_STATS 0x0B20139C

Definition at line 50 of file ql4_83xx.h.

#define QLA83XX_PORT2_IFB_PAUSE_THRS 0x0B200704

Definition at line 51 of file ql4_83xx.h.

#define QLA83XX_PORT3_IFB_PAUSE_THRS 0x0B201704

Definition at line 52 of file ql4_83xx.h.

#define QLA83XX_RESET_SEQ_VERSION 0x0101

Definition at line 153 of file ql4_83xx.h.

#define QLA83XX_RESET_TEMPLATE_ADDR 0x4F0000

Definition at line 152 of file ql4_83xx.h.

#define QLA83XX_RESTART_TEMPLATE_SIZE 0x2000

Definition at line 151 of file ql4_83xx.h.

#define QLA83XX_SEM_LOCK_BASE 0x3840

Definition at line 99 of file ql4_83xx.h.

#define QLA83XX_SEM_LOCK_FUNC ( f ) (QLA83XX_SEM_LOCK_BASE+((f)*8))

Definition at line 101 of file ql4_83xx.h.

#define QLA83XX_SEM_UNLOCK_BASE 0x3844

Definition at line 100 of file ql4_83xx.h.

#define QLA83XX_SEM_UNLOCK_FUNC ( f ) (QLA83XX_SEM_UNLOCK_BASE+((f)*8))

Definition at line 102 of file ql4_83xx.h.

#define QLA83XX_SET_PAUSE_VAL 0x0

Definition at line 55 of file ql4_83xx.h.

#define QLA83XX_SET_TC_MAX_CELL_VAL 0x03FF03FF

Definition at line 56 of file ql4_83xx.h.

#define QLA83XX_SRE_SHIM_CONTROL 0x0D200284

Definition at line 44 of file ql4_83xx.h.

#define QLA83XX_WILDCARD 0x38F0

Definition at line 126 of file ql4_83xx.h.

#define QLA83XX_WRITE_MODE 2

Definition at line 122 of file ql4_83xx.h.

#define RESET_TMPLT_HDR_SIGNATURE 0xCAFE

Definition at line 168 of file ql4_83xx.h.

Variable Documentation

struct qla4_83xx_quad_entry __packed

Data Structures

Macros

Variables

Macro Definition Documentation

Variable Documentation