r4kcache.h File Reference

#include <asm/asm.h>
#include <asm/cacheops.h>
#include <asm/cpu-features.h>
#include <asm/mipsmtregs.h>

Go to the source code of this file.

Macros
#define	INDEX_BASE   CKSEG0
#define	cache_op(op, addr)
#define	__iflush_prologue   {
#define	__iflush_epilogue   }
#define	__dflush_prologue   {
#define	__dflush_epilogue   }
#define	__inv_dflush_prologue   {
#define	__inv_dflush_epilogue   }
#define	__sflush_prologue   {
#define	__sflush_epilogue   }
#define	__inv_sflush_prologue   {
#define	__inv_sflush_epilogue   }
#define	protected_cache_op(op, addr)
#define	cache16_unroll32(base, op)
#define	cache32_unroll32(base, op)
#define	cache64_unroll32(base, op)
#define	cache128_unroll32(base, op)
#define	__BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize)
#define	__BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot)

Macro Definition Documentation

#define __BUILD_BLAST_CACHE	(		pfx,
			desc,
			indexop,
			hitop,
			lsize
	)

Definition at line 343 of file r4kcache.h.

#define __BUILD_BLAST_CACHE_RANGE	(		pfx,
			desc,
			hitop,
			prot
	)

Value:

static inline void prot##blast_##pfx##cache##_range(unsigned long start, \
                            unsigned long end)  \
{                                   \
    unsigned long lsize = cpu_##desc##_line_size();         \
    unsigned long addr = start & ~(lsize - 1);          \
    unsigned long aend = (end - 1) & ~(lsize - 1);          \
                                    \
    __##pfx##flush_prologue                     \
                                    \
    while (1) {                         \
        prot##cache_op(hitop, addr);                \
        if (addr == aend)                   \
            break;                      \
        addr += lsize;                      \
    }                               \
                                    \
    __##pfx##flush_epilogue                     \
}

Definition at line 415 of file r4kcache.h.

#define __dflush_epilogue   }

Definition at line 133 of file r4kcache.h.

#define __dflush_prologue   {

Definition at line 132 of file r4kcache.h.

#define __iflush_epilogue   }

Definition at line 131 of file r4kcache.h.

#define __iflush_prologue   {

Definition at line 130 of file r4kcache.h.

#define __inv_dflush_epilogue   }

Definition at line 135 of file r4kcache.h.

#define __inv_dflush_prologue   {

Definition at line 134 of file r4kcache.h.

#define __inv_sflush_epilogue   }

Definition at line 139 of file r4kcache.h.

#define __inv_sflush_prologue   {

Definition at line 138 of file r4kcache.h.

#define __sflush_epilogue   }

Definition at line 137 of file r4kcache.h.

#define __sflush_prologue   {

Definition at line 136 of file r4kcache.h.

#define cache128_unroll32	(		base,
			op
	)

Value:

__asm__ __volatile__(                       \
    "   .set push                   \n" \
    "   .set noreorder                  \n" \
    "   .set mips3                  \n" \
    "   cache %1, 0x000(%0); cache %1, 0x080(%0)    \n" \
    "   cache %1, 0x100(%0); cache %1, 0x180(%0)    \n" \
    "   cache %1, 0x200(%0); cache %1, 0x280(%0)    \n" \
    "   cache %1, 0x300(%0); cache %1, 0x380(%0)    \n" \
    "   cache %1, 0x400(%0); cache %1, 0x480(%0)    \n" \
    "   cache %1, 0x500(%0); cache %1, 0x580(%0)    \n" \
    "   cache %1, 0x600(%0); cache %1, 0x680(%0)    \n" \
    "   cache %1, 0x700(%0); cache %1, 0x780(%0)    \n" \
    "   cache %1, 0x800(%0); cache %1, 0x880(%0)    \n" \
    "   cache %1, 0x900(%0); cache %1, 0x980(%0)    \n" \
    "   cache %1, 0xa00(%0); cache %1, 0xa80(%0)    \n" \
    "   cache %1, 0xb00(%0); cache %1, 0xb80(%0)    \n" \
    "   cache %1, 0xc00(%0); cache %1, 0xc80(%0)    \n" \
    "   cache %1, 0xd00(%0); cache %1, 0xd80(%0)    \n" \
    "   cache %1, 0xe00(%0); cache %1, 0xe80(%0)    \n" \
    "   cache %1, 0xf00(%0); cache %1, 0xf80(%0)    \n" \
    "   .set pop                    \n" \
        :                           \
        : "r" (base),                       \
          "i" (op));

Definition at line 316 of file r4kcache.h.

#define cache16_unroll32	(		base,
			op
	)

Value:

__asm__ __volatile__(                       \
    "   .set push                   \n" \
    "   .set noreorder                  \n" \
    "   .set mips3                  \n" \
    "   cache %1, 0x000(%0); cache %1, 0x010(%0)    \n" \
    "   cache %1, 0x020(%0); cache %1, 0x030(%0)    \n" \
    "   cache %1, 0x040(%0); cache %1, 0x050(%0)    \n" \
    "   cache %1, 0x060(%0); cache %1, 0x070(%0)    \n" \
    "   cache %1, 0x080(%0); cache %1, 0x090(%0)    \n" \
    "   cache %1, 0x0a0(%0); cache %1, 0x0b0(%0)    \n" \
    "   cache %1, 0x0c0(%0); cache %1, 0x0d0(%0)    \n" \
    "   cache %1, 0x0e0(%0); cache %1, 0x0f0(%0)    \n" \
    "   cache %1, 0x100(%0); cache %1, 0x110(%0)    \n" \
    "   cache %1, 0x120(%0); cache %1, 0x130(%0)    \n" \
    "   cache %1, 0x140(%0); cache %1, 0x150(%0)    \n" \
    "   cache %1, 0x160(%0); cache %1, 0x170(%0)    \n" \
    "   cache %1, 0x180(%0); cache %1, 0x190(%0)    \n" \
    "   cache %1, 0x1a0(%0); cache %1, 0x1b0(%0)    \n" \
    "   cache %1, 0x1c0(%0); cache %1, 0x1d0(%0)    \n" \
    "   cache %1, 0x1e0(%0); cache %1, 0x1f0(%0)    \n" \
    "   .set pop                    \n" \
        :                           \
        : "r" (base),                       \
          "i" (op));

Definition at line 238 of file r4kcache.h.

#define cache32_unroll32	(		base,
			op
	)

Value:

__asm__ __volatile__(                       \
    "   .set push                   \n" \
    "   .set noreorder                  \n" \
    "   .set mips3                  \n" \
    "   cache %1, 0x000(%0); cache %1, 0x020(%0)    \n" \
    "   cache %1, 0x040(%0); cache %1, 0x060(%0)    \n" \
    "   cache %1, 0x080(%0); cache %1, 0x0a0(%0)    \n" \
    "   cache %1, 0x0c0(%0); cache %1, 0x0e0(%0)    \n" \
    "   cache %1, 0x100(%0); cache %1, 0x120(%0)    \n" \
    "   cache %1, 0x140(%0); cache %1, 0x160(%0)    \n" \
    "   cache %1, 0x180(%0); cache %1, 0x1a0(%0)    \n" \
    "   cache %1, 0x1c0(%0); cache %1, 0x1e0(%0)    \n" \
    "   cache %1, 0x200(%0); cache %1, 0x220(%0)    \n" \
    "   cache %1, 0x240(%0); cache %1, 0x260(%0)    \n" \
    "   cache %1, 0x280(%0); cache %1, 0x2a0(%0)    \n" \
    "   cache %1, 0x2c0(%0); cache %1, 0x2e0(%0)    \n" \
    "   cache %1, 0x300(%0); cache %1, 0x320(%0)    \n" \
    "   cache %1, 0x340(%0); cache %1, 0x360(%0)    \n" \
    "   cache %1, 0x380(%0); cache %1, 0x3a0(%0)    \n" \
    "   cache %1, 0x3c0(%0); cache %1, 0x3e0(%0)    \n" \
    "   .set pop                    \n" \
        :                           \
        : "r" (base),                       \
          "i" (op));

Definition at line 264 of file r4kcache.h.

#define cache64_unroll32	(		base,
			op
	)

Value:

__asm__ __volatile__(                       \
    "   .set push                   \n" \
    "   .set noreorder                  \n" \
    "   .set mips3                  \n" \
    "   cache %1, 0x000(%0); cache %1, 0x040(%0)    \n" \
    "   cache %1, 0x080(%0); cache %1, 0x0c0(%0)    \n" \
    "   cache %1, 0x100(%0); cache %1, 0x140(%0)    \n" \
    "   cache %1, 0x180(%0); cache %1, 0x1c0(%0)    \n" \
    "   cache %1, 0x200(%0); cache %1, 0x240(%0)    \n" \
    "   cache %1, 0x280(%0); cache %1, 0x2c0(%0)    \n" \
    "   cache %1, 0x300(%0); cache %1, 0x340(%0)    \n" \
    "   cache %1, 0x380(%0); cache %1, 0x3c0(%0)    \n" \
    "   cache %1, 0x400(%0); cache %1, 0x440(%0)    \n" \
    "   cache %1, 0x480(%0); cache %1, 0x4c0(%0)    \n" \
    "   cache %1, 0x500(%0); cache %1, 0x540(%0)    \n" \
    "   cache %1, 0x580(%0); cache %1, 0x5c0(%0)    \n" \
    "   cache %1, 0x600(%0); cache %1, 0x640(%0)    \n" \
    "   cache %1, 0x680(%0); cache %1, 0x6c0(%0)    \n" \
    "   cache %1, 0x700(%0); cache %1, 0x740(%0)    \n" \
    "   cache %1, 0x780(%0); cache %1, 0x7c0(%0)    \n" \
    "   .set pop                    \n" \
        :                           \
        : "r" (base),                       \
          "i" (op));

Definition at line 290 of file r4kcache.h.

#define cache_op	(		op,
			addr
	)

Value:

__asm__ __volatile__(                       \
    "   .set    push                    \n" \
    "   .set    noreorder               \n" \
    "   .set    mips3\n\t               \n" \
    "   cache   %0, %1                  \n" \
    "   .set    pop                 \n" \
    :                               \
    : "i" (op), "R" (*(unsigned char *)(addr)))

Definition at line 33 of file r4kcache.h.

#define INDEX_BASE   CKSEG0

Definition at line 31 of file r4kcache.h.

#define protected_cache_op	(		op,
			addr
	)

Value:

__asm__ __volatile__(                   \
    "   .set    push            \n"     \
    "   .set    noreorder       \n"     \
    "   .set    mips3           \n"     \
    "1: cache   %0, (%1)        \n"     \
    "2: .set    pop         \n"     \
    "   .section __ex_table,\"a\"   \n"     \
    "   "STR(PTR)" 1b, 2b       \n"     \
    "   .previous"                  \
    :                           \
    : "i" (op), "r" (addr))

Definition at line 193 of file r4kcache.h.