r8180_hw.h File Reference

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Macros
#define	BIT0   0x00000001
#define	BIT1   0x00000002
#define	BIT2   0x00000004
#define	BIT3   0x00000008
#define	BIT4   0x00000010
#define	BIT5   0x00000020
#define	BIT6   0x00000040
#define	BIT7   0x00000080
#define	BIT9   0x00000200
#define	BIT11   0x00000800
#define	BIT13   0x00002000
#define	BIT15   0x00008000
#define	BIT20   0x00100000
#define	BIT21   0x00200000
#define	BIT22   0x00400000
#define	BIT23   0x00800000
#define	BIT24   0x01000000
#define	BIT25   0x02000000
#define	BIT26   0x04000000
#define	BIT27   0x08000000
#define	BIT28   0x10000000
#define	BIT29   0x20000000
#define	BIT30   0x40000000
#define	BIT31   0x80000000
#define	MAX_SLEEP_TIME   (10000)
#define	MIN_SLEEP_TIME   (50)
#define	BB_HOST_BANG_EN   (1<<2)
#define	BB_HOST_BANG_CLK   (1<<1)
#define	MAC0   0
#define	MAC4   4
#define	CMD   0x37
#define	CMD_RST_SHIFT   4
#define	CMD_RX_ENABLE_SHIFT   3
#define	CMD_TX_ENABLE_SHIFT   2
#define	EPROM_CMD   0x50
#define	EPROM_CMD_RESERVED_MASK   ((1<<5)|(1<<4))
#define	EPROM_CMD_OPERATING_MODE_SHIFT   6
#define	EPROM_CMD_OPERATING_MODE_MASK   ((1<<7)|(1<<6))
#define	EPROM_CMD_CONFIG   0x3
#define	EPROM_CMD_NORMAL   0
#define	EPROM_CMD_LOAD   1
#define	EPROM_CMD_PROGRAM   2
#define	EPROM_CS_SHIFT   3
#define	EPROM_CK_SHIFT   2
#define	EPROM_W_SHIFT   1
#define	EPROM_R_SHIFT   0
#define	CONFIG2_DMA_POLLING_MODE_SHIFT   3
#define	INTA_TXOVERFLOW   (1<<15)
#define	INTA_TIMEOUT   (1<<14)
#define	INTA_HIPRIORITYDESCERR   (1<<9)
#define	INTA_HIPRIORITYDESCOK   (1<<8)
#define	INTA_NORMPRIORITYDESCERR   (1<<7)
#define	INTA_NORMPRIORITYDESCOK   (1<<6)
#define	INTA_RXOVERFLOW   (1<<5)
#define	INTA_RXDESCERR   (1<<4)
#define	INTA_LOWPRIORITYDESCERR   (1<<3)
#define	INTA_LOWPRIORITYDESCOK   (1<<2)
#define	INTA_RXOK   (1)
#define	INTA_MASK   0x3c
#define	RXRING_ADDR   0xe4 /* page 0 */
#define	PGSELECT   0x5e
#define	PGSELECT_PG_SHIFT   0
#define	RX_CONF   0x44
#define	MAC_FILTER_MASK
#define	RX_CHECK_BSSID_SHIFT   23
#define	ACCEPT_PWR_FRAME_SHIFT   22
#define	ACCEPT_MNG_FRAME_SHIFT   20
#define	ACCEPT_CTL_FRAME_SHIFT   19
#define	ACCEPT_DATA_FRAME_SHIFT   18
#define	ACCEPT_ICVERR_FRAME_SHIFT   12
#define	ACCEPT_CRCERR_FRAME_SHIFT   5
#define	ACCEPT_BCAST_FRAME_SHIFT   3
#define	ACCEPT_MCAST_FRAME_SHIFT   2
#define	ACCEPT_ALLMAC_FRAME_SHIFT   0
#define	ACCEPT_NICMAC_FRAME_SHIFT   1
#define	RX_FIFO_THRESHOLD_MASK   ((1<<13) | (1<<14) | (1<<15))
#define	RX_FIFO_THRESHOLD_SHIFT   13
#define	RX_FIFO_THRESHOLD_NONE   7
#define	RX_AUTORESETPHY_SHIFT   28
#define	TX_CONF   0x40
#define	TX_CONF_HEADER_AUTOICREMENT_SHIFT   30
#define	TX_LOOPBACK_SHIFT   17
#define	TX_LOOPBACK_NONE   0
#define	TX_LOOPBACK_CONTINUE   3
#define	TX_LOOPBACK_MASK   ((1<<17)|(1<<18))
#define	TX_DPRETRY_SHIFT   0
#define	R8180_MAX_RETRY   255
#define	TX_RTSRETRY_SHIFT   8
#define	TX_NOICV_SHIFT   19
#define	TX_NOCRC_SHIFT   16
#define	TX_DMA_POLLING   0xd9
#define	TX_DMA_POLLING_BEACON_SHIFT   7
#define	TX_DMA_POLLING_HIPRIORITY_SHIFT   6
#define	TX_DMA_POLLING_NORMPRIORITY_SHIFT   5
#define	TX_DMA_POLLING_LOWPRIORITY_SHIFT   4
#define	TX_MANAGEPRIORITY_RING_ADDR   0x0C
#define	TX_BKPRIORITY_RING_ADDR   0x10
#define	TX_BEPRIORITY_RING_ADDR   0x14
#define	TX_VIPRIORITY_RING_ADDR   0x20
#define	TX_VOPRIORITY_RING_ADDR   0x24
#define	TX_HIGHPRIORITY_RING_ADDR   0x28
#define	MAX_RX_DMA_MASK   ((1<<8) | (1<<9) | (1<<10))
#define	MAX_RX_DMA_2048   7
#define	MAX_RX_DMA_1024   6
#define	MAX_RX_DMA_SHIFT   10
#define	INT_TIMEOUT   0x48
#define	CONFIG3_CLKRUN_SHIFT   2
#define	CONFIG3_ANAPARAM_W_SHIFT   6
#define	ANAPARAM   0x54
#define	BEACON_INTERVAL   0x70
#define	BEACON_INTERVAL_MASK
#define	ATIM_MASK
#define	ATIM   0x72
#define	EPROM_CS_SHIFT   3
#define	EPROM_CK_SHIFT   2
#define	PHY_ADR   0x7c
#define	SECURITY   0x5f /* 1209 this is sth wrong */
#define	SECURITY_WEP_TX_ENABLE_SHIFT   1
#define	SECURITY_WEP_RX_ENABLE_SHIFT   0
#define	SECURITY_ENCRYP_104   1
#define	SECURITY_ENCRYP_SHIFT   4
#define	SECURITY_ENCRYP_MASK   ((1<<4)|(1<<5))
#define	KEY0   0x90 /* 1209 this is sth wrong */
#define	CONFIG2_ANTENNA_SHIFT   6
#define	TX_BEACON_RING_ADDR   0x4c
#define	CONFIG0_WEP40_SHIFT   7
#define	CONFIG0_WEP104_SHIFT   6
#define	AGCRESET_SHIFT   5
#define	TSFTR   0x0018
#define	TLPDA   0x0020
#define	BSSID   0x002E
#define	CR   0x0037
#define	RF_SW_CONFIG   0x8 /* store data which is transmitted to RF for driver */
#define	RF_SW_CFG_SI   BIT1
#define	EIFS   0x2D /* Extended InterFrame Space Timer, in unit of 4 us. */
#define	BRSR   0x34 /* Basic rate set */
#define	IMR   0x006C
#define	ISR   0x003C
#define	TCR   0x0040
#define	RCR   0x0044
#define	TimerInt   0x0048
#define	CR9346   0x0050
#define	CONFIG0   0x0051
#define	CONFIG2   0x0053
#define	MSR   0x0058
#define	CONFIG3   0x0059
#define	CONFIG4   0x005A
#define	ANAPARM_ASIC_ON   0xB0054D00
#define	ANAPARM2_ASIC_ON   0x000004C6
#define	ANAPARM_ON   ANAPARM_ASIC_ON
#define	ANAPARM2_ON   ANAPARM2_ASIC_ON
#define	TESTR   0x005B
#define	PSR   0x005E
#define	BcnItv   0x0070
#define	AtimWnd   0x0072
#define	BintrItv   0x0074
#define	PhyAddr   0x007C
#define	PhyDataR   0x007E
#define	RFPinsOutput   0x80
#define	RFPinsEnable   0x82
#define	RF_TIMING   0x8c
#define	RFPinsSelect   0x84
#define	ANAPARAM2   0x60
#define	RF_PARA   0x88
#define	RFPinsInput   0x86
#define	GP_ENABLE   0x90
#define	GPIO   0x91
#define	SW_CONTROL_GPIO   0x400
#define	TX_ANTENNA   0x9f
#define	TX_GAIN_OFDM   0x9e
#define	TX_GAIN_CCK   0x9d
#define	WPA_CONFIG   0xb0
#define	TX_AGC_CTL   0x9c
#define	TX_AGC_CTL_PERPACKET_GAIN_SHIFT   0
#define	TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT   1
#define	TX_AGC_CTL_FEEDBACK_ANT   2
#define	RESP_RATE   0x34
#define	SIFS   0xb4
#define	DIFS   0xb5
#define	SLOT   0xb6
#define	CW_CONF   0xbc
#define	CW_CONF_PERPACKET_RETRY_SHIFT   1
#define	CW_CONF_PERPACKET_CW_SHIFT   0
#define	CW_VAL   0xbd
#define	MAX_RESP_RATE_SHIFT   4
#define	MIN_RESP_RATE_SHIFT   0
#define	RATE_FALLBACK   0xbe
#define	CONFIG5   0x00D8
#define	PHYPR   0xDA /* 0xDA - 0x0B PHY Parameter Register. */
#define	FEMR   0x1D4 /* Function Event Mask register */
#define	FFER   0x00FC
#define	FFER_END   0x00FF
#define	BRSR_BPLCP   ((1 << 8))
#define	BRSR_MBR   ((1 << 1)|(1 << 0))
#define	BRSR_MBR_8185   ((1 << 11)|(1 << 10)|(1 << 9)|(1 << 8)|(1 << 7)|(1 << 6)|(1 << 5)|(1 << 4)|(1 << 3)|(1 << 2)|(1 << 1)|(1 << 0))
#define	BRSR_MBR0   ((1 << 0))
#define	BRSR_MBR1   ((1 << 1))
#define	CR_RST   ((1 << 4))
#define	CR_RE   ((1 << 3))
#define	CR_TE   ((1 << 2))
#define	CR_MulRW   ((1 << 0))
#define	IMR_Dot11hInt   ((1 << 25)) /*802.11h Measurement Interrupt */
#define	IMR_BcnDmaInt   ((1 << 24)) /*Beacon DMA Interrupt */ /*What differenct between BcnDmaInt and BcnInt??? */
#define	IMR_WakeInt   ((1 << 23)) /*Wake Up Interrupt */
#define	IMR_TXFOVW   ((1 << 22)) /*Tx FIFO Overflow Interrupt */
#define	IMR_TimeOut1   ((1 << 21)) /*Time Out Interrupt 1 */
#define	IMR_BcnInt   ((1 << 20)) /*Beacon Time out Interrupt */
#define	IMR_ATIMInt   ((1 << 19)) /*ATIM Time Out Interrupt */
#define	IMR_TBDER   ((1 << 18)) /*Tx Beacon Descriptor Error Interrupt */
#define	IMR_TBDOK   ((1 << 17)) /*Tx Beacon Descriptor OK Interrupt */
#define	IMR_THPDER   ((1 << 16)) /*Tx High Priority Descriptor Error Interrupt */
#define	IMR_THPDOK   ((1 << 15)) /*Tx High Priority Descriptor OK Interrupt */
#define	IMR_TVODER   ((1 << 14)) /*Tx AC_VO Descriptor Error Interrupt */
#define	IMR_TVODOK   ((1 << 13)) /*Tx AC_VO Descriptor OK Interrupt */
#define	IMR_FOVW   ((1 << 12)) /*Rx FIFO Overflow Interrupt */
#define	IMR_RDU   ((1 << 11)) /*Rx Descriptor Unavailable Interrupt */
#define	IMR_TVIDER   ((1 << 10)) /*Tx AC_VI Descriptor Error Interrupt */
#define	IMR_TVIDOK   ((1 << 9)) /*Tx AC_VI Descriptor OK Interrupt */
#define	IMR_RER   ((1 << 8)) /*Rx Error Interrupt */
#define	IMR_ROK   ((1 << 7)) /*Receive OK Interrupt */
#define	IMR_TBEDER   ((1 << 6)) /*Tx AC_BE Descriptor Error Interrupt */
#define	IMR_TBEDOK   ((1 << 5)) /*Tx AC_BE Descriptor OK Interrupt */
#define	IMR_TBKDER   ((1 << 4)) /*Tx AC_BK Descriptor Error Interrupt */
#define	IMR_TBKDOK   ((1 << 3)) /*Tx AC_BK Descriptor OK Interrupt */
#define	IMR_RQoSOK   ((1 << 2)) /*Rx QoS OK Interrupt */
#define	IMR_TimeOut2   ((1 << 1)) /*Time Out Interrupt 2 */
#define	IMR_TimeOut3   ((1 << 0)) /*Time Out Interrupt 3 */
#define	IMR_TMGDOK   ((1 << 30))
#define	ISR_Dot11hInt   ((1 << 25)) /*802.11h Measurement Interrupt */
#define	ISR_BcnDmaInt   ((1 << 24)) /*Beacon DMA Interrupt */ /*What differenct between BcnDmaInt and BcnInt??? */
#define	ISR_WakeInt   ((1 << 23)) /*Wake Up Interrupt */
#define	ISR_TXFOVW   ((1 << 22)) /*Tx FIFO Overflow Interrupt */
#define	ISR_TimeOut1   ((1 << 21)) /*Time Out Interrupt 1 */
#define	ISR_BcnInt   ((1 << 20)) /*Beacon Time out Interrupt */
#define	ISR_ATIMInt   ((1 << 19)) /*ATIM Time Out Interrupt */
#define	ISR_TBDER   ((1 << 18)) /*Tx Beacon Descriptor Error Interrupt */
#define	ISR_TBDOK   ((1 << 17)) /*Tx Beacon Descriptor OK Interrupt */
#define	ISR_THPDER   ((1 << 16)) /*Tx High Priority Descriptor Error Interrupt */
#define	ISR_THPDOK   ((1 << 15)) /*Tx High Priority Descriptor OK Interrupt */
#define	ISR_TVODER   ((1 << 14)) /*Tx AC_VO Descriptor Error Interrupt */
#define	ISR_TVODOK   ((1 << 13)) /*Tx AC_VO Descriptor OK Interrupt */
#define	ISR_FOVW   ((1 << 12)) /*Rx FIFO Overflow Interrupt */
#define	ISR_RDU   ((1 << 11)) /*Rx Descriptor Unavailable Interrupt */
#define	ISR_TVIDER   ((1 << 10)) /*Tx AC_VI Descriptor Error Interrupt */
#define	ISR_TVIDOK   ((1 << 9)) /*Tx AC_VI Descriptor OK Interrupt */
#define	ISR_RER   ((1 << 8)) /*Rx Error Interrupt */
#define	ISR_ROK   ((1 << 7)) /*Receive OK Interrupt */
#define	ISR_TBEDER   ((1 << 6)) /*Tx AC_BE Descriptor Error Interrupt */
#define	ISR_TBEDOK   ((1 << 5)) /*Tx AC_BE Descriptor OK Interrupt */
#define	ISR_TBKDER   ((1 << 4)) /*Tx AC_BK Descriptor Error Interrupt */
#define	ISR_TBKDOK   ((1 << 3)) /*Tx AC_BK Descriptor OK Interrupt */
#define	ISR_RQoSOK   ((1 << 2)) /*Rx QoS OK Interrupt */
#define	ISR_TimeOut2   ((1 << 1)) /*Time Out Interrupt 2 */
#define	ISR_TimeOut3   ((1 << 0)) /*Time Out Interrupt 3 */
#define	ISR_TLPDER   ISR_TVIDER
#define	ISR_TLPDOK   ISR_TVIDOK
#define	ISR_TNPDER   ISR_TVODER
#define	ISR_TNPDOK   ISR_TVODOK
#define	ISR_TimeOut   ISR_TimeOut1
#define	ISR_RXFOVW   ISR_FOVW
#define	HW_VERID_R8180_F   3
#define	HW_VERID_R8180_ABCD   2
#define	HW_VERID_R8185_ABC   4
#define	HW_VERID_R8185_D   5
#define	HW_VERID_R8185B_B   6
#define	TCR_CWMIN   ((1 << 31))
#define	TCR_SWSEQ   ((1 << 30))
#define	TCR_HWVERID_MASK   ((1 << 27)|(1 << 26)|(1 << 25))
#define	TCR_HWVERID_SHIFT   25
#define	TCR_SAT   ((1 << 24))
#define	TCR_PLCP_LEN   TCR_SAT /* rtl8180 */
#define	TCR_MXDMA_MASK   ((1 << 23)|(1 << 22)|(1 << 21))
#define	TCR_MXDMA_1024   6
#define	TCR_MXDMA_2048   7
#define	TCR_MXDMA_SHIFT   21
#define	TCR_DISCW   ((1 << 20))
#define	TCR_ICV   ((1 << 19))
#define	TCR_LBK   ((1 << 18)|(1 << 17))
#define	TCR_LBK1   ((1 << 18))
#define	TCR_LBK0   ((1 << 17))
#define	TCR_CRC   ((1 << 16))
#define	TCR_DPRETRY_MASK   ((1 << 15)|(1 << 14)|(1 << 13)|(1 << 12)|(1 << 11)|(1 << 10)|(1 << 9)|(1 << 8))
#define	TCR_RTSRETRY_MASK   ((1 << 0)|(1 << 1)|(1 << 2)|(1 << 3)|(1 << 4)|(1 << 5)|(1 << 6)|(1 << 7))
#define	TCR_PROBE_NOTIMESTAMP_SHIFT   29 /* rtl8185 */
#define	RCR_ONLYERLPKT   ((1 << 31))
#define	RCR_CS_SHIFT   29
#define	RCR_CS_MASK   ((1 << 30) | (1 << 29))
#define	RCR_ENMARP   ((1 << 28))
#define	RCR_CBSSID   ((1 << 23))
#define	RCR_APWRMGT   ((1 << 22))
#define	RCR_ADD3   ((1 << 21))
#define	RCR_AMF   ((1 << 20))
#define	RCR_ACF   ((1 << 19))
#define	RCR_ADF   ((1 << 18))
#define	RCR_RXFTH   ((1 << 15)|(1 << 14)|(1 << 13))
#define	RCR_RXFTH2   ((1 << 15))
#define	RCR_RXFTH1   ((1 << 14))
#define	RCR_RXFTH0   ((1 << 13))
#define	RCR_AICV   ((1 << 12))
#define	RCR_MXDMA   ((1 << 10)|(1 << 9)|(1 << 8))
#define	RCR_MXDMA2   ((1 << 10))
#define	RCR_MXDMA1   ((1 << 9))
#define	RCR_MXDMA0   ((1 << 8))
#define	RCR_9356SEL   ((1 << 6))
#define	RCR_ACRC32   ((1 << 5))
#define	RCR_AB   ((1 << 3))
#define	RCR_AM   ((1 << 2))
#define	RCR_APM   ((1 << 1))
#define	RCR_AAP   ((1 << 0))
#define	CR9346_EEM   ((1 << 7)|(1 << 6))
#define	CR9346_EEM1   ((1 << 7))
#define	CR9346_EEM0   ((1 << 6))
#define	CR9346_EECS   ((1 << 3))
#define	CR9346_EESK   ((1 << 2))
#define	CR9346_EED1   ((1 << 1))
#define	CR9346_EED0   ((1 << 0))
#define	CONFIG3_PARM_En   ((1 << 6))
#define	CONFIG3_FuncRegEn   ((1 << 1))
#define	CONFIG4_PWRMGT   ((1 << 5))
#define	MSR_LINK_MASK   ((1 << 2)|(1 << 3))
#define	MSR_LINK_MANAGED   2
#define	MSR_LINK_NONE   0
#define	MSR_LINK_SHIFT   2
#define	MSR_LINK_ADHOC   1
#define	MSR_LINK_MASTER   3
#define	BcnItv_BcnItv   (0x01FF)
#define	AtimWnd_AtimWnd   (0x01FF)
#define	BintrItv_BintrItv   (0x01FF)
#define	FEMR_INTR   ((1 << 15))
#define	FEMR_WKUP   ((1 << 14))
#define	FEMR_GWAKE   ((1 << 4))
#define	FFER_INTR   ((1 << 15))
#define	FFER_GWAKE   ((1 << 4))
#define	SW_THREE_WIRE   0
#define	HW_THREE_WIRE   2
#define	HW_THREE_WIRE_PI   5
#define	HW_THREE_WIRE_SI   6
#define	TCR_LRL_OFFSET   0
#define	TCR_SRL_OFFSET   8
#define	TCR_MXDMA_OFFSET   21
#define	TCR_DISReqQsize_OFFSET   28
#define	TCR_DurProcMode_OFFSET   30
#define	RCR_MXDMA_OFFSET   8
#define	RCR_FIFO_OFFSET   13
#define	AckTimeOutReg   0x79 /* ACK timeout register, in unit of 4 us. */
#define	RFTiming   0x8C
#define	TPPollStop   0x93
#define	TXAGC_CTL   0x9C /*< RJ_TODO_8185B> TX_AGC_CONTROL (0x9C seems be removed at 8185B, see p37). */
#define	CCK_TXAGC   0x9D
#define	OFDM_TXAGC   0x9E
#define	ANTSEL   0x9F
#define	ACM_CONTROL   0x00BF /* ACM Control Registe */
#define	IntMig   0xE2 /* Interrupt Migration (0xE2 ~ 0xE3) */
#define	TID_AC_MAP   0xE8 /* TID to AC Mapping Register */
#define	ANAPARAM3   0xEE /* <RJ_TODO_8185B> How to use it? */
#define	AC_VO_PARAM   0xF0 /* AC_VO Parameters Record */
#define	AC_VI_PARAM   0xF4 /* AC_VI Parameters Record */
#define	AC_BE_PARAM   0xF8 /* AC_BE Parameters Record */
#define	AC_BK_PARAM   0xFC /* AC_BK Parameters Record */
#define	GPIOCtrl   0x16B /*GPIO Control Register. */
#define	ARFR   0x1E0 /* Auto Rate Fallback Register (0x1e0 ~ 0x1e2) */
#define	RFSW_CTRL   0x272 /* 0x272-0x273. */
#define	SW_3W_DB0   0x274 /* Software 3-wire data buffer bit 31~0. */
#define	SW_3W_DB1   0x278 /* Software 3-wire data buffer bit 63~32. */
#define	SW_3W_CMD0   0x27C /* Software 3-wire Control/Status Register. */
#define	SW_3W_CMD1   0x27D /* Software 3-wire Control/Status Register. */
#define	PI_DATA_READ   0X360 /* 0x360 - 0x361 Parallel Interface Data Register. */
#define	SI_DATA_READ   0x362 /* 0x362 - 0x363 Serial Interface Data Register. */
#define	TPPOLLSTOP_BQ   (0x01 << 7)
#define	TPPOLLSTOP_AC_VIQ   (0x01 << 4)
#define	MSR_LINK_ENEDCA   (1<<4)
#define	AC_PARAM_TXOP_LIMIT_OFFSET   16
#define	AC_PARAM_ECW_MAX_OFFSET   12
#define	AC_PARAM_ECW_MIN_OFFSET   8
#define	AC_PARAM_AIFS_OFFSET   0
#define	VOQ_ACM_EN   (0x01 << 7) /*BIT7 */
#define	VIQ_ACM_EN   (0x01 << 6) /*BIT6 */
#define	BEQ_ACM_EN   (0x01 << 5) /*BIT5 */
#define	ACM_HW_EN   (0x01 << 4) /*BIT4 */
#define	VOQ_ACM_CTL   (0x01 << 2) /*BIT2 */ /* Set to 1 when AC_VO used time reaches or exceeds the admitted time */
#define	VIQ_ACM_CTL   (0x01 << 1) /*BIT1 */ /* Set to 1 when AC_VI used time reaches or exceeds the admitted time */
#define	BEQ_ACM_CTL   (0x01 << 0) /*BIT0 */ /* Set to 1 when AC_BE used time reaches or exceeds the admitted time */
#define	SW_3W_CMD0_HOLD   ((1 << 7))
#define	SW_3W_CMD1_RE   ((1 << 0)) /* BIT8 */
#define	SW_3W_CMD1_WE   ((1 << 1)) /* BIT9 */
#define	SW_3W_CMD1_DONE   ((1 << 2)) /* BIT10 */
#define	BB_HOST_BANG_RW   (1 << 3)
#define	RATE_FALLBACK_CTL_ENABLE   ((1 << 7))
#define	RATE_FALLBACK_CTL_ENABLE_RTSCTS   ((1 << 6))
#define	RATE_FALLBACK_CTL_AUTO_STEP0   0x00
#define	RATE_FALLBACK_CTL_AUTO_STEP1   0x01
#define	RATE_FALLBACK_CTL_AUTO_STEP2   0x02
#define	RATE_FALLBACK_CTL_AUTO_STEP3   0x03
#define	RTL8225z2_ANAPARAM_OFF   0x55480658
#define	RTL8225z2_ANAPARAM2_OFF   0x72003f70
#define	RF_CHANGE_BY_HW   BIT30
#define	RF_CHANGE_BY_PS   BIT29
#define	RF_CHANGE_BY_IPS   BIT28
#define	EEPROM_SW_REVD_OFFSET   0x3f
#define	EEPROM_SW_AD_MASK   0x0300
#define	EEPROM_SW_AD_ENABLE   0x0100
#define	EEPROM_DEF_ANT_MASK   0x0C00
#define	EEPROM_DEF_ANT_1   0x0400
#define	EEPROM_RSV   0x7C
#define	EEPROM_XTAL_CAL_XOUT_MASK   0x0F /* 0x7C[3:0], Crystal calibration for Xout. */
#define	EEPROM_XTAL_CAL_XIN_MASK   0xF0 /* 0x7C[7:4], Crystal calibration for Xin. */
#define	EEPROM_THERMAL_METER_MASK   0x0F00 /* 0x7D[3:0], Thermal meter reference level. */
#define	EEPROM_XTAL_CAL_ENABLE   0x1000 /* 0x7D[4], Crystal calibration enabled/disabled BIT. */
#define	EEPROM_THERMAL_METER_ENABLE   0x2000 /* 0x7D[5], Thermal meter enabled/disabled BIT. */
#define	EN_LPF_CAL   0x238 /* Enable LPF Calibration. */
#define	PWR_METER_EN   BIT1
#define	CCK_FALSE_ALARM   0xD0
#define	EEPROM_COUNTRY_CODE   0x2E

Macro Definition Documentation

#define AC_BE_PARAM   0xF8 /* AC_BE Parameters Record */

Definition at line 473 of file r8180_hw.h.

#define AC_BK_PARAM   0xFC /* AC_BK Parameters Record */

Definition at line 474 of file r8180_hw.h.

#define AC_PARAM_AIFS_OFFSET   0

Definition at line 506 of file r8180_hw.h.

#define AC_PARAM_ECW_MAX_OFFSET   12

Definition at line 504 of file r8180_hw.h.

#define AC_PARAM_ECW_MIN_OFFSET   8

Definition at line 505 of file r8180_hw.h.

#define AC_PARAM_TXOP_LIMIT_OFFSET   16

Definition at line 503 of file r8180_hw.h.

#define AC_VI_PARAM   0xF4 /* AC_VI Parameters Record */

Definition at line 472 of file r8180_hw.h.

#define AC_VO_PARAM   0xF0 /* AC_VO Parameters Record */

Definition at line 471 of file r8180_hw.h.

#define ACCEPT_ALLMAC_FRAME_SHIFT   0

Definition at line 105 of file r8180_hw.h.

#define ACCEPT_BCAST_FRAME_SHIFT   3

Definition at line 103 of file r8180_hw.h.

#define ACCEPT_CRCERR_FRAME_SHIFT   5

Definition at line 102 of file r8180_hw.h.

#define ACCEPT_CTL_FRAME_SHIFT   19

Definition at line 99 of file r8180_hw.h.

#define ACCEPT_DATA_FRAME_SHIFT   18

Definition at line 100 of file r8180_hw.h.

#define ACCEPT_ICVERR_FRAME_SHIFT   12

Definition at line 101 of file r8180_hw.h.

#define ACCEPT_MCAST_FRAME_SHIFT   2

Definition at line 104 of file r8180_hw.h.

#define ACCEPT_MNG_FRAME_SHIFT   20

Definition at line 98 of file r8180_hw.h.

#define ACCEPT_NICMAC_FRAME_SHIFT   1

Definition at line 106 of file r8180_hw.h.

#define ACCEPT_PWR_FRAME_SHIFT   22

Definition at line 97 of file r8180_hw.h.

#define AckTimeOutReg   0x79 /* ACK timeout register, in unit of 4 us. */

Definition at line 452 of file r8180_hw.h.

#define ACM_CONTROL   0x00BF /* ACM Control Registe */

Definition at line 463 of file r8180_hw.h.

#define ACM_HW_EN   (0x01 << 4) /*BIT4 */

Definition at line 516 of file r8180_hw.h.

#define AGCRESET_SHIFT   5

Definition at line 163 of file r8180_hw.h.

#define ANAPARAM   0x54

Definition at line 142 of file r8180_hw.h.

#define ANAPARAM2   0x60

Definition at line 230 of file r8180_hw.h.

#define ANAPARAM3   0xEE /* <RJ_TODO_8185B> How to use it? */

Definition at line 469 of file r8180_hw.h.

#define ANAPARM2_ASIC_ON   0x000004C6

Definition at line 207 of file r8180_hw.h.

#define ANAPARM2_ON   ANAPARM2_ASIC_ON

Definition at line 210 of file r8180_hw.h.

#define ANAPARM_ASIC_ON   0xB0054D00

Definition at line 206 of file r8180_hw.h.

#define ANAPARM_ON   ANAPARM_ASIC_ON

Definition at line 209 of file r8180_hw.h.

#define ANTSEL   0x9F

Definition at line 461 of file r8180_hw.h.

#define ARFR   0x1E0 /* Auto Rate Fallback Register (0x1e0 ~ 0x1e2) */

Definition at line 477 of file r8180_hw.h.

#define ATIM   0x72

Definition at line 148 of file r8180_hw.h.

#define ATIM_MASK

Value:

((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<7)| \
(1<<8)|(1<<9))

Definition at line 146 of file r8180_hw.h.

#define AtimWnd   0x0072

Definition at line 218 of file r8180_hw.h.

#define AtimWnd_AtimWnd   (0x01FF)

Definition at line 425 of file r8180_hw.h.

#define BB_HOST_BANG_CLK   (1<<1)

Definition at line 53 of file r8180_hw.h.

#define BB_HOST_BANG_EN   (1<<2)

Definition at line 52 of file r8180_hw.h.

#define BB_HOST_BANG_RW   (1 << 3)

Definition at line 532 of file r8180_hw.h.

#define BcnItv   0x0070

Definition at line 216 of file r8180_hw.h.

#define BcnItv_BcnItv   (0x01FF)

Definition at line 423 of file r8180_hw.h.

#define BEACON_INTERVAL   0x70

Definition at line 143 of file r8180_hw.h.

#define BEACON_INTERVAL_MASK

Value:

((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)| \
(1<<6)|(1<<7)|(1<<8)|(1<<9))

Definition at line 144 of file r8180_hw.h.

#define BEQ_ACM_CTL   (0x01 << 0) /*BIT0 */ /* Set to 1 when AC_BE used time reaches or exceeds the admitted time */

Definition at line 519 of file r8180_hw.h.

#define BEQ_ACM_EN   (0x01 << 5) /*BIT5 */

Definition at line 515 of file r8180_hw.h.

#define BintrItv   0x0074

Definition at line 220 of file r8180_hw.h.

#define BintrItv_BintrItv   (0x01FF)

Definition at line 427 of file r8180_hw.h.

#define BIT0   0x00000001

Definition at line 24 of file r8180_hw.h.

#define BIT1   0x00000002

Definition at line 25 of file r8180_hw.h.

#define BIT11   0x00000800

Definition at line 33 of file r8180_hw.h.

#define BIT13   0x00002000

Definition at line 34 of file r8180_hw.h.

#define BIT15   0x00008000

Definition at line 35 of file r8180_hw.h.

#define BIT2   0x00000004

Definition at line 26 of file r8180_hw.h.

#define BIT20   0x00100000

Definition at line 36 of file r8180_hw.h.

#define BIT21   0x00200000

Definition at line 37 of file r8180_hw.h.

#define BIT22   0x00400000

Definition at line 38 of file r8180_hw.h.

#define BIT23   0x00800000

Definition at line 39 of file r8180_hw.h.

#define BIT24   0x01000000

Definition at line 40 of file r8180_hw.h.

#define BIT25   0x02000000

Definition at line 41 of file r8180_hw.h.

#define BIT26   0x04000000

Definition at line 42 of file r8180_hw.h.

#define BIT27   0x08000000

Definition at line 43 of file r8180_hw.h.

#define BIT28   0x10000000

Definition at line 44 of file r8180_hw.h.

#define BIT29   0x20000000

Definition at line 45 of file r8180_hw.h.

#define BIT3   0x00000008

Definition at line 27 of file r8180_hw.h.

#define BIT30   0x40000000

Definition at line 46 of file r8180_hw.h.

#define BIT31   0x80000000

Definition at line 47 of file r8180_hw.h.

#define BIT4   0x00000010

Definition at line 28 of file r8180_hw.h.

#define BIT5   0x00000020

Definition at line 29 of file r8180_hw.h.

#define BIT6   0x00000040

Definition at line 30 of file r8180_hw.h.

#define BIT7   0x00000080

Definition at line 31 of file r8180_hw.h.

#define BIT9   0x00000200

Definition at line 32 of file r8180_hw.h.

#define BRSR   0x34 /* Basic rate set */

Definition at line 184 of file r8180_hw.h.

#define BRSR_BPLCP   ((1 << 8))

Definition at line 277 of file r8180_hw.h.

#define BRSR_MBR   ((1 << 1)|(1 << 0))

Definition at line 278 of file r8180_hw.h.

#define BRSR_MBR0   ((1 << 0))

Definition at line 280 of file r8180_hw.h.

#define BRSR_MBR1   ((1 << 1))

Definition at line 281 of file r8180_hw.h.

#define BRSR_MBR_8185   ((1 << 11)|(1 << 10)|(1 << 9)|(1 << 8)|(1 << 7)|(1 << 6)|(1 << 5)|(1 << 4)|(1 << 3)|(1 << 2)|(1 << 1)|(1 << 0))

Definition at line 279 of file r8180_hw.h.

#define BSSID   0x002E

Definition at line 176 of file r8180_hw.h.

#define CCK_FALSE_ALARM   0xD0

Definition at line 581 of file r8180_hw.h.

#define CCK_TXAGC   0x9D

Definition at line 459 of file r8180_hw.h.

#define CMD   0x37

Definition at line 58 of file r8180_hw.h.

#define CMD_RST_SHIFT   4

Definition at line 59 of file r8180_hw.h.

#define CMD_RX_ENABLE_SHIFT   3

Definition at line 60 of file r8180_hw.h.

#define CMD_TX_ENABLE_SHIFT   2

Definition at line 61 of file r8180_hw.h.

#define CONFIG0   0x0051

Definition at line 197 of file r8180_hw.h.

#define CONFIG0_WEP104_SHIFT   6

Definition at line 162 of file r8180_hw.h.

#define CONFIG0_WEP40_SHIFT   7

Definition at line 161 of file r8180_hw.h.

#define CONFIG2   0x0053

Definition at line 198 of file r8180_hw.h.

#define CONFIG2_ANTENNA_SHIFT   6

Definition at line 159 of file r8180_hw.h.

#define CONFIG2_DMA_POLLING_MODE_SHIFT   3

Definition at line 75 of file r8180_hw.h.

#define CONFIG3   0x0059

Definition at line 202 of file r8180_hw.h.

#define CONFIG3_ANAPARAM_W_SHIFT   6

Definition at line 141 of file r8180_hw.h.

#define CONFIG3_CLKRUN_SHIFT   2

Definition at line 140 of file r8180_hw.h.

#define CONFIG3_FuncRegEn   ((1 << 1))

Definition at line 412 of file r8180_hw.h.

#define CONFIG3_PARM_En   ((1 << 6))

Definition at line 411 of file r8180_hw.h.

#define CONFIG4   0x005A

Definition at line 203 of file r8180_hw.h.

#define CONFIG4_PWRMGT   ((1 << 5))

Definition at line 414 of file r8180_hw.h.

#define CONFIG5   0x00D8

Definition at line 257 of file r8180_hw.h.

#define CR   0x0037

Definition at line 178 of file r8180_hw.h.

#define CR9346   0x0050

Definition at line 195 of file r8180_hw.h.

#define CR9346_EECS   ((1 << 3))

Definition at line 406 of file r8180_hw.h.

#define CR9346_EED0   ((1 << 0))

Definition at line 409 of file r8180_hw.h.

#define CR9346_EED1   ((1 << 1))

Definition at line 408 of file r8180_hw.h.

#define CR9346_EEM   ((1 << 7)|(1 << 6))

Definition at line 403 of file r8180_hw.h.

#define CR9346_EEM0   ((1 << 6))

Definition at line 405 of file r8180_hw.h.

#define CR9346_EEM1   ((1 << 7))

Definition at line 404 of file r8180_hw.h.

#define CR9346_EESK   ((1 << 2))

Definition at line 407 of file r8180_hw.h.

#define CR_MulRW   ((1 << 0))

Definition at line 286 of file r8180_hw.h.

#define CR_RE   ((1 << 3))

Definition at line 284 of file r8180_hw.h.

#define CR_RST   ((1 << 4))

Definition at line 283 of file r8180_hw.h.

#define CR_TE   ((1 << 2))

Definition at line 285 of file r8180_hw.h.

#define CW_CONF   0xbc

Definition at line 249 of file r8180_hw.h.

#define CW_CONF_PERPACKET_CW_SHIFT   0

Definition at line 251 of file r8180_hw.h.

#define CW_CONF_PERPACKET_RETRY_SHIFT   1

Definition at line 250 of file r8180_hw.h.

#define CW_VAL   0xbd

Definition at line 252 of file r8180_hw.h.

#define DIFS   0xb5

Definition at line 246 of file r8180_hw.h.

#define EEPROM_COUNTRY_CODE   0x2E

Definition at line 585 of file r8180_hw.h.

#define EEPROM_DEF_ANT_1   0x0400

Definition at line 568 of file r8180_hw.h.

#define EEPROM_DEF_ANT_MASK   0x0C00

Definition at line 567 of file r8180_hw.h.

#define EEPROM_RSV   0x7C

Definition at line 572 of file r8180_hw.h.

#define EEPROM_SW_AD_ENABLE   0x0100

Definition at line 562 of file r8180_hw.h.

#define EEPROM_SW_AD_MASK   0x0300

Definition at line 561 of file r8180_hw.h.

#define EEPROM_SW_REVD_OFFSET   0x3f

Definition at line 556 of file r8180_hw.h.

#define EEPROM_THERMAL_METER_ENABLE   0x2000 /* 0x7D[5], Thermal meter enabled/disabled BIT. */

Definition at line 577 of file r8180_hw.h.

#define EEPROM_THERMAL_METER_MASK   0x0F00 /* 0x7D[3:0], Thermal meter reference level. */

Definition at line 575 of file r8180_hw.h.

#define EEPROM_XTAL_CAL_ENABLE   0x1000 /* 0x7D[4], Crystal calibration enabled/disabled BIT. */

Definition at line 576 of file r8180_hw.h.

#define EEPROM_XTAL_CAL_XIN_MASK   0xF0 /* 0x7C[7:4], Crystal calibration for Xin. */

Definition at line 574 of file r8180_hw.h.

#define EEPROM_XTAL_CAL_XOUT_MASK   0x0F /* 0x7C[3:0], Crystal calibration for Xout. */

Definition at line 573 of file r8180_hw.h.

#define EIFS   0x2D /* Extended InterFrame Space Timer, in unit of 4 us. */

Definition at line 182 of file r8180_hw.h.

#define EN_LPF_CAL   0x238 /* Enable LPF Calibration. */

Definition at line 578 of file r8180_hw.h.

#define EPROM_CK_SHIFT   2

Definition at line 150 of file r8180_hw.h.

#define EPROM_CK_SHIFT   2

Definition at line 150 of file r8180_hw.h.

#define EPROM_CMD   0x50

Definition at line 63 of file r8180_hw.h.

#define EPROM_CMD_CONFIG   0x3

Definition at line 67 of file r8180_hw.h.

#define EPROM_CMD_LOAD   1

Definition at line 69 of file r8180_hw.h.

#define EPROM_CMD_NORMAL   0

Definition at line 68 of file r8180_hw.h.

#define EPROM_CMD_OPERATING_MODE_MASK   ((1<<7)|(1<<6))

Definition at line 66 of file r8180_hw.h.

#define EPROM_CMD_OPERATING_MODE_SHIFT   6

Definition at line 65 of file r8180_hw.h.

#define EPROM_CMD_PROGRAM   2

Definition at line 70 of file r8180_hw.h.

#define EPROM_CMD_RESERVED_MASK   ((1<<5)|(1<<4))

Definition at line 64 of file r8180_hw.h.

#define EPROM_CS_SHIFT   3

Definition at line 149 of file r8180_hw.h.

#define EPROM_CS_SHIFT   3

Definition at line 149 of file r8180_hw.h.

#define EPROM_R_SHIFT   0

Definition at line 74 of file r8180_hw.h.

#define EPROM_W_SHIFT   1

Definition at line 73 of file r8180_hw.h.

#define FEMR   0x1D4 /* Function Event Mask register */

Definition at line 261 of file r8180_hw.h.

#define FEMR_GWAKE   ((1 << 4))

Definition at line 431 of file r8180_hw.h.

#define FEMR_INTR   ((1 << 15))

Definition at line 429 of file r8180_hw.h.

#define FEMR_WKUP   ((1 << 14))

Definition at line 430 of file r8180_hw.h.

#define FFER   0x00FC

Definition at line 263 of file r8180_hw.h.

#define FFER_END   0x00FF

Definition at line 264 of file r8180_hw.h.

#define FFER_GWAKE   ((1 << 4))

Definition at line 434 of file r8180_hw.h.

#define FFER_INTR   ((1 << 15))

Definition at line 433 of file r8180_hw.h.

#define GP_ENABLE   0x90

Definition at line 233 of file r8180_hw.h.

#define GPIO   0x91

Definition at line 234 of file r8180_hw.h.

#define GPIOCtrl   0x16B /*GPIO Control Register. */

Definition at line 476 of file r8180_hw.h.

#define HW_THREE_WIRE   2

Definition at line 438 of file r8180_hw.h.

#define HW_THREE_WIRE_PI   5

Definition at line 440 of file r8180_hw.h.

#define HW_THREE_WIRE_SI   6

Definition at line 441 of file r8180_hw.h.

#define HW_VERID_R8180_ABCD   2

Definition at line 352 of file r8180_hw.h.

#define HW_VERID_R8180_F   3

Definition at line 351 of file r8180_hw.h.

#define HW_VERID_R8185_ABC   4

Definition at line 353 of file r8180_hw.h.

#define HW_VERID_R8185_D   5

Definition at line 354 of file r8180_hw.h.

#define HW_VERID_R8185B_B   6

Definition at line 355 of file r8180_hw.h.

#define IMR   0x006C

Definition at line 186 of file r8180_hw.h.

#define IMR_ATIMInt   ((1 << 19)) /*ATIM Time Out Interrupt */

Definition at line 294 of file r8180_hw.h.

#define IMR_BcnDmaInt   ((1 << 24)) /*Beacon DMA Interrupt */ /*What differenct between BcnDmaInt and BcnInt??? */

Definition at line 289 of file r8180_hw.h.

#define IMR_BcnInt   ((1 << 20)) /*Beacon Time out Interrupt */

Definition at line 293 of file r8180_hw.h.

#define IMR_Dot11hInt   ((1 << 25)) /*802.11h Measurement Interrupt */

Definition at line 288 of file r8180_hw.h.

#define IMR_FOVW   ((1 << 12)) /*Rx FIFO Overflow Interrupt */

Definition at line 301 of file r8180_hw.h.

#define IMR_RDU   ((1 << 11)) /*Rx Descriptor Unavailable Interrupt */

Definition at line 302 of file r8180_hw.h.

#define IMR_RER   ((1 << 8)) /*Rx Error Interrupt */

Definition at line 305 of file r8180_hw.h.

#define IMR_ROK   ((1 << 7)) /*Receive OK Interrupt */

Definition at line 306 of file r8180_hw.h.

#define IMR_RQoSOK   ((1 << 2)) /*Rx QoS OK Interrupt */

Definition at line 311 of file r8180_hw.h.

#define IMR_TBDER   ((1 << 18)) /*Tx Beacon Descriptor Error Interrupt */

Definition at line 295 of file r8180_hw.h.

#define IMR_TBDOK   ((1 << 17)) /*Tx Beacon Descriptor OK Interrupt */

Definition at line 296 of file r8180_hw.h.

#define IMR_TBEDER   ((1 << 6)) /*Tx AC_BE Descriptor Error Interrupt */

Definition at line 307 of file r8180_hw.h.

#define IMR_TBEDOK   ((1 << 5)) /*Tx AC_BE Descriptor OK Interrupt */

Definition at line 308 of file r8180_hw.h.

#define IMR_TBKDER   ((1 << 4)) /*Tx AC_BK Descriptor Error Interrupt */

Definition at line 309 of file r8180_hw.h.

#define IMR_TBKDOK   ((1 << 3)) /*Tx AC_BK Descriptor OK Interrupt */

Definition at line 310 of file r8180_hw.h.

#define IMR_THPDER   ((1 << 16)) /*Tx High Priority Descriptor Error Interrupt */

Definition at line 297 of file r8180_hw.h.

#define IMR_THPDOK   ((1 << 15)) /*Tx High Priority Descriptor OK Interrupt */

Definition at line 298 of file r8180_hw.h.

#define IMR_TimeOut1   ((1 << 21)) /*Time Out Interrupt 1 */

Definition at line 292 of file r8180_hw.h.

#define IMR_TimeOut2   ((1 << 1)) /*Time Out Interrupt 2 */

Definition at line 312 of file r8180_hw.h.

#define IMR_TimeOut3   ((1 << 0)) /*Time Out Interrupt 3 */

Definition at line 313 of file r8180_hw.h.

#define IMR_TMGDOK   ((1 << 30))

Definition at line 314 of file r8180_hw.h.

#define IMR_TVIDER   ((1 << 10)) /*Tx AC_VI Descriptor Error Interrupt */

Definition at line 303 of file r8180_hw.h.

#define IMR_TVIDOK   ((1 << 9)) /*Tx AC_VI Descriptor OK Interrupt */

Definition at line 304 of file r8180_hw.h.

#define IMR_TVODER   ((1 << 14)) /*Tx AC_VO Descriptor Error Interrupt */

Definition at line 299 of file r8180_hw.h.

#define IMR_TVODOK   ((1 << 13)) /*Tx AC_VO Descriptor OK Interrupt */

Definition at line 300 of file r8180_hw.h.

#define IMR_TXFOVW   ((1 << 22)) /*Tx FIFO Overflow Interrupt */

Definition at line 291 of file r8180_hw.h.

#define IMR_WakeInt   ((1 << 23)) /*Wake Up Interrupt */

Definition at line 290 of file r8180_hw.h.

#define INT_TIMEOUT   0x48

Definition at line 139 of file r8180_hw.h.

#define INTA_HIPRIORITYDESCERR   (1<<9)

Definition at line 79 of file r8180_hw.h.

#define INTA_HIPRIORITYDESCOK   (1<<8)

Definition at line 80 of file r8180_hw.h.

#define INTA_LOWPRIORITYDESCERR   (1<<3)

Definition at line 85 of file r8180_hw.h.

#define INTA_LOWPRIORITYDESCOK   (1<<2)

Definition at line 86 of file r8180_hw.h.

#define INTA_MASK   0x3c

Definition at line 88 of file r8180_hw.h.

#define INTA_NORMPRIORITYDESCERR   (1<<7)

Definition at line 81 of file r8180_hw.h.

#define INTA_NORMPRIORITYDESCOK   (1<<6)

Definition at line 82 of file r8180_hw.h.

#define INTA_RXDESCERR   (1<<4)

Definition at line 84 of file r8180_hw.h.

#define INTA_RXOK   (1)

Definition at line 87 of file r8180_hw.h.

#define INTA_RXOVERFLOW   (1<<5)

Definition at line 83 of file r8180_hw.h.

#define INTA_TIMEOUT   (1<<14)

Definition at line 78 of file r8180_hw.h.

#define INTA_TXOVERFLOW   (1<<15)

Definition at line 77 of file r8180_hw.h.

#define IntMig   0xE2 /* Interrupt Migration (0xE2 ~ 0xE3) */

Definition at line 465 of file r8180_hw.h.

#define ISR   0x003C

Definition at line 187 of file r8180_hw.h.

#define ISR_ATIMInt   ((1 << 19)) /*ATIM Time Out Interrupt */

Definition at line 321 of file r8180_hw.h.

#define ISR_BcnDmaInt   ((1 << 24)) /*Beacon DMA Interrupt */ /*What differenct between BcnDmaInt and BcnInt??? */

Definition at line 316 of file r8180_hw.h.

#define ISR_BcnInt   ((1 << 20)) /*Beacon Time out Interrupt */

Definition at line 320 of file r8180_hw.h.

#define ISR_Dot11hInt   ((1 << 25)) /*802.11h Measurement Interrupt */

Definition at line 315 of file r8180_hw.h.

#define ISR_FOVW   ((1 << 12)) /*Rx FIFO Overflow Interrupt */

Definition at line 328 of file r8180_hw.h.

#define ISR_RDU   ((1 << 11)) /*Rx Descriptor Unavailable Interrupt */

Definition at line 329 of file r8180_hw.h.

#define ISR_RER   ((1 << 8)) /*Rx Error Interrupt */

Definition at line 332 of file r8180_hw.h.

#define ISR_ROK   ((1 << 7)) /*Receive OK Interrupt */

Definition at line 333 of file r8180_hw.h.

#define ISR_RQoSOK   ((1 << 2)) /*Rx QoS OK Interrupt */

Definition at line 338 of file r8180_hw.h.

#define ISR_RXFOVW   ISR_FOVW

Definition at line 348 of file r8180_hw.h.

#define ISR_TBDER   ((1 << 18)) /*Tx Beacon Descriptor Error Interrupt */

Definition at line 322 of file r8180_hw.h.

#define ISR_TBDOK   ((1 << 17)) /*Tx Beacon Descriptor OK Interrupt */

Definition at line 323 of file r8180_hw.h.

#define ISR_TBEDER   ((1 << 6)) /*Tx AC_BE Descriptor Error Interrupt */

Definition at line 334 of file r8180_hw.h.

#define ISR_TBEDOK   ((1 << 5)) /*Tx AC_BE Descriptor OK Interrupt */

Definition at line 335 of file r8180_hw.h.

#define ISR_TBKDER   ((1 << 4)) /*Tx AC_BK Descriptor Error Interrupt */

Definition at line 336 of file r8180_hw.h.

#define ISR_TBKDOK   ((1 << 3)) /*Tx AC_BK Descriptor OK Interrupt */

Definition at line 337 of file r8180_hw.h.

#define ISR_THPDER   ((1 << 16)) /*Tx High Priority Descriptor Error Interrupt */

Definition at line 324 of file r8180_hw.h.

#define ISR_THPDOK   ((1 << 15)) /*Tx High Priority Descriptor OK Interrupt */

Definition at line 325 of file r8180_hw.h.

#define ISR_TimeOut   ISR_TimeOut1

Definition at line 347 of file r8180_hw.h.

#define ISR_TimeOut1   ((1 << 21)) /*Time Out Interrupt 1 */

Definition at line 319 of file r8180_hw.h.

#define ISR_TimeOut2   ((1 << 1)) /*Time Out Interrupt 2 */

Definition at line 339 of file r8180_hw.h.

#define ISR_TimeOut3   ((1 << 0)) /*Time Out Interrupt 3 */

Definition at line 340 of file r8180_hw.h.

#define ISR_TLPDER   ISR_TVIDER

Definition at line 343 of file r8180_hw.h.

#define ISR_TLPDOK   ISR_TVIDOK

Definition at line 344 of file r8180_hw.h.

#define ISR_TNPDER   ISR_TVODER

Definition at line 345 of file r8180_hw.h.

#define ISR_TNPDOK   ISR_TVODOK

Definition at line 346 of file r8180_hw.h.

#define ISR_TVIDER   ((1 << 10)) /*Tx AC_VI Descriptor Error Interrupt */

Definition at line 330 of file r8180_hw.h.

#define ISR_TVIDOK   ((1 << 9)) /*Tx AC_VI Descriptor OK Interrupt */

Definition at line 331 of file r8180_hw.h.

#define ISR_TVODER   ((1 << 14)) /*Tx AC_VO Descriptor Error Interrupt */

Definition at line 326 of file r8180_hw.h.

#define ISR_TVODOK   ((1 << 13)) /*Tx AC_VO Descriptor OK Interrupt */

Definition at line 327 of file r8180_hw.h.

#define ISR_TXFOVW   ((1 << 22)) /*Tx FIFO Overflow Interrupt */

Definition at line 318 of file r8180_hw.h.

#define ISR_WakeInt   ((1 << 23)) /*Wake Up Interrupt */

Definition at line 317 of file r8180_hw.h.

#define KEY0   0x90 /* 1209 this is sth wrong */

Definition at line 158 of file r8180_hw.h.

#define MAC0   0

Definition at line 55 of file r8180_hw.h.

#define MAC4   4

Definition at line 56 of file r8180_hw.h.

#define MAC_FILTER_MASK

Value:

((1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<5) | \
(1<<12) | (1<<18) | (1<<19) | (1<<20) | (1<<21) | (1<<22) | (1<<23))

Definition at line 94 of file r8180_hw.h.

#define MAX_RESP_RATE_SHIFT   4

Definition at line 253 of file r8180_hw.h.

#define MAX_RX_DMA_1024   6

Definition at line 137 of file r8180_hw.h.

#define MAX_RX_DMA_2048   7

Definition at line 136 of file r8180_hw.h.

#define MAX_RX_DMA_MASK   ((1<<8) | (1<<9) | (1<<10))

Definition at line 135 of file r8180_hw.h.

#define MAX_RX_DMA_SHIFT   10

Definition at line 138 of file r8180_hw.h.

#define MAX_SLEEP_TIME   (10000)

Definition at line 49 of file r8180_hw.h.

#define MIN_RESP_RATE_SHIFT   0

Definition at line 254 of file r8180_hw.h.

#define MIN_SLEEP_TIME   (50)

Definition at line 50 of file r8180_hw.h.

#define MSR   0x0058

Definition at line 200 of file r8180_hw.h.

#define MSR_LINK_ADHOC   1

Definition at line 420 of file r8180_hw.h.

#define MSR_LINK_ENEDCA   (1<<4)

Definition at line 496 of file r8180_hw.h.

#define MSR_LINK_MANAGED   2

Definition at line 417 of file r8180_hw.h.

#define MSR_LINK_MASK   ((1 << 2)|(1 << 3))

Definition at line 416 of file r8180_hw.h.

#define MSR_LINK_MASTER   3

Definition at line 421 of file r8180_hw.h.

#define MSR_LINK_NONE   0

Definition at line 418 of file r8180_hw.h.

#define MSR_LINK_SHIFT   2

Definition at line 419 of file r8180_hw.h.

#define OFDM_TXAGC   0x9E

Definition at line 460 of file r8180_hw.h.

#define PGSELECT   0x5e

Definition at line 91 of file r8180_hw.h.

#define PGSELECT_PG_SHIFT   0

Definition at line 92 of file r8180_hw.h.

#define PHY_ADR   0x7c

Definition at line 151 of file r8180_hw.h.

#define PhyAddr   0x007C

Definition at line 222 of file r8180_hw.h.

#define PhyDataR   0x007E

Definition at line 223 of file r8180_hw.h.

#define PHYPR   0xDA /* 0xDA - 0x0B PHY Parameter Register. */

Definition at line 259 of file r8180_hw.h.

#define PI_DATA_READ   0X360 /* 0x360 - 0x361 Parallel Interface Data Register. */

Definition at line 485 of file r8180_hw.h.

#define PSR   0x005E

Definition at line 214 of file r8180_hw.h.

#define PWR_METER_EN   BIT1

Definition at line 579 of file r8180_hw.h.

#define R8180_MAX_RETRY   255

Definition at line 120 of file r8180_hw.h.

#define RATE_FALLBACK   0xbe

Definition at line 255 of file r8180_hw.h.

#define RATE_FALLBACK_CTL_AUTO_STEP0   0x00

Definition at line 542 of file r8180_hw.h.

#define RATE_FALLBACK_CTL_AUTO_STEP1   0x01

Definition at line 543 of file r8180_hw.h.

#define RATE_FALLBACK_CTL_AUTO_STEP2   0x02

Definition at line 544 of file r8180_hw.h.

#define RATE_FALLBACK_CTL_AUTO_STEP3   0x03

Definition at line 545 of file r8180_hw.h.

#define RATE_FALLBACK_CTL_ENABLE   ((1 << 7))

Definition at line 539 of file r8180_hw.h.

#define RATE_FALLBACK_CTL_ENABLE_RTSCTS   ((1 << 6))

Definition at line 540 of file r8180_hw.h.

#define RCR   0x0044

Definition at line 191 of file r8180_hw.h.

#define RCR_9356SEL   ((1 << 6))

Definition at line 396 of file r8180_hw.h.

#define RCR_AAP   ((1 << 0))

Definition at line 401 of file r8180_hw.h.

#define RCR_AB   ((1 << 3))

Definition at line 398 of file r8180_hw.h.

#define RCR_ACF   ((1 << 19))

Definition at line 385 of file r8180_hw.h.

#define RCR_ACRC32   ((1 << 5))

Definition at line 397 of file r8180_hw.h.

#define RCR_ADD3   ((1 << 21))

Definition at line 383 of file r8180_hw.h.

#define RCR_ADF   ((1 << 18))

Definition at line 386 of file r8180_hw.h.

#define RCR_AICV   ((1 << 12))

Definition at line 391 of file r8180_hw.h.

#define RCR_AM   ((1 << 2))

Definition at line 399 of file r8180_hw.h.

#define RCR_AMF   ((1 << 20))

Definition at line 384 of file r8180_hw.h.

#define RCR_APM   ((1 << 1))

Definition at line 400 of file r8180_hw.h.

#define RCR_APWRMGT   ((1 << 22))

Definition at line 382 of file r8180_hw.h.

#define RCR_CBSSID   ((1 << 23))

Definition at line 381 of file r8180_hw.h.

#define RCR_CS_MASK   ((1 << 30) | (1 << 29))

Definition at line 379 of file r8180_hw.h.

#define RCR_CS_SHIFT   29

Definition at line 378 of file r8180_hw.h.

#define RCR_ENMARP   ((1 << 28))

Definition at line 380 of file r8180_hw.h.

#define RCR_FIFO_OFFSET   13

Definition at line 450 of file r8180_hw.h.

#define RCR_MXDMA   ((1 << 10)|(1 << 9)|(1 << 8))

Definition at line 392 of file r8180_hw.h.

#define RCR_MXDMA0   ((1 << 8))

Definition at line 395 of file r8180_hw.h.

#define RCR_MXDMA1   ((1 << 9))

Definition at line 394 of file r8180_hw.h.

#define RCR_MXDMA2   ((1 << 10))

Definition at line 393 of file r8180_hw.h.

#define RCR_MXDMA_OFFSET   8

Definition at line 449 of file r8180_hw.h.

#define RCR_ONLYERLPKT   ((1 << 31))

Definition at line 377 of file r8180_hw.h.

#define RCR_RXFTH   ((1 << 15)|(1 << 14)|(1 << 13))

Definition at line 387 of file r8180_hw.h.

#define RCR_RXFTH0   ((1 << 13))

Definition at line 390 of file r8180_hw.h.

#define RCR_RXFTH1   ((1 << 14))

Definition at line 389 of file r8180_hw.h.

#define RCR_RXFTH2   ((1 << 15))

Definition at line 388 of file r8180_hw.h.

#define RESP_RATE   0x34

Definition at line 244 of file r8180_hw.h.

#define RF_CHANGE_BY_HW   BIT30

Definition at line 551 of file r8180_hw.h.

#define RF_CHANGE_BY_IPS   BIT28

Definition at line 553 of file r8180_hw.h.

#define RF_CHANGE_BY_PS   BIT29

Definition at line 552 of file r8180_hw.h.

#define RF_PARA   0x88

Definition at line 231 of file r8180_hw.h.

#define RF_SW_CFG_SI   BIT1

Definition at line 181 of file r8180_hw.h.

#define RF_SW_CONFIG   0x8 /* store data which is transmitted to RF for driver */

Definition at line 180 of file r8180_hw.h.

#define RF_TIMING   0x8c

Definition at line 228 of file r8180_hw.h.

#define RFPinsEnable   0x82

Definition at line 227 of file r8180_hw.h.

#define RFPinsInput   0x86

Definition at line 232 of file r8180_hw.h.

#define RFPinsOutput   0x80

Definition at line 226 of file r8180_hw.h.

#define RFPinsSelect   0x84

Definition at line 229 of file r8180_hw.h.

#define RFSW_CTRL   0x272 /* 0x272-0x273. */

Definition at line 479 of file r8180_hw.h.

#define RFTiming   0x8C

Definition at line 454 of file r8180_hw.h.

#define RTL8225z2_ANAPARAM2_OFF   0x72003f70

Definition at line 549 of file r8180_hw.h.

#define RTL8225z2_ANAPARAM_OFF   0x55480658

Definition at line 548 of file r8180_hw.h.

#define RX_AUTORESETPHY_SHIFT   28

Definition at line 111 of file r8180_hw.h.

#define RX_CHECK_BSSID_SHIFT   23

Definition at line 96 of file r8180_hw.h.

#define RX_CONF   0x44

Definition at line 93 of file r8180_hw.h.

#define RX_FIFO_THRESHOLD_MASK   ((1<<13) | (1<<14) | (1<<15))

Definition at line 108 of file r8180_hw.h.

#define RX_FIFO_THRESHOLD_NONE   7

Definition at line 110 of file r8180_hw.h.

#define RX_FIFO_THRESHOLD_SHIFT   13

Definition at line 109 of file r8180_hw.h.

#define RXRING_ADDR   0xe4 /* page 0 */

Definition at line 90 of file r8180_hw.h.

#define SECURITY   0x5f /* 1209 this is sth wrong */

Definition at line 152 of file r8180_hw.h.

#define SECURITY_ENCRYP_104   1

Definition at line 155 of file r8180_hw.h.

#define SECURITY_ENCRYP_MASK   ((1<<4)|(1<<5))

Definition at line 157 of file r8180_hw.h.

#define SECURITY_ENCRYP_SHIFT   4

Definition at line 156 of file r8180_hw.h.

#define SECURITY_WEP_RX_ENABLE_SHIFT   0

Definition at line 154 of file r8180_hw.h.

#define SECURITY_WEP_TX_ENABLE_SHIFT   1

Definition at line 153 of file r8180_hw.h.

#define SI_DATA_READ   0x362 /* 0x362 - 0x363 Serial Interface Data Register. */

Definition at line 486 of file r8180_hw.h.

#define SIFS   0xb4

Definition at line 245 of file r8180_hw.h.

#define SLOT   0xb6

Definition at line 248 of file r8180_hw.h.

#define SW_3W_CMD0   0x27C /* Software 3-wire Control/Status Register. */

Definition at line 482 of file r8180_hw.h.

#define SW_3W_CMD0_HOLD   ((1 << 7))

Definition at line 527 of file r8180_hw.h.

#define SW_3W_CMD1   0x27D /* Software 3-wire Control/Status Register. */

Definition at line 483 of file r8180_hw.h.

#define SW_3W_CMD1_DONE   ((1 << 2)) /* BIT10 */

Definition at line 530 of file r8180_hw.h.

#define SW_3W_CMD1_RE   ((1 << 0)) /* BIT8 */

Definition at line 528 of file r8180_hw.h.

#define SW_3W_CMD1_WE   ((1 << 1)) /* BIT9 */

Definition at line 529 of file r8180_hw.h.

#define SW_3W_DB0   0x274 /* Software 3-wire data buffer bit 31~0. */

Definition at line 480 of file r8180_hw.h.

#define SW_3W_DB1   0x278 /* Software 3-wire data buffer bit 63~32. */

Definition at line 481 of file r8180_hw.h.

#define SW_CONTROL_GPIO   0x400

Definition at line 235 of file r8180_hw.h.

#define SW_THREE_WIRE   0

Definition at line 437 of file r8180_hw.h.

#define TCR   0x0040

Definition at line 189 of file r8180_hw.h.

#define TCR_CRC   ((1 << 16))

Definition at line 372 of file r8180_hw.h.

#define TCR_CWMIN   ((1 << 31))

Definition at line 357 of file r8180_hw.h.

#define TCR_DISCW   ((1 << 20))

Definition at line 367 of file r8180_hw.h.

#define TCR_DISReqQsize_OFFSET   28

Definition at line 446 of file r8180_hw.h.

#define TCR_DPRETRY_MASK   ((1 << 15)|(1 << 14)|(1 << 13)|(1 << 12)|(1 << 11)|(1 << 10)|(1 << 9)|(1 << 8))

Definition at line 373 of file r8180_hw.h.

#define TCR_DurProcMode_OFFSET   30

Definition at line 447 of file r8180_hw.h.

#define TCR_HWVERID_MASK   ((1 << 27)|(1 << 26)|(1 << 25))

Definition at line 359 of file r8180_hw.h.

#define TCR_HWVERID_SHIFT   25

Definition at line 360 of file r8180_hw.h.

#define TCR_ICV   ((1 << 19))

Definition at line 368 of file r8180_hw.h.

#define TCR_LBK   ((1 << 18)|(1 << 17))

Definition at line 369 of file r8180_hw.h.

#define TCR_LBK0   ((1 << 17))

Definition at line 371 of file r8180_hw.h.

#define TCR_LBK1   ((1 << 18))

Definition at line 370 of file r8180_hw.h.

#define TCR_LRL_OFFSET   0

Definition at line 443 of file r8180_hw.h.

#define TCR_MXDMA_1024   6

Definition at line 364 of file r8180_hw.h.

#define TCR_MXDMA_2048   7

Definition at line 365 of file r8180_hw.h.

#define TCR_MXDMA_MASK   ((1 << 23)|(1 << 22)|(1 << 21))

Definition at line 363 of file r8180_hw.h.

#define TCR_MXDMA_OFFSET   21

Definition at line 445 of file r8180_hw.h.

#define TCR_MXDMA_SHIFT   21

Definition at line 366 of file r8180_hw.h.

#define TCR_PLCP_LEN   TCR_SAT /* rtl8180 */

Definition at line 362 of file r8180_hw.h.

#define TCR_PROBE_NOTIMESTAMP_SHIFT   29 /* rtl8185 */

Definition at line 375 of file r8180_hw.h.

#define TCR_RTSRETRY_MASK   ((1 << 0)|(1 << 1)|(1 << 2)|(1 << 3)|(1 << 4)|(1 << 5)|(1 << 6)|(1 << 7))

Definition at line 374 of file r8180_hw.h.

#define TCR_SAT   ((1 << 24))

Definition at line 361 of file r8180_hw.h.

#define TCR_SRL_OFFSET   8

Definition at line 444 of file r8180_hw.h.

#define TCR_SWSEQ   ((1 << 30))

Definition at line 358 of file r8180_hw.h.

#define TESTR   0x005B

Definition at line 212 of file r8180_hw.h.

#define TID_AC_MAP   0xE8 /* TID to AC Mapping Register */

Definition at line 467 of file r8180_hw.h.

#define TimerInt   0x0048

Definition at line 193 of file r8180_hw.h.

#define TLPDA   0x0020

Definition at line 174 of file r8180_hw.h.

#define TPPollStop   0x93

Definition at line 456 of file r8180_hw.h.

#define TPPOLLSTOP_AC_VIQ   (0x01 << 4)

Definition at line 494 of file r8180_hw.h.

#define TPPOLLSTOP_BQ   (0x01 << 7)

Definition at line 493 of file r8180_hw.h.

#define TSFTR   0x0018

Definition at line 172 of file r8180_hw.h.

#define TX_AGC_CTL   0x9c

Definition at line 240 of file r8180_hw.h.

#define TX_AGC_CTL_FEEDBACK_ANT   2

Definition at line 243 of file r8180_hw.h.

#define TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT   1

Definition at line 242 of file r8180_hw.h.

#define TX_AGC_CTL_PERPACKET_GAIN_SHIFT   0

Definition at line 241 of file r8180_hw.h.

#define TX_ANTENNA   0x9f

Definition at line 236 of file r8180_hw.h.

#define TX_BEACON_RING_ADDR   0x4c

Definition at line 160 of file r8180_hw.h.

#define TX_BEPRIORITY_RING_ADDR   0x14

Definition at line 131 of file r8180_hw.h.

#define TX_BKPRIORITY_RING_ADDR   0x10

Definition at line 130 of file r8180_hw.h.

#define TX_CONF   0x40

Definition at line 113 of file r8180_hw.h.

#define TX_CONF_HEADER_AUTOICREMENT_SHIFT   30

Definition at line 114 of file r8180_hw.h.

#define TX_DMA_POLLING   0xd9

Definition at line 124 of file r8180_hw.h.

#define TX_DMA_POLLING_BEACON_SHIFT   7

Definition at line 125 of file r8180_hw.h.

#define TX_DMA_POLLING_HIPRIORITY_SHIFT   6

Definition at line 126 of file r8180_hw.h.

#define TX_DMA_POLLING_LOWPRIORITY_SHIFT   4

Definition at line 128 of file r8180_hw.h.

#define TX_DMA_POLLING_NORMPRIORITY_SHIFT   5

Definition at line 127 of file r8180_hw.h.

#define TX_DPRETRY_SHIFT   0

Definition at line 119 of file r8180_hw.h.

#define TX_GAIN_CCK   0x9d

Definition at line 238 of file r8180_hw.h.

#define TX_GAIN_OFDM   0x9e

Definition at line 237 of file r8180_hw.h.

#define TX_HIGHPRIORITY_RING_ADDR   0x28

Definition at line 134 of file r8180_hw.h.

#define TX_LOOPBACK_CONTINUE   3

Definition at line 117 of file r8180_hw.h.

#define TX_LOOPBACK_MASK   ((1<<17)|(1<<18))

Definition at line 118 of file r8180_hw.h.

#define TX_LOOPBACK_NONE   0

Definition at line 116 of file r8180_hw.h.

#define TX_LOOPBACK_SHIFT   17

Definition at line 115 of file r8180_hw.h.

#define TX_MANAGEPRIORITY_RING_ADDR   0x0C

Definition at line 129 of file r8180_hw.h.

#define TX_NOCRC_SHIFT   16

Definition at line 123 of file r8180_hw.h.

#define TX_NOICV_SHIFT   19

Definition at line 122 of file r8180_hw.h.

#define TX_RTSRETRY_SHIFT   8

Definition at line 121 of file r8180_hw.h.

#define TX_VIPRIORITY_RING_ADDR   0x20

Definition at line 132 of file r8180_hw.h.

#define TX_VOPRIORITY_RING_ADDR   0x24

Definition at line 133 of file r8180_hw.h.

#define TXAGC_CTL   0x9C /*< RJ_TODO_8185B> TX_AGC_CONTROL (0x9C seems be removed at 8185B, see p37). */

Definition at line 458 of file r8180_hw.h.

#define VIQ_ACM_CTL   (0x01 << 1) /*BIT1 */ /* Set to 1 when AC_VI used time reaches or exceeds the admitted time */

Definition at line 518 of file r8180_hw.h.

#define VIQ_ACM_EN   (0x01 << 6) /*BIT6 */

Definition at line 514 of file r8180_hw.h.

#define VOQ_ACM_CTL   (0x01 << 2) /*BIT2 */ /* Set to 1 when AC_VO used time reaches or exceeds the admitted time */

Definition at line 517 of file r8180_hw.h.

#define VOQ_ACM_EN   (0x01 << 7) /*BIT7 */

Definition at line 513 of file r8180_hw.h.

#define WPA_CONFIG   0xb0

Definition at line 239 of file r8180_hw.h.