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#define | R852_DATALINE 0x00 |
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#define | R852_CTL 0x04 |
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#define | R852_CTL_COMMAND 0x01 /* send command (#CLE)*/ |
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#define | R852_CTL_DATA 0x02 /* read/write data (#ALE)*/ |
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#define | R852_CTL_ON 0x04 /* only seem to controls the hd led, */ |
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#define | R852_CTL_RESET 0x08 /* unknown, set only on start once*/ |
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#define | R852_CTL_CARDENABLE 0x10 /* probably (#CE) - always set*/ |
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#define | R852_CTL_ECC_ENABLE 0x20 /* enable ecc engine */ |
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#define | R852_CTL_ECC_ACCESS 0x40 /* read/write ecc via reg #0*/ |
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#define | R852_CTL_WRITE 0x80 /* set when performing writes (#WP) */ |
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#define | R852_CARD_STA 0x05 |
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#define | R852_CARD_STA_CD 0x01 /* state of #CD line, same as 0x04 */ |
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#define | R852_CARD_STA_RO 0x02 /* card is readonly */ |
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#define | R852_CARD_STA_PRESENT 0x04 /* card is present (#CD) */ |
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#define | R852_CARD_STA_ABSENT 0x08 /* card is absent */ |
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#define | R852_CARD_STA_BUSY 0x80 /* card is busy - (#R/B) */ |
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#define | R852_CARD_IRQ_STA 0x06 /* IRQ status */ |
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#define | R852_CARD_IRQ_ENABLE 0x07 /* IRQ enable */ |
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#define | R852_CARD_IRQ_CD 0x01 /* fire when #CD lights, same as 0x04*/ |
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#define | R852_CARD_IRQ_REMOVE 0x04 /* detect card removal */ |
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#define | R852_CARD_IRQ_INSERT 0x08 /* detect card insert */ |
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#define | R852_CARD_IRQ_UNK1 0x10 /* unknown */ |
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#define | R852_CARD_IRQ_GENABLE 0x80 /* general enable */ |
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#define | R852_CARD_IRQ_MASK 0x1D |
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#define | R852_HW 0x08 |
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#define | R852_HW_ENABLED 0x01 /* hw enabled */ |
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#define | R852_HW_UNKNOWN 0x80 |
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#define | R852_DMA_CAP 0x09 |
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#define | R852_SMBIT 0x20 /* if set with bit #6 or bit #7, then */ |
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#define | R852_DMA1 0x40 /* if set w/bit #7, dma is supported */ |
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#define | R852_DMA2 0x80 /* if set w/bit #6, dma is supported */ |
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#define | R852_DMA_ADDR 0x0C |
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#define | R852_DMA_SETTINGS 0x10 |
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#define | R852_DMA_MEMORY 0x01 /* (memory <-> internal hw buffer) */ |
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#define | R852_DMA_READ 0x02 /* 0 = write, 1 = read */ |
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#define | R852_DMA_INTERNAL 0x04 /* (internal hw buffer <-> card) */ |
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#define | R852_DMA_IRQ_STA 0x14 |
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#define | R852_DMA_IRQ_ENABLE 0x18 |
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#define | R852_DMA_IRQ_MEMORY 0x01 /* (memory <-> internal hw buffer) */ |
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#define | R852_DMA_IRQ_ERROR 0x02 /* error did happen */ |
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#define | R852_DMA_IRQ_INTERNAL 0x04 /* (internal hw buffer <-> card) */ |
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#define | R852_DMA_IRQ_MASK 0x07 /* mask of all IRQ bits */ |
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#define | R852_ECC_ERR_BIT_MSK 0x07 /* error bit location */ |
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#define | R852_ECC_CORRECT 0x10 /* no errors - (guessed) */ |
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#define | R852_ECC_CORRECTABLE 0x20 /* correctable error exist */ |
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#define | R852_ECC_FAIL 0x40 /* non correctable error detected */ |
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#define | R852_DMA_LEN 512 |
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#define | DMA_INTERNAL 0 |
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#define | DMA_MEMORY 1 |
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#define | DRV_NAME "r852" |
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#define | dbg(format,...) |
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#define | dbg_verbose(format,...) |
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#define | message(format,...) printk(KERN_INFO DRV_NAME ": " format "\n", ## __VA_ARGS__) |
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