Linux Kernel
3.7.1
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Macros | |
#define | RF2522 0x0000 |
#define | RF2523 0x0001 |
#define | RF2524 0x0002 |
#define | RF2525 0x0003 |
#define | RF2525E 0x0004 |
#define | RF5222 0x0010 |
#define | RT2560_VERSION_B 2 |
#define | RT2560_VERSION_C 3 |
#define | RT2560_VERSION_D 4 |
#define | DEFAULT_RSSI_OFFSET 121 |
#define | CSR_REG_BASE 0x0000 |
#define | CSR_REG_SIZE 0x0174 |
#define | EEPROM_BASE 0x0000 |
#define | EEPROM_SIZE 0x0200 |
#define | BBP_BASE 0x0000 |
#define | BBP_SIZE 0x0040 |
#define | RF_BASE 0x0004 |
#define | RF_SIZE 0x0010 |
#define | NUM_TX_QUEUES 2 |
#define | CSR0 0x0000 |
#define | CSR0_REVISION FIELD32(0x0000ffff) |
#define | CSR1 0x0004 |
#define | CSR1_SOFT_RESET FIELD32(0x00000001) |
#define | CSR1_BBP_RESET FIELD32(0x00000002) |
#define | CSR1_HOST_READY FIELD32(0x00000004) |
#define | CSR2 0x0008 |
#define | CSR3 0x000c |
#define | CSR3_BYTE0 FIELD32(0x000000ff) |
#define | CSR3_BYTE1 FIELD32(0x0000ff00) |
#define | CSR3_BYTE2 FIELD32(0x00ff0000) |
#define | CSR3_BYTE3 FIELD32(0xff000000) |
#define | CSR4 0x0010 |
#define | CSR4_BYTE4 FIELD32(0x000000ff) |
#define | CSR4_BYTE5 FIELD32(0x0000ff00) |
#define | CSR5 0x0014 |
#define | CSR5_BYTE0 FIELD32(0x000000ff) |
#define | CSR5_BYTE1 FIELD32(0x0000ff00) |
#define | CSR5_BYTE2 FIELD32(0x00ff0000) |
#define | CSR5_BYTE3 FIELD32(0xff000000) |
#define | CSR6 0x0018 |
#define | CSR6_BYTE4 FIELD32(0x000000ff) |
#define | CSR6_BYTE5 FIELD32(0x0000ff00) |
#define | CSR7 0x001c |
#define | CSR7_TBCN_EXPIRE FIELD32(0x00000001) |
#define | CSR7_TWAKE_EXPIRE FIELD32(0x00000002) |
#define | CSR7_TATIMW_EXPIRE FIELD32(0x00000004) |
#define | CSR7_TXDONE_TXRING FIELD32(0x00000008) |
#define | CSR7_TXDONE_ATIMRING FIELD32(0x00000010) |
#define | CSR7_TXDONE_PRIORING FIELD32(0x00000020) |
#define | CSR7_RXDONE FIELD32(0x00000040) |
#define | CSR7_DECRYPTION_DONE FIELD32(0x00000080) |
#define | CSR7_ENCRYPTION_DONE FIELD32(0x00000100) |
#define | CSR7_UART1_TX_TRESHOLD FIELD32(0x00000200) |
#define | CSR7_UART1_RX_TRESHOLD FIELD32(0x00000400) |
#define | CSR7_UART1_IDLE_TRESHOLD FIELD32(0x00000800) |
#define | CSR7_UART1_TX_BUFF_ERROR FIELD32(0x00001000) |
#define | CSR7_UART1_RX_BUFF_ERROR FIELD32(0x00002000) |
#define | CSR7_UART2_TX_TRESHOLD FIELD32(0x00004000) |
#define | CSR7_UART2_RX_TRESHOLD FIELD32(0x00008000) |
#define | CSR7_UART2_IDLE_TRESHOLD FIELD32(0x00010000) |
#define | CSR7_UART2_TX_BUFF_ERROR FIELD32(0x00020000) |
#define | CSR7_UART2_RX_BUFF_ERROR FIELD32(0x00040000) |
#define | CSR7_TIMER_CSR3_EXPIRE FIELD32(0x00080000) |
#define | CSR8 0x0020 |
#define | CSR8_TBCN_EXPIRE FIELD32(0x00000001) |
#define | CSR8_TWAKE_EXPIRE FIELD32(0x00000002) |
#define | CSR8_TATIMW_EXPIRE FIELD32(0x00000004) |
#define | CSR8_TXDONE_TXRING FIELD32(0x00000008) |
#define | CSR8_TXDONE_ATIMRING FIELD32(0x00000010) |
#define | CSR8_TXDONE_PRIORING FIELD32(0x00000020) |
#define | CSR8_RXDONE FIELD32(0x00000040) |
#define | CSR8_DECRYPTION_DONE FIELD32(0x00000080) |
#define | CSR8_ENCRYPTION_DONE FIELD32(0x00000100) |
#define | CSR8_UART1_TX_TRESHOLD FIELD32(0x00000200) |
#define | CSR8_UART1_RX_TRESHOLD FIELD32(0x00000400) |
#define | CSR8_UART1_IDLE_TRESHOLD FIELD32(0x00000800) |
#define | CSR8_UART1_TX_BUFF_ERROR FIELD32(0x00001000) |
#define | CSR8_UART1_RX_BUFF_ERROR FIELD32(0x00002000) |
#define | CSR8_UART2_TX_TRESHOLD FIELD32(0x00004000) |
#define | CSR8_UART2_RX_TRESHOLD FIELD32(0x00008000) |
#define | CSR8_UART2_IDLE_TRESHOLD FIELD32(0x00010000) |
#define | CSR8_UART2_TX_BUFF_ERROR FIELD32(0x00020000) |
#define | CSR8_UART2_RX_BUFF_ERROR FIELD32(0x00040000) |
#define | CSR8_TIMER_CSR3_EXPIRE FIELD32(0x00080000) |
#define | CSR9 0x0024 |
#define | CSR9_MAX_FRAME_UNIT FIELD32(0x00000f80) |
#define | SECCSR0 0x0028 |
#define | SECCSR0_KICK_DECRYPT FIELD32(0x00000001) |
#define | SECCSR0_ONE_SHOT FIELD32(0x00000002) |
#define | SECCSR0_DESC_ADDRESS FIELD32(0xfffffffc) |
#define | CSR11 0x002c |
#define | CSR11_CWMIN FIELD32(0x0000000f) |
#define | CSR11_CWMAX FIELD32(0x000000f0) |
#define | CSR11_SLOT_TIME FIELD32(0x00001f00) |
#define | CSR11_CW_SELECT FIELD32(0x00002000) |
#define | CSR11_LONG_RETRY FIELD32(0x00ff0000) |
#define | CSR11_SHORT_RETRY FIELD32(0xff000000) |
#define | CSR12 0x0030 |
#define | CSR12_BEACON_INTERVAL FIELD32(0x0000ffff) |
#define | CSR12_CFP_MAX_DURATION FIELD32(0xffff0000) |
#define | CSR13 0x0034 |
#define | CSR13_ATIMW_DURATION FIELD32(0x0000ffff) |
#define | CSR13_CFP_PERIOD FIELD32(0x00ff0000) |
#define | CSR14 0x0038 |
#define | CSR14_TSF_COUNT FIELD32(0x00000001) |
#define | CSR14_TSF_SYNC FIELD32(0x00000006) |
#define | CSR14_TBCN FIELD32(0x00000008) |
#define | CSR14_TCFP FIELD32(0x00000010) |
#define | CSR14_TATIMW FIELD32(0x00000020) |
#define | CSR14_BEACON_GEN FIELD32(0x00000040) |
#define | CSR14_CFP_COUNT_PRELOAD FIELD32(0x0000ff00) |
#define | CSR14_TBCM_PRELOAD FIELD32(0xffff0000) |
#define | CSR15 0x003c |
#define | CSR15_CFP FIELD32(0x00000001) |
#define | CSR15_ATIMW FIELD32(0x00000002) |
#define | CSR15_BEACON_SENT FIELD32(0x00000004) |
#define | CSR16 0x0040 |
#define | CSR16_LOW_TSFTIMER FIELD32(0xffffffff) |
#define | CSR17 0x0044 |
#define | CSR17_HIGH_TSFTIMER FIELD32(0xffffffff) |
#define | CSR18 0x0048 |
#define | CSR18_SIFS FIELD32(0x000001ff) |
#define | CSR18_PIFS FIELD32(0x001f0000) |
#define | CSR19 0x004c |
#define | CSR19_DIFS FIELD32(0x0000ffff) |
#define | CSR19_EIFS FIELD32(0xffff0000) |
#define | CSR20 0x0050 |
#define | CSR20_DELAY_AFTER_TBCN FIELD32(0x0000ffff) |
#define | CSR20_TBCN_BEFORE_WAKEUP FIELD32(0x00ff0000) |
#define | CSR20_AUTOWAKE FIELD32(0x01000000) |
#define | CSR21 0x0054 |
#define | CSR21_RELOAD FIELD32(0x00000001) |
#define | CSR21_EEPROM_DATA_CLOCK FIELD32(0x00000002) |
#define | CSR21_EEPROM_CHIP_SELECT FIELD32(0x00000004) |
#define | CSR21_EEPROM_DATA_IN FIELD32(0x00000008) |
#define | CSR21_EEPROM_DATA_OUT FIELD32(0x00000010) |
#define | CSR21_TYPE_93C46 FIELD32(0x00000020) |
#define | CSR22 0x0058 |
#define | CSR22_CFP_DURATION_REMAIN FIELD32(0x0000ffff) |
#define | CSR22_RELOAD_CFP_DURATION FIELD32(0x00010000) |
#define | TXCSR0 0x0060 |
#define | TXCSR0_KICK_TX FIELD32(0x00000001) |
#define | TXCSR0_KICK_ATIM FIELD32(0x00000002) |
#define | TXCSR0_KICK_PRIO FIELD32(0x00000004) |
#define | TXCSR0_ABORT FIELD32(0x00000008) |
#define | TXCSR1 0x0064 |
#define | TXCSR1_ACK_TIMEOUT FIELD32(0x000001ff) |
#define | TXCSR1_ACK_CONSUME_TIME FIELD32(0x0003fe00) |
#define | TXCSR1_TSF_OFFSET FIELD32(0x00fc0000) |
#define | TXCSR1_AUTORESPONDER FIELD32(0x01000000) |
#define | TXCSR2 0x0068 |
#define | TXCSR2_TXD_SIZE FIELD32(0x000000ff) |
#define | TXCSR2_NUM_TXD FIELD32(0x0000ff00) |
#define | TXCSR2_NUM_ATIM FIELD32(0x00ff0000) |
#define | TXCSR2_NUM_PRIO FIELD32(0xff000000) |
#define | TXCSR3 0x006c |
#define | TXCSR3_TX_RING_REGISTER FIELD32(0xffffffff) |
#define | TXCSR4 0x0070 |
#define | TXCSR4_ATIM_RING_REGISTER FIELD32(0xffffffff) |
#define | TXCSR5 0x0074 |
#define | TXCSR5_PRIO_RING_REGISTER FIELD32(0xffffffff) |
#define | TXCSR6 0x0078 |
#define | TXCSR6_BEACON_RING_REGISTER FIELD32(0xffffffff) |
#define | TXCSR7 0x007c |
#define | TXCSR7_AR_POWERMANAGEMENT FIELD32(0x00000001) |
#define | TXCSR8 0x0098 |
#define | TXCSR8_BBP_ID0 FIELD32(0x0000007f) |
#define | TXCSR8_BBP_ID0_VALID FIELD32(0x00000080) |
#define | TXCSR8_BBP_ID1 FIELD32(0x00007f00) |
#define | TXCSR8_BBP_ID1_VALID FIELD32(0x00008000) |
#define | TXCSR8_BBP_ID2 FIELD32(0x007f0000) |
#define | TXCSR8_BBP_ID2_VALID FIELD32(0x00800000) |
#define | TXCSR8_BBP_ID3 FIELD32(0x7f000000) |
#define | TXCSR8_BBP_ID3_VALID FIELD32(0x80000000) |
#define | TXCSR9 0x0094 |
#define | TXCSR9_OFDM_RATE FIELD32(0x000000ff) |
#define | TXCSR9_OFDM_SERVICE FIELD32(0x0000ff00) |
#define | TXCSR9_OFDM_LENGTH_LOW FIELD32(0x00ff0000) |
#define | TXCSR9_OFDM_LENGTH_HIGH FIELD32(0xff000000) |
#define | RXCSR0 0x0080 |
#define | RXCSR0_DISABLE_RX FIELD32(0x00000001) |
#define | RXCSR0_DROP_CRC FIELD32(0x00000002) |
#define | RXCSR0_DROP_PHYSICAL FIELD32(0x00000004) |
#define | RXCSR0_DROP_CONTROL FIELD32(0x00000008) |
#define | RXCSR0_DROP_NOT_TO_ME FIELD32(0x00000010) |
#define | RXCSR0_DROP_TODS FIELD32(0x00000020) |
#define | RXCSR0_DROP_VERSION_ERROR FIELD32(0x00000040) |
#define | RXCSR0_PASS_CRC FIELD32(0x00000080) |
#define | RXCSR0_PASS_PLCP FIELD32(0x00000100) |
#define | RXCSR0_DROP_MCAST FIELD32(0x00000200) |
#define | RXCSR0_DROP_BCAST FIELD32(0x00000400) |
#define | RXCSR0_ENABLE_QOS FIELD32(0x00000800) |
#define | RXCSR1 0x0084 |
#define | RXCSR1_RXD_SIZE FIELD32(0x000000ff) |
#define | RXCSR1_NUM_RXD FIELD32(0x0000ff00) |
#define | RXCSR2 0x0088 |
#define | RXCSR2_RX_RING_REGISTER FIELD32(0xffffffff) |
#define | RXCSR3 0x0090 |
#define | RXCSR3_BBP_ID0 FIELD32(0x0000007f) |
#define | RXCSR3_BBP_ID0_VALID FIELD32(0x00000080) |
#define | RXCSR3_BBP_ID1 FIELD32(0x00007f00) |
#define | RXCSR3_BBP_ID1_VALID FIELD32(0x00008000) |
#define | RXCSR3_BBP_ID2 FIELD32(0x007f0000) |
#define | RXCSR3_BBP_ID2_VALID FIELD32(0x00800000) |
#define | RXCSR3_BBP_ID3 FIELD32(0x7f000000) |
#define | RXCSR3_BBP_ID3_VALID FIELD32(0x80000000) |
#define | ARCSR1 0x009c |
#define | ARCSR1_AR_BBP_DATA2 FIELD32(0x000000ff) |
#define | ARCSR1_AR_BBP_ID2 FIELD32(0x0000ff00) |
#define | ARCSR1_AR_BBP_DATA3 FIELD32(0x00ff0000) |
#define | ARCSR1_AR_BBP_ID3 FIELD32(0xff000000) |
#define | PCICSR 0x008c |
#define | PCICSR_BIG_ENDIAN FIELD32(0x00000001) |
#define | PCICSR_RX_TRESHOLD FIELD32(0x00000006) |
#define | PCICSR_TX_TRESHOLD FIELD32(0x00000018) |
#define | PCICSR_BURST_LENTH FIELD32(0x00000060) |
#define | PCICSR_ENABLE_CLK FIELD32(0x00000080) |
#define | PCICSR_READ_MULTIPLE FIELD32(0x00000100) |
#define | PCICSR_WRITE_INVALID FIELD32(0x00000200) |
#define | CNT0 0x00a0 |
#define | CNT0_FCS_ERROR FIELD32(0x0000ffff) |
#define | TIMECSR2 0x00a8 |
#define | CNT1 0x00ac |
#define | CNT2 0x00b0 |
#define | TIMECSR3 0x00b4 |
#define | CNT3 0x00b8 |
#define | CNT3_FALSE_CCA FIELD32(0x0000ffff) |
#define | CNT4 0x00bc |
#define | CNT5 0x00c0 |
#define | PWRCSR0 0x00c4 |
#define | PSCSR0 0x00c8 |
#define | PSCSR1 0x00cc |
#define | PSCSR2 0x00d0 |
#define | PSCSR3 0x00d4 |
#define | PWRCSR1 0x00d8 |
#define | PWRCSR1_SET_STATE FIELD32(0x00000001) |
#define | PWRCSR1_BBP_DESIRE_STATE FIELD32(0x00000006) |
#define | PWRCSR1_RF_DESIRE_STATE FIELD32(0x00000018) |
#define | PWRCSR1_BBP_CURR_STATE FIELD32(0x00000060) |
#define | PWRCSR1_RF_CURR_STATE FIELD32(0x00000180) |
#define | PWRCSR1_PUT_TO_SLEEP FIELD32(0x00000200) |
#define | TIMECSR 0x00dc |
#define | TIMECSR_US_COUNT FIELD32(0x000000ff) |
#define | TIMECSR_US_64_COUNT FIELD32(0x0000ff00) |
#define | TIMECSR_BEACON_EXPECT FIELD32(0x00070000) |
#define | MACCSR0 0x00e0 |
#define | MACCSR1 0x00e4 |
#define | MACCSR1_KICK_RX FIELD32(0x00000001) |
#define | MACCSR1_ONESHOT_RXMODE FIELD32(0x00000002) |
#define | MACCSR1_BBPRX_RESET_MODE FIELD32(0x00000004) |
#define | MACCSR1_AUTO_TXBBP FIELD32(0x00000008) |
#define | MACCSR1_AUTO_RXBBP FIELD32(0x00000010) |
#define | MACCSR1_LOOPBACK FIELD32(0x00000060) |
#define | MACCSR1_INTERSIL_IF FIELD32(0x00000080) |
#define | RALINKCSR 0x00e8 |
#define | RALINKCSR_AR_BBP_DATA0 FIELD32(0x000000ff) |
#define | RALINKCSR_AR_BBP_ID0 FIELD32(0x00007f00) |
#define | RALINKCSR_AR_BBP_VALID0 FIELD32(0x00008000) |
#define | RALINKCSR_AR_BBP_DATA1 FIELD32(0x00ff0000) |
#define | RALINKCSR_AR_BBP_ID1 FIELD32(0x7f000000) |
#define | RALINKCSR_AR_BBP_VALID1 FIELD32(0x80000000) |
#define | BCNCSR 0x00ec |
#define | BCNCSR_CHANGE FIELD32(0x00000001) |
#define | BCNCSR_DELTATIME FIELD32(0x0000001e) |
#define | BCNCSR_NUM_BEACON FIELD32(0x00001fe0) |
#define | BCNCSR_MODE FIELD32(0x00006000) |
#define | BCNCSR_PLUS FIELD32(0x00008000) |
#define | BBPCSR 0x00f0 |
#define | BBPCSR_VALUE FIELD32(0x000000ff) |
#define | BBPCSR_REGNUM FIELD32(0x00007f00) |
#define | BBPCSR_BUSY FIELD32(0x00008000) |
#define | BBPCSR_WRITE_CONTROL FIELD32(0x00010000) |
#define | RFCSR 0x00f4 |
#define | RFCSR_VALUE FIELD32(0x00ffffff) |
#define | RFCSR_NUMBER_OF_BITS FIELD32(0x1f000000) |
#define | RFCSR_IF_SELECT FIELD32(0x20000000) |
#define | RFCSR_PLL_LD FIELD32(0x40000000) |
#define | RFCSR_BUSY FIELD32(0x80000000) |
#define | LEDCSR 0x00f8 |
#define | LEDCSR_ON_PERIOD FIELD32(0x000000ff) |
#define | LEDCSR_OFF_PERIOD FIELD32(0x0000ff00) |
#define | LEDCSR_LINK FIELD32(0x00010000) |
#define | LEDCSR_ACTIVITY FIELD32(0x00020000) |
#define | LEDCSR_LINK_POLARITY FIELD32(0x00040000) |
#define | LEDCSR_ACTIVITY_POLARITY FIELD32(0x00080000) |
#define | LEDCSR_LED_DEFAULT FIELD32(0x00100000) |
#define | SECCSR3 0x00fc |
#define | RXPTR 0x0100 |
#define | TXPTR 0x0104 |
#define | PRIPTR 0x0108 |
#define | ATIMPTR 0x010c |
#define | TXACKCSR0 0x0110 |
#define | ACKCNT0 0x0114 |
#define | ACKCNT1 0x0118 |
#define | GPIOCSR 0x0120 |
#define | GPIOCSR_VAL0 FIELD32(0x00000001) |
#define | GPIOCSR_VAL1 FIELD32(0x00000002) |
#define | GPIOCSR_VAL2 FIELD32(0x00000004) |
#define | GPIOCSR_VAL3 FIELD32(0x00000008) |
#define | GPIOCSR_VAL4 FIELD32(0x00000010) |
#define | GPIOCSR_VAL5 FIELD32(0x00000020) |
#define | GPIOCSR_VAL6 FIELD32(0x00000040) |
#define | GPIOCSR_VAL7 FIELD32(0x00000080) |
#define | GPIOCSR_DIR0 FIELD32(0x00000100) |
#define | GPIOCSR_DIR1 FIELD32(0x00000200) |
#define | GPIOCSR_DIR2 FIELD32(0x00000400) |
#define | GPIOCSR_DIR3 FIELD32(0x00000800) |
#define | GPIOCSR_DIR4 FIELD32(0x00001000) |
#define | GPIOCSR_DIR5 FIELD32(0x00002000) |
#define | GPIOCSR_DIR6 FIELD32(0x00004000) |
#define | GPIOCSR_DIR7 FIELD32(0x00008000) |
#define | FIFOCSR0 0x0128 |
#define | FIFOCSR1 0x012c |
#define | BCNCSR1 0x0130 |
#define | BCNCSR1_PRELOAD FIELD32(0x0000ffff) |
#define | BCNCSR1_BEACON_CWMIN FIELD32(0x000f0000) |
#define | MACCSR2 0x0134 |
#define | MACCSR2_DELAY FIELD32(0x000000ff) |
#define | TESTCSR 0x0138 |
#define | ARCSR2 0x013c |
#define | ARCSR2_SIGNAL FIELD32(0x000000ff) |
#define | ARCSR2_SERVICE FIELD32(0x0000ff00) |
#define | ARCSR2_LENGTH FIELD32(0xffff0000) |
#define | ARCSR3 0x0140 |
#define | ARCSR3_SIGNAL FIELD32(0x000000ff) |
#define | ARCSR3_SERVICE FIELD32(0x0000ff00) |
#define | ARCSR3_LENGTH FIELD32(0xffff0000) |
#define | ARCSR4 0x0144 |
#define | ARCSR4_SIGNAL FIELD32(0x000000ff) |
#define | ARCSR4_SERVICE FIELD32(0x0000ff00) |
#define | ARCSR4_LENGTH FIELD32(0xffff0000) |
#define | ARCSR5 0x0148 |
#define | ARCSR5_SIGNAL FIELD32(0x000000ff) |
#define | ARCSR5_SERVICE FIELD32(0x0000ff00) |
#define | ARCSR5_LENGTH FIELD32(0xffff0000) |
#define | ARTCSR0 0x014c |
#define | ARTCSR0_ACK_CTS_11MBS FIELD32(0x000000ff) |
#define | ARTCSR0_ACK_CTS_5_5MBS FIELD32(0x0000ff00) |
#define | ARTCSR0_ACK_CTS_2MBS FIELD32(0x00ff0000) |
#define | ARTCSR0_ACK_CTS_1MBS FIELD32(0xff000000) |
#define | ARTCSR1 0x0150 |
#define | ARTCSR1_ACK_CTS_6MBS FIELD32(0x000000ff) |
#define | ARTCSR1_ACK_CTS_9MBS FIELD32(0x0000ff00) |
#define | ARTCSR1_ACK_CTS_12MBS FIELD32(0x00ff0000) |
#define | ARTCSR1_ACK_CTS_18MBS FIELD32(0xff000000) |
#define | ARTCSR2 0x0154 |
#define | ARTCSR2_ACK_CTS_24MBS FIELD32(0x000000ff) |
#define | ARTCSR2_ACK_CTS_36MBS FIELD32(0x0000ff00) |
#define | ARTCSR2_ACK_CTS_48MBS FIELD32(0x00ff0000) |
#define | ARTCSR2_ACK_CTS_54MBS FIELD32(0xff000000) |
#define | SECCSR1 0x0158 |
#define | SECCSR1_KICK_ENCRYPT FIELD32(0x00000001) |
#define | SECCSR1_ONE_SHOT FIELD32(0x00000002) |
#define | SECCSR1_DESC_ADDRESS FIELD32(0xfffffffc) |
#define | BBPCSR1 0x015c |
#define | BBPCSR1_CCK FIELD32(0x00000003) |
#define | BBPCSR1_CCK_FLIP FIELD32(0x00000004) |
#define | BBPCSR1_OFDM FIELD32(0x00030000) |
#define | BBPCSR1_OFDM_FLIP FIELD32(0x00040000) |
#define | DBANDCSR0 0x0160 |
#define | DBANDCSR1 0x0164 |
#define | BBPPCSR 0x0168 |
#define | DBGSEL0 0x016c |
#define | DBGSEL1 0x0170 |
#define | BISTCSR 0x0174 |
#define | MCAST0 0x0178 |
#define | MCAST1 0x017c |
#define | UARTCSR0 0x0180 |
#define | UARTCSR1 0x0184 |
#define | UARTCSR3 0x0188 |
#define | UARTCSR4 0x018c |
#define | UART2CSR0 0x0190 |
#define | UART2CSR1 0x0194 |
#define | UART2CSR3 0x0198 |
#define | UART2CSR4 0x019c |
#define | BBP_R2_TX_ANTENNA FIELD8(0x03) |
#define | BBP_R2_TX_IQ_FLIP FIELD8(0x04) |
#define | BBP_R14_RX_ANTENNA FIELD8(0x03) |
#define | BBP_R14_RX_IQ_FLIP FIELD8(0x04) |
#define | BBP_R70_JAPAN_FILTER FIELD8(0x08) |
#define | RF1_TUNER FIELD32(0x00020000) |
#define | RF3_TUNER FIELD32(0x00000100) |
#define | RF3_TXPOWER FIELD32(0x00003e00) |
#define | EEPROM_MAC_ADDR_0 0x0002 |
#define | EEPROM_MAC_ADDR_BYTE0 FIELD16(0x00ff) |
#define | EEPROM_MAC_ADDR_BYTE1 FIELD16(0xff00) |
#define | EEPROM_MAC_ADDR1 0x0003 |
#define | EEPROM_MAC_ADDR_BYTE2 FIELD16(0x00ff) |
#define | EEPROM_MAC_ADDR_BYTE3 FIELD16(0xff00) |
#define | EEPROM_MAC_ADDR_2 0x0004 |
#define | EEPROM_MAC_ADDR_BYTE4 FIELD16(0x00ff) |
#define | EEPROM_MAC_ADDR_BYTE5 FIELD16(0xff00) |
#define | EEPROM_ANTENNA 0x10 |
#define | EEPROM_ANTENNA_NUM FIELD16(0x0003) |
#define | EEPROM_ANTENNA_TX_DEFAULT FIELD16(0x000c) |
#define | EEPROM_ANTENNA_RX_DEFAULT FIELD16(0x0030) |
#define | EEPROM_ANTENNA_LED_MODE FIELD16(0x01c0) |
#define | EEPROM_ANTENNA_DYN_TXAGC FIELD16(0x0200) |
#define | EEPROM_ANTENNA_HARDWARE_RADIO FIELD16(0x0400) |
#define | EEPROM_ANTENNA_RF_TYPE FIELD16(0xf800) |
#define | EEPROM_NIC 0x11 |
#define | EEPROM_NIC_CARDBUS_ACCEL FIELD16(0x0001) |
#define | EEPROM_NIC_DYN_BBP_TUNE FIELD16(0x0002) |
#define | EEPROM_NIC_CCK_TX_POWER FIELD16(0x000c) |
#define | EEPROM_GEOGRAPHY 0x12 |
#define | EEPROM_GEOGRAPHY_GEO FIELD16(0x0f00) |
#define | EEPROM_BBP_START 0x13 |
#define | EEPROM_BBP_SIZE 16 |
#define | EEPROM_BBP_VALUE FIELD16(0x00ff) |
#define | EEPROM_BBP_REG_ID FIELD16(0xff00) |
#define | EEPROM_TXPOWER_START 0x23 |
#define | EEPROM_TXPOWER_SIZE 7 |
#define | EEPROM_TXPOWER_1 FIELD16(0x00ff) |
#define | EEPROM_TXPOWER_2 FIELD16(0xff00) |
#define | EEPROM_CALIBRATE_OFFSET 0x3e |
#define | EEPROM_CALIBRATE_OFFSET_RSSI FIELD16(0x00ff) |
#define | TXD_DESC_SIZE (11 * sizeof(__le32)) |
#define | RXD_DESC_SIZE (11 * sizeof(__le32)) |
#define | TXD_W0_OWNER_NIC FIELD32(0x00000001) |
#define | TXD_W0_VALID FIELD32(0x00000002) |
#define | TXD_W0_RESULT FIELD32(0x0000001c) |
#define | TXD_W0_RETRY_COUNT FIELD32(0x000000e0) |
#define | TXD_W0_MORE_FRAG FIELD32(0x00000100) |
#define | TXD_W0_ACK FIELD32(0x00000200) |
#define | TXD_W0_TIMESTAMP FIELD32(0x00000400) |
#define | TXD_W0_OFDM FIELD32(0x00000800) |
#define | TXD_W0_CIPHER_OWNER FIELD32(0x00001000) |
#define | TXD_W0_IFS FIELD32(0x00006000) |
#define | TXD_W0_RETRY_MODE FIELD32(0x00008000) |
#define | TXD_W0_DATABYTE_COUNT FIELD32(0x0fff0000) |
#define | TXD_W0_CIPHER_ALG FIELD32(0xe0000000) |
#define | TXD_W1_BUFFER_ADDRESS FIELD32(0xffffffff) |
#define | TXD_W2_IV_OFFSET FIELD32(0x0000003f) |
#define | TXD_W2_AIFS FIELD32(0x000000c0) |
#define | TXD_W2_CWMIN FIELD32(0x00000f00) |
#define | TXD_W2_CWMAX FIELD32(0x0000f000) |
#define | TXD_W3_PLCP_SIGNAL FIELD32(0x000000ff) |
#define | TXD_W3_PLCP_SERVICE FIELD32(0x0000ff00) |
#define | TXD_W3_PLCP_LENGTH_LOW FIELD32(0x00ff0000) |
#define | TXD_W3_PLCP_LENGTH_HIGH FIELD32(0xff000000) |
#define | TXD_W4_IV FIELD32(0xffffffff) |
#define | TXD_W5_EIV FIELD32(0xffffffff) |
#define | TXD_W6_KEY FIELD32(0xffffffff) |
#define | TXD_W7_KEY FIELD32(0xffffffff) |
#define | TXD_W8_KEY FIELD32(0xffffffff) |
#define | TXD_W9_KEY FIELD32(0xffffffff) |
#define | TXD_W10_RTS FIELD32(0x00000001) |
#define | TXD_W10_TX_RATE FIELD32(0x000000fe) |
#define | RXD_W0_OWNER_NIC FIELD32(0x00000001) |
#define | RXD_W0_UNICAST_TO_ME FIELD32(0x00000002) |
#define | RXD_W0_MULTICAST FIELD32(0x00000004) |
#define | RXD_W0_BROADCAST FIELD32(0x00000008) |
#define | RXD_W0_MY_BSS FIELD32(0x00000010) |
#define | RXD_W0_CRC_ERROR FIELD32(0x00000020) |
#define | RXD_W0_OFDM FIELD32(0x00000040) |
#define | RXD_W0_PHYSICAL_ERROR FIELD32(0x00000080) |
#define | RXD_W0_CIPHER_OWNER FIELD32(0x00000100) |
#define | RXD_W0_ICV_ERROR FIELD32(0x00000200) |
#define | RXD_W0_IV_OFFSET FIELD32(0x0000fc00) |
#define | RXD_W0_DATABYTE_COUNT FIELD32(0x0fff0000) |
#define | RXD_W0_CIPHER_ALG FIELD32(0xe0000000) |
#define | RXD_W1_BUFFER_ADDRESS FIELD32(0xffffffff) |
#define | RXD_W2_SIGNAL FIELD32(0x000000ff) |
#define | RXD_W2_RSSI FIELD32(0x0000ff00) |
#define | RXD_W2_TA FIELD32(0xffff0000) |
#define | RXD_W3_TA FIELD32(0xffffffff) |
#define | RXD_W4_IV FIELD32(0xffffffff) |
#define | RXD_W5_EIV FIELD32(0xffffffff) |
#define | RXD_W6_KEY FIELD32(0xffffffff) |
#define | RXD_W7_KEY FIELD32(0xffffffff) |
#define | RXD_W8_KEY FIELD32(0xffffffff) |
#define | RXD_W9_KEY FIELD32(0xffffffff) |
#define | RXD_W10_DROP FIELD32(0x00000001) |
#define | MIN_TXPOWER 0 |
#define | MAX_TXPOWER 31 |
#define | DEFAULT_TXPOWER 24 |
#define | TXPOWER_FROM_DEV(__txpower) (((u8)(__txpower)) > MAX_TXPOWER) ? DEFAULT_TXPOWER : (__txpower) |
#define | TXPOWER_TO_DEV(__txpower) clamp_t(char, __txpower, MIN_TXPOWER, MAX_TXPOWER) |
#define ACKCNT0 0x0114 |
Definition at line 783 of file rt2500pci.h.
#define ACKCNT1 0x0118 |
Definition at line 784 of file rt2500pci.h.
#define ARCSR1 0x009c |
Definition at line 543 of file rt2500pci.h.
#define ARCSR1_AR_BBP_DATA2 FIELD32(0x000000ff) |
Definition at line 544 of file rt2500pci.h.
#define ARCSR1_AR_BBP_DATA3 FIELD32(0x00ff0000) |
Definition at line 546 of file rt2500pci.h.
#define ARCSR1_AR_BBP_ID2 FIELD32(0x0000ff00) |
Definition at line 545 of file rt2500pci.h.
#define ARCSR1_AR_BBP_ID3 FIELD32(0xff000000) |
Definition at line 547 of file rt2500pci.h.
#define ARCSR2 0x013c |
Definition at line 845 of file rt2500pci.h.
#define ARCSR2_LENGTH FIELD32(0xffff0000) |
Definition at line 848 of file rt2500pci.h.
#define ARCSR2_SERVICE FIELD32(0x0000ff00) |
Definition at line 847 of file rt2500pci.h.
#define ARCSR2_SIGNAL FIELD32(0x000000ff) |
Definition at line 846 of file rt2500pci.h.
#define ARCSR3 0x0140 |
Definition at line 853 of file rt2500pci.h.
#define ARCSR3_LENGTH FIELD32(0xffff0000) |
Definition at line 856 of file rt2500pci.h.
#define ARCSR3_SERVICE FIELD32(0x0000ff00) |
Definition at line 855 of file rt2500pci.h.
#define ARCSR3_SIGNAL FIELD32(0x000000ff) |
Definition at line 854 of file rt2500pci.h.
#define ARCSR4 0x0144 |
Definition at line 861 of file rt2500pci.h.
#define ARCSR4_LENGTH FIELD32(0xffff0000) |
Definition at line 864 of file rt2500pci.h.
#define ARCSR4_SERVICE FIELD32(0x0000ff00) |
Definition at line 863 of file rt2500pci.h.
#define ARCSR4_SIGNAL FIELD32(0x000000ff) |
Definition at line 862 of file rt2500pci.h.
#define ARCSR5 0x0148 |
Definition at line 869 of file rt2500pci.h.
#define ARCSR5_LENGTH FIELD32(0xffff0000) |
Definition at line 872 of file rt2500pci.h.
#define ARCSR5_SERVICE FIELD32(0x0000ff00) |
Definition at line 871 of file rt2500pci.h.
#define ARCSR5_SIGNAL FIELD32(0x000000ff) |
Definition at line 870 of file rt2500pci.h.
#define ARTCSR0 0x014c |
Definition at line 877 of file rt2500pci.h.
#define ARTCSR0_ACK_CTS_11MBS FIELD32(0x000000ff) |
Definition at line 878 of file rt2500pci.h.
#define ARTCSR0_ACK_CTS_1MBS FIELD32(0xff000000) |
Definition at line 881 of file rt2500pci.h.
#define ARTCSR0_ACK_CTS_2MBS FIELD32(0x00ff0000) |
Definition at line 880 of file rt2500pci.h.
#define ARTCSR0_ACK_CTS_5_5MBS FIELD32(0x0000ff00) |
Definition at line 879 of file rt2500pci.h.
#define ARTCSR1 0x0150 |
Definition at line 887 of file rt2500pci.h.
#define ARTCSR1_ACK_CTS_12MBS FIELD32(0x00ff0000) |
Definition at line 890 of file rt2500pci.h.
#define ARTCSR1_ACK_CTS_18MBS FIELD32(0xff000000) |
Definition at line 891 of file rt2500pci.h.
#define ARTCSR1_ACK_CTS_6MBS FIELD32(0x000000ff) |
Definition at line 888 of file rt2500pci.h.
#define ARTCSR1_ACK_CTS_9MBS FIELD32(0x0000ff00) |
Definition at line 889 of file rt2500pci.h.
#define ARTCSR2 0x0154 |
Definition at line 896 of file rt2500pci.h.
#define ARTCSR2_ACK_CTS_24MBS FIELD32(0x000000ff) |
Definition at line 897 of file rt2500pci.h.
#define ARTCSR2_ACK_CTS_36MBS FIELD32(0x0000ff00) |
Definition at line 898 of file rt2500pci.h.
#define ARTCSR2_ACK_CTS_48MBS FIELD32(0x00ff0000) |
Definition at line 899 of file rt2500pci.h.
#define ARTCSR2_ACK_CTS_54MBS FIELD32(0xff000000) |
Definition at line 900 of file rt2500pci.h.
#define ATIMPTR 0x010c |
Definition at line 771 of file rt2500pci.h.
#define BBP_BASE 0x0000 |
Definition at line 60 of file rt2500pci.h.
#define BBP_R14_RX_ANTENNA FIELD8(0x03) |
Definition at line 990 of file rt2500pci.h.
#define BBP_R14_RX_IQ_FLIP FIELD8(0x04) |
Definition at line 991 of file rt2500pci.h.
#define BBP_R2_TX_ANTENNA FIELD8(0x03) |
Definition at line 984 of file rt2500pci.h.
#define BBP_R2_TX_IQ_FLIP FIELD8(0x04) |
Definition at line 985 of file rt2500pci.h.
#define BBP_R70_JAPAN_FILTER FIELD8(0x08) |
Definition at line 996 of file rt2500pci.h.
#define BBP_SIZE 0x0040 |
Definition at line 61 of file rt2500pci.h.
#define BBPCSR 0x00f0 |
Definition at line 716 of file rt2500pci.h.
#define BBPCSR1 0x015c |
Definition at line 916 of file rt2500pci.h.
#define BBPCSR1_CCK FIELD32(0x00000003) |
Definition at line 917 of file rt2500pci.h.
#define BBPCSR1_CCK_FLIP FIELD32(0x00000004) |
Definition at line 918 of file rt2500pci.h.
#define BBPCSR1_OFDM FIELD32(0x00030000) |
Definition at line 919 of file rt2500pci.h.
#define BBPCSR1_OFDM_FLIP FIELD32(0x00040000) |
Definition at line 920 of file rt2500pci.h.
#define BBPCSR_BUSY FIELD32(0x00008000) |
Definition at line 719 of file rt2500pci.h.
#define BBPCSR_REGNUM FIELD32(0x00007f00) |
Definition at line 718 of file rt2500pci.h.
#define BBPCSR_VALUE FIELD32(0x000000ff) |
Definition at line 717 of file rt2500pci.h.
#define BBPCSR_WRITE_CONTROL FIELD32(0x00010000) |
Definition at line 720 of file rt2500pci.h.
#define BBPPCSR 0x0168 |
Definition at line 933 of file rt2500pci.h.
#define BCNCSR 0x00ec |
Definition at line 698 of file rt2500pci.h.
#define BCNCSR1 0x0130 |
Definition at line 826 of file rt2500pci.h.
#define BCNCSR1_BEACON_CWMIN FIELD32(0x000f0000) |
Definition at line 828 of file rt2500pci.h.
#define BCNCSR1_PRELOAD FIELD32(0x0000ffff) |
Definition at line 827 of file rt2500pci.h.
#define BCNCSR_CHANGE FIELD32(0x00000001) |
Definition at line 699 of file rt2500pci.h.
#define BCNCSR_DELTATIME FIELD32(0x0000001e) |
Definition at line 700 of file rt2500pci.h.
#define BCNCSR_MODE FIELD32(0x00006000) |
Definition at line 702 of file rt2500pci.h.
#define BCNCSR_NUM_BEACON FIELD32(0x00001fe0) |
Definition at line 701 of file rt2500pci.h.
#define BCNCSR_PLUS FIELD32(0x00008000) |
Definition at line 703 of file rt2500pci.h.
#define BISTCSR 0x0174 |
Definition at line 946 of file rt2500pci.h.
#define CNT0 0x00a0 |
Definition at line 580 of file rt2500pci.h.
#define CNT0_FCS_ERROR FIELD32(0x0000ffff) |
Definition at line 581 of file rt2500pci.h.
#define CNT1 0x00ac |
Definition at line 589 of file rt2500pci.h.
#define CNT2 0x00b0 |
Definition at line 590 of file rt2500pci.h.
#define CNT3 0x00b8 |
Definition at line 596 of file rt2500pci.h.
#define CNT3_FALSE_CCA FIELD32(0x0000ffff) |
Definition at line 597 of file rt2500pci.h.
#define CNT4 0x00bc |
Definition at line 604 of file rt2500pci.h.
#define CNT5 0x00c0 |
Definition at line 605 of file rt2500pci.h.
#define CSR0 0x0000 |
Definition at line 78 of file rt2500pci.h.
#define CSR0_REVISION FIELD32(0x0000ffff) |
Definition at line 79 of file rt2500pci.h.
#define CSR1 0x0004 |
Definition at line 87 of file rt2500pci.h.
#define CSR11 0x002c |
Definition at line 249 of file rt2500pci.h.
#define CSR11_CW_SELECT FIELD32(0x00002000) |
Definition at line 253 of file rt2500pci.h.
#define CSR11_CWMAX FIELD32(0x000000f0) |
Definition at line 251 of file rt2500pci.h.
#define CSR11_CWMIN FIELD32(0x0000000f) |
Definition at line 250 of file rt2500pci.h.
#define CSR11_LONG_RETRY FIELD32(0x00ff0000) |
Definition at line 254 of file rt2500pci.h.
#define CSR11_SHORT_RETRY FIELD32(0xff000000) |
Definition at line 255 of file rt2500pci.h.
#define CSR11_SLOT_TIME FIELD32(0x00001f00) |
Definition at line 252 of file rt2500pci.h.
#define CSR12 0x0030 |
Definition at line 263 of file rt2500pci.h.
#define CSR12_BEACON_INTERVAL FIELD32(0x0000ffff) |
Definition at line 264 of file rt2500pci.h.
#define CSR12_CFP_MAX_DURATION FIELD32(0xffff0000) |
Definition at line 265 of file rt2500pci.h.
#define CSR13 0x0034 |
Definition at line 273 of file rt2500pci.h.
#define CSR13_ATIMW_DURATION FIELD32(0x0000ffff) |
Definition at line 274 of file rt2500pci.h.
#define CSR13_CFP_PERIOD FIELD32(0x00ff0000) |
Definition at line 275 of file rt2500pci.h.
#define CSR14 0x0038 |
Definition at line 288 of file rt2500pci.h.
#define CSR14_BEACON_GEN FIELD32(0x00000040) |
Definition at line 294 of file rt2500pci.h.
#define CSR14_CFP_COUNT_PRELOAD FIELD32(0x0000ff00) |
Definition at line 295 of file rt2500pci.h.
#define CSR14_TATIMW FIELD32(0x00000020) |
Definition at line 293 of file rt2500pci.h.
#define CSR14_TBCM_PRELOAD FIELD32(0xffff0000) |
Definition at line 296 of file rt2500pci.h.
#define CSR14_TBCN FIELD32(0x00000008) |
Definition at line 291 of file rt2500pci.h.
#define CSR14_TCFP FIELD32(0x00000010) |
Definition at line 292 of file rt2500pci.h.
#define CSR14_TSF_COUNT FIELD32(0x00000001) |
Definition at line 289 of file rt2500pci.h.
#define CSR14_TSF_SYNC FIELD32(0x00000006) |
Definition at line 290 of file rt2500pci.h.
#define CSR15 0x003c |
Definition at line 304 of file rt2500pci.h.
#define CSR15_ATIMW FIELD32(0x00000002) |
Definition at line 306 of file rt2500pci.h.
#define CSR15_BEACON_SENT FIELD32(0x00000004) |
Definition at line 307 of file rt2500pci.h.
#define CSR15_CFP FIELD32(0x00000001) |
Definition at line 305 of file rt2500pci.h.
#define CSR16 0x0040 |
Definition at line 312 of file rt2500pci.h.
#define CSR16_LOW_TSFTIMER FIELD32(0xffffffff) |
Definition at line 313 of file rt2500pci.h.
#define CSR17 0x0044 |
Definition at line 318 of file rt2500pci.h.
#define CSR17_HIGH_TSFTIMER FIELD32(0xffffffff) |
Definition at line 319 of file rt2500pci.h.
#define CSR18 0x0048 |
Definition at line 326 of file rt2500pci.h.
#define CSR18_PIFS FIELD32(0x001f0000) |
Definition at line 328 of file rt2500pci.h.
#define CSR18_SIFS FIELD32(0x000001ff) |
Definition at line 327 of file rt2500pci.h.
#define CSR19 0x004c |
Definition at line 335 of file rt2500pci.h.
#define CSR19_DIFS FIELD32(0x0000ffff) |
Definition at line 336 of file rt2500pci.h.
#define CSR19_EIFS FIELD32(0xffff0000) |
Definition at line 337 of file rt2500pci.h.
#define CSR1_BBP_RESET FIELD32(0x00000002) |
Definition at line 89 of file rt2500pci.h.
#define CSR1_HOST_READY FIELD32(0x00000004) |
Definition at line 90 of file rt2500pci.h.
#define CSR1_SOFT_RESET FIELD32(0x00000001) |
Definition at line 88 of file rt2500pci.h.
#define CSR2 0x0008 |
Definition at line 95 of file rt2500pci.h.
#define CSR20 0x0050 |
Definition at line 345 of file rt2500pci.h.
#define CSR20_AUTOWAKE FIELD32(0x01000000) |
Definition at line 348 of file rt2500pci.h.
#define CSR20_DELAY_AFTER_TBCN FIELD32(0x0000ffff) |
Definition at line 346 of file rt2500pci.h.
#define CSR20_TBCN_BEFORE_WAKEUP FIELD32(0x00ff0000) |
Definition at line 347 of file rt2500pci.h.
#define CSR21 0x0054 |
Definition at line 355 of file rt2500pci.h.
#define CSR21_EEPROM_CHIP_SELECT FIELD32(0x00000004) |
Definition at line 358 of file rt2500pci.h.
#define CSR21_EEPROM_DATA_CLOCK FIELD32(0x00000002) |
Definition at line 357 of file rt2500pci.h.
#define CSR21_EEPROM_DATA_IN FIELD32(0x00000008) |
Definition at line 359 of file rt2500pci.h.
#define CSR21_EEPROM_DATA_OUT FIELD32(0x00000010) |
Definition at line 360 of file rt2500pci.h.
#define CSR21_RELOAD FIELD32(0x00000001) |
Definition at line 356 of file rt2500pci.h.
#define CSR21_TYPE_93C46 FIELD32(0x00000020) |
Definition at line 361 of file rt2500pci.h.
#define CSR22 0x0058 |
Definition at line 368 of file rt2500pci.h.
#define CSR22_CFP_DURATION_REMAIN FIELD32(0x0000ffff) |
Definition at line 369 of file rt2500pci.h.
#define CSR22_RELOAD_CFP_DURATION FIELD32(0x00010000) |
Definition at line 370 of file rt2500pci.h.
#define CSR3 0x000c |
Definition at line 100 of file rt2500pci.h.
#define CSR3_BYTE0 FIELD32(0x000000ff) |
Definition at line 101 of file rt2500pci.h.
#define CSR3_BYTE1 FIELD32(0x0000ff00) |
Definition at line 102 of file rt2500pci.h.
#define CSR3_BYTE2 FIELD32(0x00ff0000) |
Definition at line 103 of file rt2500pci.h.
#define CSR3_BYTE3 FIELD32(0xff000000) |
Definition at line 104 of file rt2500pci.h.
#define CSR4 0x0010 |
Definition at line 109 of file rt2500pci.h.
#define CSR4_BYTE4 FIELD32(0x000000ff) |
Definition at line 110 of file rt2500pci.h.
#define CSR4_BYTE5 FIELD32(0x0000ff00) |
Definition at line 111 of file rt2500pci.h.
#define CSR5 0x0014 |
Definition at line 116 of file rt2500pci.h.
#define CSR5_BYTE0 FIELD32(0x000000ff) |
Definition at line 117 of file rt2500pci.h.
#define CSR5_BYTE1 FIELD32(0x0000ff00) |
Definition at line 118 of file rt2500pci.h.
#define CSR5_BYTE2 FIELD32(0x00ff0000) |
Definition at line 119 of file rt2500pci.h.
#define CSR5_BYTE3 FIELD32(0xff000000) |
Definition at line 120 of file rt2500pci.h.
#define CSR6 0x0018 |
Definition at line 125 of file rt2500pci.h.
#define CSR6_BYTE4 FIELD32(0x000000ff) |
Definition at line 126 of file rt2500pci.h.
#define CSR6_BYTE5 FIELD32(0x0000ff00) |
Definition at line 127 of file rt2500pci.h.
#define CSR7 0x001c |
Definition at line 154 of file rt2500pci.h.
#define CSR7_DECRYPTION_DONE FIELD32(0x00000080) |
Definition at line 162 of file rt2500pci.h.
#define CSR7_ENCRYPTION_DONE FIELD32(0x00000100) |
Definition at line 163 of file rt2500pci.h.
#define CSR7_RXDONE FIELD32(0x00000040) |
Definition at line 161 of file rt2500pci.h.
#define CSR7_TATIMW_EXPIRE FIELD32(0x00000004) |
Definition at line 157 of file rt2500pci.h.
#define CSR7_TBCN_EXPIRE FIELD32(0x00000001) |
Definition at line 155 of file rt2500pci.h.
#define CSR7_TIMER_CSR3_EXPIRE FIELD32(0x00080000) |
Definition at line 174 of file rt2500pci.h.
#define CSR7_TWAKE_EXPIRE FIELD32(0x00000002) |
Definition at line 156 of file rt2500pci.h.
#define CSR7_TXDONE_ATIMRING FIELD32(0x00000010) |
Definition at line 159 of file rt2500pci.h.
#define CSR7_TXDONE_PRIORING FIELD32(0x00000020) |
Definition at line 160 of file rt2500pci.h.
#define CSR7_TXDONE_TXRING FIELD32(0x00000008) |
Definition at line 158 of file rt2500pci.h.
#define CSR7_UART1_IDLE_TRESHOLD FIELD32(0x00000800) |
Definition at line 166 of file rt2500pci.h.
#define CSR7_UART1_RX_BUFF_ERROR FIELD32(0x00002000) |
Definition at line 168 of file rt2500pci.h.
#define CSR7_UART1_RX_TRESHOLD FIELD32(0x00000400) |
Definition at line 165 of file rt2500pci.h.
#define CSR7_UART1_TX_BUFF_ERROR FIELD32(0x00001000) |
Definition at line 167 of file rt2500pci.h.
#define CSR7_UART1_TX_TRESHOLD FIELD32(0x00000200) |
Definition at line 164 of file rt2500pci.h.
#define CSR7_UART2_IDLE_TRESHOLD FIELD32(0x00010000) |
Definition at line 171 of file rt2500pci.h.
#define CSR7_UART2_RX_BUFF_ERROR FIELD32(0x00040000) |
Definition at line 173 of file rt2500pci.h.
#define CSR7_UART2_RX_TRESHOLD FIELD32(0x00008000) |
Definition at line 170 of file rt2500pci.h.
#define CSR7_UART2_TX_BUFF_ERROR FIELD32(0x00020000) |
Definition at line 172 of file rt2500pci.h.
#define CSR7_UART2_TX_TRESHOLD FIELD32(0x00004000) |
Definition at line 169 of file rt2500pci.h.
#define CSR8 0x0020 |
Definition at line 200 of file rt2500pci.h.
#define CSR8_DECRYPTION_DONE FIELD32(0x00000080) |
Definition at line 208 of file rt2500pci.h.
#define CSR8_ENCRYPTION_DONE FIELD32(0x00000100) |
Definition at line 209 of file rt2500pci.h.
#define CSR8_RXDONE FIELD32(0x00000040) |
Definition at line 207 of file rt2500pci.h.
#define CSR8_TATIMW_EXPIRE FIELD32(0x00000004) |
Definition at line 203 of file rt2500pci.h.
#define CSR8_TBCN_EXPIRE FIELD32(0x00000001) |
Definition at line 201 of file rt2500pci.h.
#define CSR8_TIMER_CSR3_EXPIRE FIELD32(0x00080000) |
Definition at line 220 of file rt2500pci.h.
#define CSR8_TWAKE_EXPIRE FIELD32(0x00000002) |
Definition at line 202 of file rt2500pci.h.
#define CSR8_TXDONE_ATIMRING FIELD32(0x00000010) |
Definition at line 205 of file rt2500pci.h.
#define CSR8_TXDONE_PRIORING FIELD32(0x00000020) |
Definition at line 206 of file rt2500pci.h.
#define CSR8_TXDONE_TXRING FIELD32(0x00000008) |
Definition at line 204 of file rt2500pci.h.
#define CSR8_UART1_IDLE_TRESHOLD FIELD32(0x00000800) |
Definition at line 212 of file rt2500pci.h.
#define CSR8_UART1_RX_BUFF_ERROR FIELD32(0x00002000) |
Definition at line 214 of file rt2500pci.h.
#define CSR8_UART1_RX_TRESHOLD FIELD32(0x00000400) |
Definition at line 211 of file rt2500pci.h.
#define CSR8_UART1_TX_BUFF_ERROR FIELD32(0x00001000) |
Definition at line 213 of file rt2500pci.h.
#define CSR8_UART1_TX_TRESHOLD FIELD32(0x00000200) |
Definition at line 210 of file rt2500pci.h.
#define CSR8_UART2_IDLE_TRESHOLD FIELD32(0x00010000) |
Definition at line 217 of file rt2500pci.h.
#define CSR8_UART2_RX_BUFF_ERROR FIELD32(0x00040000) |
Definition at line 219 of file rt2500pci.h.
#define CSR8_UART2_RX_TRESHOLD FIELD32(0x00008000) |
Definition at line 216 of file rt2500pci.h.
#define CSR8_UART2_TX_BUFF_ERROR FIELD32(0x00020000) |
Definition at line 218 of file rt2500pci.h.
#define CSR8_UART2_TX_TRESHOLD FIELD32(0x00004000) |
Definition at line 215 of file rt2500pci.h.
#define CSR9 0x0024 |
Definition at line 226 of file rt2500pci.h.
#define CSR9_MAX_FRAME_UNIT FIELD32(0x00000f80) |
Definition at line 227 of file rt2500pci.h.
#define CSR_REG_BASE 0x0000 |
Definition at line 56 of file rt2500pci.h.
#define CSR_REG_SIZE 0x0174 |
Definition at line 57 of file rt2500pci.h.
#define DBANDCSR0 0x0160 |
Definition at line 927 of file rt2500pci.h.
#define DBANDCSR1 0x0164 |
Definition at line 928 of file rt2500pci.h.
#define DBGSEL0 0x016c |
Definition at line 940 of file rt2500pci.h.
#define DBGSEL1 0x0170 |
Definition at line 941 of file rt2500pci.h.
#define DEFAULT_RSSI_OFFSET 121 |
Definition at line 51 of file rt2500pci.h.
#define DEFAULT_TXPOWER 24 |
Definition at line 1229 of file rt2500pci.h.
#define EEPROM_ANTENNA 0x10 |
Definition at line 1041 of file rt2500pci.h.
#define EEPROM_ANTENNA_DYN_TXAGC FIELD16(0x0200) |
Definition at line 1046 of file rt2500pci.h.
#define EEPROM_ANTENNA_HARDWARE_RADIO FIELD16(0x0400) |
Definition at line 1047 of file rt2500pci.h.
#define EEPROM_ANTENNA_LED_MODE FIELD16(0x01c0) |
Definition at line 1045 of file rt2500pci.h.
#define EEPROM_ANTENNA_NUM FIELD16(0x0003) |
Definition at line 1042 of file rt2500pci.h.
#define EEPROM_ANTENNA_RF_TYPE FIELD16(0xf800) |
Definition at line 1048 of file rt2500pci.h.
#define EEPROM_ANTENNA_RX_DEFAULT FIELD16(0x0030) |
Definition at line 1044 of file rt2500pci.h.
#define EEPROM_ANTENNA_TX_DEFAULT FIELD16(0x000c) |
Definition at line 1043 of file rt2500pci.h.
#define EEPROM_BASE 0x0000 |
Definition at line 58 of file rt2500pci.h.
#define EEPROM_BBP_REG_ID FIELD16(0xff00) |
Definition at line 1074 of file rt2500pci.h.
#define EEPROM_BBP_SIZE 16 |
Definition at line 1072 of file rt2500pci.h.
#define EEPROM_BBP_START 0x13 |
Definition at line 1071 of file rt2500pci.h.
#define EEPROM_BBP_VALUE FIELD16(0x00ff) |
Definition at line 1073 of file rt2500pci.h.
#define EEPROM_CALIBRATE_OFFSET 0x3e |
Definition at line 1087 of file rt2500pci.h.
#define EEPROM_CALIBRATE_OFFSET_RSSI FIELD16(0x00ff) |
Definition at line 1088 of file rt2500pci.h.
#define EEPROM_GEOGRAPHY 0x12 |
Definition at line 1065 of file rt2500pci.h.
#define EEPROM_GEOGRAPHY_GEO FIELD16(0x0f00) |
Definition at line 1066 of file rt2500pci.h.
#define EEPROM_MAC_ADDR1 0x0003 |
Definition at line 1024 of file rt2500pci.h.
#define EEPROM_MAC_ADDR_0 0x0002 |
Definition at line 1021 of file rt2500pci.h.
#define EEPROM_MAC_ADDR_2 0x0004 |
Definition at line 1027 of file rt2500pci.h.
#define EEPROM_MAC_ADDR_BYTE0 FIELD16(0x00ff) |
Definition at line 1022 of file rt2500pci.h.
#define EEPROM_MAC_ADDR_BYTE1 FIELD16(0xff00) |
Definition at line 1023 of file rt2500pci.h.
#define EEPROM_MAC_ADDR_BYTE2 FIELD16(0x00ff) |
Definition at line 1025 of file rt2500pci.h.
#define EEPROM_MAC_ADDR_BYTE3 FIELD16(0xff00) |
Definition at line 1026 of file rt2500pci.h.
#define EEPROM_MAC_ADDR_BYTE4 FIELD16(0x00ff) |
Definition at line 1028 of file rt2500pci.h.
#define EEPROM_MAC_ADDR_BYTE5 FIELD16(0xff00) |
Definition at line 1029 of file rt2500pci.h.
#define EEPROM_NIC 0x11 |
Definition at line 1056 of file rt2500pci.h.
#define EEPROM_NIC_CARDBUS_ACCEL FIELD16(0x0001) |
Definition at line 1057 of file rt2500pci.h.
#define EEPROM_NIC_CCK_TX_POWER FIELD16(0x000c) |
Definition at line 1059 of file rt2500pci.h.
#define EEPROM_NIC_DYN_BBP_TUNE FIELD16(0x0002) |
Definition at line 1058 of file rt2500pci.h.
#define EEPROM_SIZE 0x0200 |
Definition at line 59 of file rt2500pci.h.
#define EEPROM_TXPOWER_1 FIELD16(0x00ff) |
Definition at line 1081 of file rt2500pci.h.
#define EEPROM_TXPOWER_2 FIELD16(0xff00) |
Definition at line 1082 of file rt2500pci.h.
#define EEPROM_TXPOWER_SIZE 7 |
Definition at line 1080 of file rt2500pci.h.
#define EEPROM_TXPOWER_START 0x23 |
Definition at line 1079 of file rt2500pci.h.
#define FIFOCSR0 0x0128 |
Definition at line 818 of file rt2500pci.h.
#define FIFOCSR1 0x012c |
Definition at line 819 of file rt2500pci.h.
#define GPIOCSR 0x0120 |
Definition at line 795 of file rt2500pci.h.
#define GPIOCSR_DIR0 FIELD32(0x00000100) |
Definition at line 804 of file rt2500pci.h.
#define GPIOCSR_DIR1 FIELD32(0x00000200) |
Definition at line 805 of file rt2500pci.h.
#define GPIOCSR_DIR2 FIELD32(0x00000400) |
Definition at line 806 of file rt2500pci.h.
#define GPIOCSR_DIR3 FIELD32(0x00000800) |
Definition at line 807 of file rt2500pci.h.
#define GPIOCSR_DIR4 FIELD32(0x00001000) |
Definition at line 808 of file rt2500pci.h.
#define GPIOCSR_DIR5 FIELD32(0x00002000) |
Definition at line 809 of file rt2500pci.h.
#define GPIOCSR_DIR6 FIELD32(0x00004000) |
Definition at line 810 of file rt2500pci.h.
#define GPIOCSR_DIR7 FIELD32(0x00008000) |
Definition at line 811 of file rt2500pci.h.
#define GPIOCSR_VAL0 FIELD32(0x00000001) |
Definition at line 796 of file rt2500pci.h.
#define GPIOCSR_VAL1 FIELD32(0x00000002) |
Definition at line 797 of file rt2500pci.h.
#define GPIOCSR_VAL2 FIELD32(0x00000004) |
Definition at line 798 of file rt2500pci.h.
#define GPIOCSR_VAL3 FIELD32(0x00000008) |
Definition at line 799 of file rt2500pci.h.
#define GPIOCSR_VAL4 FIELD32(0x00000010) |
Definition at line 800 of file rt2500pci.h.
#define GPIOCSR_VAL5 FIELD32(0x00000020) |
Definition at line 801 of file rt2500pci.h.
#define GPIOCSR_VAL6 FIELD32(0x00000040) |
Definition at line 802 of file rt2500pci.h.
#define GPIOCSR_VAL7 FIELD32(0x00000080) |
Definition at line 803 of file rt2500pci.h.
#define LEDCSR 0x00f8 |
Definition at line 747 of file rt2500pci.h.
#define LEDCSR_ACTIVITY FIELD32(0x00020000) |
Definition at line 751 of file rt2500pci.h.
#define LEDCSR_ACTIVITY_POLARITY FIELD32(0x00080000) |
Definition at line 753 of file rt2500pci.h.
#define LEDCSR_LED_DEFAULT FIELD32(0x00100000) |
Definition at line 754 of file rt2500pci.h.
#define LEDCSR_LINK FIELD32(0x00010000) |
Definition at line 750 of file rt2500pci.h.
#define LEDCSR_LINK_POLARITY FIELD32(0x00040000) |
Definition at line 752 of file rt2500pci.h.
#define LEDCSR_OFF_PERIOD FIELD32(0x0000ff00) |
Definition at line 749 of file rt2500pci.h.
#define LEDCSR_ON_PERIOD FIELD32(0x000000ff) |
Definition at line 748 of file rt2500pci.h.
#define MACCSR0 0x00e0 |
Definition at line 656 of file rt2500pci.h.
#define MACCSR1 0x00e4 |
Definition at line 668 of file rt2500pci.h.
#define MACCSR1_AUTO_RXBBP FIELD32(0x00000010) |
Definition at line 673 of file rt2500pci.h.
#define MACCSR1_AUTO_TXBBP FIELD32(0x00000008) |
Definition at line 672 of file rt2500pci.h.
#define MACCSR1_BBPRX_RESET_MODE FIELD32(0x00000004) |
Definition at line 671 of file rt2500pci.h.
#define MACCSR1_INTERSIL_IF FIELD32(0x00000080) |
Definition at line 675 of file rt2500pci.h.
#define MACCSR1_KICK_RX FIELD32(0x00000001) |
Definition at line 669 of file rt2500pci.h.
#define MACCSR1_LOOPBACK FIELD32(0x00000060) |
Definition at line 674 of file rt2500pci.h.
#define MACCSR1_ONESHOT_RXMODE FIELD32(0x00000002) |
Definition at line 670 of file rt2500pci.h.
#define MACCSR2 0x0134 |
Definition at line 834 of file rt2500pci.h.
#define MACCSR2_DELAY FIELD32(0x000000ff) |
Definition at line 835 of file rt2500pci.h.
#define MAX_TXPOWER 31 |
Definition at line 1228 of file rt2500pci.h.
#define MCAST0 0x0178 |
Definition at line 953 of file rt2500pci.h.
#define MCAST1 0x017c |
Definition at line 954 of file rt2500pci.h.
#define MIN_TXPOWER 0 |
Definition at line 1227 of file rt2500pci.h.
#define NUM_TX_QUEUES 2 |
Definition at line 68 of file rt2500pci.h.
#define PCICSR 0x008c |
Definition at line 567 of file rt2500pci.h.
#define PCICSR_BIG_ENDIAN FIELD32(0x00000001) |
Definition at line 568 of file rt2500pci.h.
#define PCICSR_BURST_LENTH FIELD32(0x00000060) |
Definition at line 571 of file rt2500pci.h.
#define PCICSR_ENABLE_CLK FIELD32(0x00000080) |
Definition at line 572 of file rt2500pci.h.
#define PCICSR_READ_MULTIPLE FIELD32(0x00000100) |
Definition at line 573 of file rt2500pci.h.
#define PCICSR_RX_TRESHOLD FIELD32(0x00000006) |
Definition at line 569 of file rt2500pci.h.
#define PCICSR_TX_TRESHOLD FIELD32(0x00000018) |
Definition at line 570 of file rt2500pci.h.
#define PCICSR_WRITE_INVALID FIELD32(0x00000200) |
Definition at line 574 of file rt2500pci.h.
#define PRIPTR 0x0108 |
Definition at line 770 of file rt2500pci.h.
#define PSCSR0 0x00c8 |
Definition at line 619 of file rt2500pci.h.
#define PSCSR1 0x00cc |
Definition at line 620 of file rt2500pci.h.
#define PSCSR2 0x00d0 |
Definition at line 621 of file rt2500pci.h.
#define PSCSR3 0x00d4 |
Definition at line 622 of file rt2500pci.h.
#define PWRCSR0 0x00c4 |
Definition at line 614 of file rt2500pci.h.
#define PWRCSR1 0x00d8 |
Definition at line 634 of file rt2500pci.h.
#define PWRCSR1_BBP_CURR_STATE FIELD32(0x00000060) |
Definition at line 638 of file rt2500pci.h.
#define PWRCSR1_BBP_DESIRE_STATE FIELD32(0x00000006) |
Definition at line 636 of file rt2500pci.h.
#define PWRCSR1_PUT_TO_SLEEP FIELD32(0x00000200) |
Definition at line 640 of file rt2500pci.h.
#define PWRCSR1_RF_CURR_STATE FIELD32(0x00000180) |
Definition at line 639 of file rt2500pci.h.
#define PWRCSR1_RF_DESIRE_STATE FIELD32(0x00000018) |
Definition at line 637 of file rt2500pci.h.
#define PWRCSR1_SET_STATE FIELD32(0x00000001) |
Definition at line 635 of file rt2500pci.h.
#define RALINKCSR 0x00e8 |
Definition at line 682 of file rt2500pci.h.
#define RALINKCSR_AR_BBP_DATA0 FIELD32(0x000000ff) |
Definition at line 683 of file rt2500pci.h.
#define RALINKCSR_AR_BBP_DATA1 FIELD32(0x00ff0000) |
Definition at line 686 of file rt2500pci.h.
#define RALINKCSR_AR_BBP_ID0 FIELD32(0x00007f00) |
Definition at line 684 of file rt2500pci.h.
#define RALINKCSR_AR_BBP_ID1 FIELD32(0x7f000000) |
Definition at line 687 of file rt2500pci.h.
#define RALINKCSR_AR_BBP_VALID0 FIELD32(0x00008000) |
Definition at line 685 of file rt2500pci.h.
#define RALINKCSR_AR_BBP_VALID1 FIELD32(0x80000000) |
Definition at line 688 of file rt2500pci.h.
#define RF1_TUNER FIELD32(0x00020000) |
Definition at line 1005 of file rt2500pci.h.
#define RF2522 0x0000 |
Definition at line 33 of file rt2500pci.h.
#define RF2523 0x0001 |
Definition at line 34 of file rt2500pci.h.
#define RF2524 0x0002 |
Definition at line 35 of file rt2500pci.h.
#define RF2525 0x0003 |
Definition at line 36 of file rt2500pci.h.
#define RF2525E 0x0004 |
Definition at line 37 of file rt2500pci.h.
#define RF3_TUNER FIELD32(0x00000100) |
Definition at line 1010 of file rt2500pci.h.
#define RF3_TXPOWER FIELD32(0x00003e00) |
Definition at line 1011 of file rt2500pci.h.
#define RF5222 0x0010 |
Definition at line 38 of file rt2500pci.h.
#define RF_BASE 0x0004 |
Definition at line 62 of file rt2500pci.h.
#define RF_SIZE 0x0010 |
Definition at line 63 of file rt2500pci.h.
#define RFCSR 0x00f4 |
Definition at line 730 of file rt2500pci.h.
#define RFCSR_BUSY FIELD32(0x80000000) |
Definition at line 735 of file rt2500pci.h.
#define RFCSR_IF_SELECT FIELD32(0x20000000) |
Definition at line 733 of file rt2500pci.h.
#define RFCSR_NUMBER_OF_BITS FIELD32(0x1f000000) |
Definition at line 732 of file rt2500pci.h.
#define RFCSR_PLL_LD FIELD32(0x40000000) |
Definition at line 734 of file rt2500pci.h.
#define RFCSR_VALUE FIELD32(0x00ffffff) |
Definition at line 731 of file rt2500pci.h.
#define RT2560_VERSION_B 2 |
Definition at line 43 of file rt2500pci.h.
#define RT2560_VERSION_C 3 |
Definition at line 44 of file rt2500pci.h.
#define RT2560_VERSION_D 4 |
Definition at line 45 of file rt2500pci.h.
#define RXCSR0 0x0080 |
Definition at line 494 of file rt2500pci.h.
#define RXCSR0_DISABLE_RX FIELD32(0x00000001) |
Definition at line 495 of file rt2500pci.h.
#define RXCSR0_DROP_BCAST FIELD32(0x00000400) |
Definition at line 505 of file rt2500pci.h.
#define RXCSR0_DROP_CONTROL FIELD32(0x00000008) |
Definition at line 498 of file rt2500pci.h.
#define RXCSR0_DROP_CRC FIELD32(0x00000002) |
Definition at line 496 of file rt2500pci.h.
#define RXCSR0_DROP_MCAST FIELD32(0x00000200) |
Definition at line 504 of file rt2500pci.h.
#define RXCSR0_DROP_NOT_TO_ME FIELD32(0x00000010) |
Definition at line 499 of file rt2500pci.h.
#define RXCSR0_DROP_PHYSICAL FIELD32(0x00000004) |
Definition at line 497 of file rt2500pci.h.
#define RXCSR0_DROP_TODS FIELD32(0x00000020) |
Definition at line 500 of file rt2500pci.h.
#define RXCSR0_DROP_VERSION_ERROR FIELD32(0x00000040) |
Definition at line 501 of file rt2500pci.h.
#define RXCSR0_ENABLE_QOS FIELD32(0x00000800) |
Definition at line 506 of file rt2500pci.h.
#define RXCSR0_PASS_CRC FIELD32(0x00000080) |
Definition at line 502 of file rt2500pci.h.
#define RXCSR0_PASS_PLCP FIELD32(0x00000100) |
Definition at line 503 of file rt2500pci.h.
#define RXCSR1 0x0084 |
Definition at line 513 of file rt2500pci.h.
#define RXCSR1_NUM_RXD FIELD32(0x0000ff00) |
Definition at line 515 of file rt2500pci.h.
#define RXCSR1_RXD_SIZE FIELD32(0x000000ff) |
Definition at line 514 of file rt2500pci.h.
#define RXCSR2 0x0088 |
Definition at line 520 of file rt2500pci.h.
#define RXCSR2_RX_RING_REGISTER FIELD32(0xffffffff) |
Definition at line 521 of file rt2500pci.h.
#define RXCSR3 0x0090 |
Definition at line 528 of file rt2500pci.h.
#define RXCSR3_BBP_ID0 FIELD32(0x0000007f) |
Definition at line 529 of file rt2500pci.h.
#define RXCSR3_BBP_ID0_VALID FIELD32(0x00000080) |
Definition at line 530 of file rt2500pci.h.
#define RXCSR3_BBP_ID1 FIELD32(0x00007f00) |
Definition at line 531 of file rt2500pci.h.
#define RXCSR3_BBP_ID1_VALID FIELD32(0x00008000) |
Definition at line 532 of file rt2500pci.h.
#define RXCSR3_BBP_ID2 FIELD32(0x007f0000) |
Definition at line 533 of file rt2500pci.h.
#define RXCSR3_BBP_ID2_VALID FIELD32(0x00800000) |
Definition at line 534 of file rt2500pci.h.
#define RXCSR3_BBP_ID3 FIELD32(0x7f000000) |
Definition at line 535 of file rt2500pci.h.
#define RXCSR3_BBP_ID3_VALID FIELD32(0x80000000) |
Definition at line 536 of file rt2500pci.h.
Definition at line 1094 of file rt2500pci.h.
#define RXD_W0_BROADCAST FIELD32(0x00000008) |
Definition at line 1172 of file rt2500pci.h.
#define RXD_W0_CIPHER_ALG FIELD32(0xe0000000) |
Definition at line 1181 of file rt2500pci.h.
#define RXD_W0_CIPHER_OWNER FIELD32(0x00000100) |
Definition at line 1177 of file rt2500pci.h.
#define RXD_W0_CRC_ERROR FIELD32(0x00000020) |
Definition at line 1174 of file rt2500pci.h.
#define RXD_W0_DATABYTE_COUNT FIELD32(0x0fff0000) |
Definition at line 1180 of file rt2500pci.h.
#define RXD_W0_ICV_ERROR FIELD32(0x00000200) |
Definition at line 1178 of file rt2500pci.h.
#define RXD_W0_IV_OFFSET FIELD32(0x0000fc00) |
Definition at line 1179 of file rt2500pci.h.
#define RXD_W0_MULTICAST FIELD32(0x00000004) |
Definition at line 1171 of file rt2500pci.h.
#define RXD_W0_MY_BSS FIELD32(0x00000010) |
Definition at line 1173 of file rt2500pci.h.
#define RXD_W0_OFDM FIELD32(0x00000040) |
Definition at line 1175 of file rt2500pci.h.
#define RXD_W0_OWNER_NIC FIELD32(0x00000001) |
Definition at line 1169 of file rt2500pci.h.
#define RXD_W0_PHYSICAL_ERROR FIELD32(0x00000080) |
Definition at line 1176 of file rt2500pci.h.
#define RXD_W0_UNICAST_TO_ME FIELD32(0x00000002) |
Definition at line 1170 of file rt2500pci.h.
#define RXD_W10_DROP FIELD32(0x00000001) |
Definition at line 1221 of file rt2500pci.h.
#define RXD_W1_BUFFER_ADDRESS FIELD32(0xffffffff) |
Definition at line 1186 of file rt2500pci.h.
#define RXD_W2_RSSI FIELD32(0x0000ff00) |
Definition at line 1192 of file rt2500pci.h.
#define RXD_W2_SIGNAL FIELD32(0x000000ff) |
Definition at line 1191 of file rt2500pci.h.
#define RXD_W2_TA FIELD32(0xffff0000) |
Definition at line 1193 of file rt2500pci.h.
#define RXD_W3_TA FIELD32(0xffffffff) |
Definition at line 1198 of file rt2500pci.h.
#define RXD_W4_IV FIELD32(0xffffffff) |
Definition at line 1203 of file rt2500pci.h.
#define RXD_W5_EIV FIELD32(0xffffffff) |
Definition at line 1208 of file rt2500pci.h.
#define RXD_W6_KEY FIELD32(0xffffffff) |
Definition at line 1213 of file rt2500pci.h.
#define RXD_W7_KEY FIELD32(0xffffffff) |
Definition at line 1214 of file rt2500pci.h.
#define RXD_W8_KEY FIELD32(0xffffffff) |
Definition at line 1215 of file rt2500pci.h.
#define RXD_W9_KEY FIELD32(0xffffffff) |
Definition at line 1216 of file rt2500pci.h.
#define RXPTR 0x0100 |
Definition at line 768 of file rt2500pci.h.
#define SECCSR0 0x0028 |
Definition at line 235 of file rt2500pci.h.
#define SECCSR0_DESC_ADDRESS FIELD32(0xfffffffc) |
Definition at line 238 of file rt2500pci.h.
#define SECCSR0_KICK_DECRYPT FIELD32(0x00000001) |
Definition at line 236 of file rt2500pci.h.
#define SECCSR0_ONE_SHOT FIELD32(0x00000002) |
Definition at line 237 of file rt2500pci.h.
#define SECCSR1 0x0158 |
Definition at line 908 of file rt2500pci.h.
#define SECCSR1_DESC_ADDRESS FIELD32(0xfffffffc) |
Definition at line 911 of file rt2500pci.h.
#define SECCSR1_KICK_ENCRYPT FIELD32(0x00000001) |
Definition at line 909 of file rt2500pci.h.
#define SECCSR1_ONE_SHOT FIELD32(0x00000002) |
Definition at line 910 of file rt2500pci.h.
#define SECCSR3 0x00fc |
Definition at line 759 of file rt2500pci.h.
#define TESTCSR 0x0138 |
Definition at line 840 of file rt2500pci.h.
#define TIMECSR 0x00dc |
Definition at line 648 of file rt2500pci.h.
#define TIMECSR2 0x00a8 |
Definition at line 588 of file rt2500pci.h.
#define TIMECSR3 0x00b4 |
Definition at line 591 of file rt2500pci.h.
#define TIMECSR_BEACON_EXPECT FIELD32(0x00070000) |
Definition at line 651 of file rt2500pci.h.
#define TIMECSR_US_64_COUNT FIELD32(0x0000ff00) |
Definition at line 650 of file rt2500pci.h.
#define TIMECSR_US_COUNT FIELD32(0x000000ff) |
Definition at line 649 of file rt2500pci.h.
#define TXACKCSR0 0x0110 |
Definition at line 776 of file rt2500pci.h.
#define TXCSR0 0x0060 |
Definition at line 384 of file rt2500pci.h.
#define TXCSR0_ABORT FIELD32(0x00000008) |
Definition at line 388 of file rt2500pci.h.
#define TXCSR0_KICK_ATIM FIELD32(0x00000002) |
Definition at line 386 of file rt2500pci.h.
#define TXCSR0_KICK_PRIO FIELD32(0x00000004) |
Definition at line 387 of file rt2500pci.h.
#define TXCSR0_KICK_TX FIELD32(0x00000001) |
Definition at line 385 of file rt2500pci.h.
#define TXCSR1 0x0064 |
Definition at line 397 of file rt2500pci.h.
#define TXCSR1_ACK_CONSUME_TIME FIELD32(0x0003fe00) |
Definition at line 399 of file rt2500pci.h.
#define TXCSR1_ACK_TIMEOUT FIELD32(0x000001ff) |
Definition at line 398 of file rt2500pci.h.
#define TXCSR1_AUTORESPONDER FIELD32(0x01000000) |
Definition at line 401 of file rt2500pci.h.
#define TXCSR1_TSF_OFFSET FIELD32(0x00fc0000) |
Definition at line 400 of file rt2500pci.h.
#define TXCSR2 0x0068 |
Definition at line 410 of file rt2500pci.h.
#define TXCSR2_NUM_ATIM FIELD32(0x00ff0000) |
Definition at line 413 of file rt2500pci.h.
#define TXCSR2_NUM_PRIO FIELD32(0xff000000) |
Definition at line 414 of file rt2500pci.h.
#define TXCSR2_NUM_TXD FIELD32(0x0000ff00) |
Definition at line 412 of file rt2500pci.h.
#define TXCSR2_TXD_SIZE FIELD32(0x000000ff) |
Definition at line 411 of file rt2500pci.h.
#define TXCSR3 0x006c |
Definition at line 419 of file rt2500pci.h.
#define TXCSR3_TX_RING_REGISTER FIELD32(0xffffffff) |
Definition at line 420 of file rt2500pci.h.
#define TXCSR4 0x0070 |
Definition at line 425 of file rt2500pci.h.
#define TXCSR4_ATIM_RING_REGISTER FIELD32(0xffffffff) |
Definition at line 426 of file rt2500pci.h.
#define TXCSR5 0x0074 |
Definition at line 431 of file rt2500pci.h.
#define TXCSR5_PRIO_RING_REGISTER FIELD32(0xffffffff) |
Definition at line 432 of file rt2500pci.h.
#define TXCSR6 0x0078 |
Definition at line 437 of file rt2500pci.h.
#define TXCSR6_BEACON_RING_REGISTER FIELD32(0xffffffff) |
Definition at line 438 of file rt2500pci.h.
#define TXCSR7 0x007c |
Definition at line 444 of file rt2500pci.h.
#define TXCSR7_AR_POWERMANAGEMENT FIELD32(0x00000001) |
Definition at line 445 of file rt2500pci.h.
#define TXCSR8 0x0098 |
Definition at line 450 of file rt2500pci.h.
#define TXCSR8_BBP_ID0 FIELD32(0x0000007f) |
Definition at line 451 of file rt2500pci.h.
#define TXCSR8_BBP_ID0_VALID FIELD32(0x00000080) |
Definition at line 452 of file rt2500pci.h.
#define TXCSR8_BBP_ID1 FIELD32(0x00007f00) |
Definition at line 453 of file rt2500pci.h.
#define TXCSR8_BBP_ID1_VALID FIELD32(0x00008000) |
Definition at line 454 of file rt2500pci.h.
#define TXCSR8_BBP_ID2 FIELD32(0x007f0000) |
Definition at line 455 of file rt2500pci.h.
#define TXCSR8_BBP_ID2_VALID FIELD32(0x00800000) |
Definition at line 456 of file rt2500pci.h.
#define TXCSR8_BBP_ID3 FIELD32(0x7f000000) |
Definition at line 457 of file rt2500pci.h.
#define TXCSR8_BBP_ID3_VALID FIELD32(0x80000000) |
Definition at line 458 of file rt2500pci.h.
#define TXCSR9 0x0094 |
Definition at line 467 of file rt2500pci.h.
#define TXCSR9_OFDM_LENGTH_HIGH FIELD32(0xff000000) |
Definition at line 471 of file rt2500pci.h.
#define TXCSR9_OFDM_LENGTH_LOW FIELD32(0x00ff0000) |
Definition at line 470 of file rt2500pci.h.
#define TXCSR9_OFDM_RATE FIELD32(0x000000ff) |
Definition at line 468 of file rt2500pci.h.
#define TXCSR9_OFDM_SERVICE FIELD32(0x0000ff00) |
Definition at line 469 of file rt2500pci.h.
Definition at line 1093 of file rt2500pci.h.
#define TXD_W0_ACK FIELD32(0x00000200) |
Definition at line 1108 of file rt2500pci.h.
#define TXD_W0_CIPHER_ALG FIELD32(0xe0000000) |
Definition at line 1115 of file rt2500pci.h.
#define TXD_W0_CIPHER_OWNER FIELD32(0x00001000) |
Definition at line 1111 of file rt2500pci.h.
#define TXD_W0_DATABYTE_COUNT FIELD32(0x0fff0000) |
Definition at line 1114 of file rt2500pci.h.
#define TXD_W0_IFS FIELD32(0x00006000) |
Definition at line 1112 of file rt2500pci.h.
#define TXD_W0_MORE_FRAG FIELD32(0x00000100) |
Definition at line 1107 of file rt2500pci.h.
#define TXD_W0_OFDM FIELD32(0x00000800) |
Definition at line 1110 of file rt2500pci.h.
#define TXD_W0_OWNER_NIC FIELD32(0x00000001) |
Definition at line 1103 of file rt2500pci.h.
#define TXD_W0_RESULT FIELD32(0x0000001c) |
Definition at line 1105 of file rt2500pci.h.
#define TXD_W0_RETRY_COUNT FIELD32(0x000000e0) |
Definition at line 1106 of file rt2500pci.h.
#define TXD_W0_RETRY_MODE FIELD32(0x00008000) |
Definition at line 1113 of file rt2500pci.h.
#define TXD_W0_TIMESTAMP FIELD32(0x00000400) |
Definition at line 1109 of file rt2500pci.h.
#define TXD_W0_VALID FIELD32(0x00000002) |
Definition at line 1104 of file rt2500pci.h.
#define TXD_W10_RTS FIELD32(0x00000001) |
Definition at line 1159 of file rt2500pci.h.
#define TXD_W10_TX_RATE FIELD32(0x000000fe) |
Definition at line 1160 of file rt2500pci.h.
#define TXD_W1_BUFFER_ADDRESS FIELD32(0xffffffff) |
Definition at line 1120 of file rt2500pci.h.
#define TXD_W2_AIFS FIELD32(0x000000c0) |
Definition at line 1126 of file rt2500pci.h.
#define TXD_W2_CWMAX FIELD32(0x0000f000) |
Definition at line 1128 of file rt2500pci.h.
#define TXD_W2_CWMIN FIELD32(0x00000f00) |
Definition at line 1127 of file rt2500pci.h.
#define TXD_W2_IV_OFFSET FIELD32(0x0000003f) |
Definition at line 1125 of file rt2500pci.h.
#define TXD_W3_PLCP_LENGTH_HIGH FIELD32(0xff000000) |
Definition at line 1136 of file rt2500pci.h.
#define TXD_W3_PLCP_LENGTH_LOW FIELD32(0x00ff0000) |
Definition at line 1135 of file rt2500pci.h.
#define TXD_W3_PLCP_SERVICE FIELD32(0x0000ff00) |
Definition at line 1134 of file rt2500pci.h.
#define TXD_W3_PLCP_SIGNAL FIELD32(0x000000ff) |
Definition at line 1133 of file rt2500pci.h.
#define TXD_W4_IV FIELD32(0xffffffff) |
Definition at line 1141 of file rt2500pci.h.
#define TXD_W5_EIV FIELD32(0xffffffff) |
Definition at line 1146 of file rt2500pci.h.
#define TXD_W6_KEY FIELD32(0xffffffff) |
Definition at line 1151 of file rt2500pci.h.
#define TXD_W7_KEY FIELD32(0xffffffff) |
Definition at line 1152 of file rt2500pci.h.
#define TXD_W8_KEY FIELD32(0xffffffff) |
Definition at line 1153 of file rt2500pci.h.
#define TXD_W9_KEY FIELD32(0xffffffff) |
Definition at line 1154 of file rt2500pci.h.
#define TXPOWER_FROM_DEV | ( | __txpower | ) | (((u8)(__txpower)) > MAX_TXPOWER) ? DEFAULT_TXPOWER : (__txpower) |
Definition at line 1231 of file rt2500pci.h.
#define TXPOWER_TO_DEV | ( | __txpower | ) | clamp_t(char, __txpower, MIN_TXPOWER, MAX_TXPOWER) |
Definition at line 1234 of file rt2500pci.h.
#define TXPTR 0x0104 |
Definition at line 769 of file rt2500pci.h.
#define UART2CSR0 0x0190 |
Definition at line 971 of file rt2500pci.h.
#define UART2CSR1 0x0194 |
Definition at line 972 of file rt2500pci.h.
#define UART2CSR3 0x0198 |
Definition at line 973 of file rt2500pci.h.
#define UART2CSR4 0x019c |
Definition at line 974 of file rt2500pci.h.
#define UARTCSR0 0x0180 |
Definition at line 967 of file rt2500pci.h.
#define UARTCSR1 0x0184 |
Definition at line 968 of file rt2500pci.h.
#define UARTCSR3 0x0188 |
Definition at line 969 of file rt2500pci.h.
#define UARTCSR4 0x018c |
Definition at line 970 of file rt2500pci.h.