#include <linux/bcd.h>
#include <linux/types.h>
#include <linux/time.h>
#include <asm/time.h>
#include <asm/addrspace.h>
#include <asm/io.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_smbus.h>

Macros
#define	M41T81REG_SC_ST 0x80 /* stop bit */

#define	M41T81REG_HR_CB 0x40 /* century bit */

#define	M41T81REG_HR_CEB 0x80 /* century enable bit */

#define	M41T81REG_CTL_S 0x20 /* sign bit */

#define	M41T81REG_CTL_FT 0x40 /* frequency test bit */

#define	M41T81REG_CTL_OUT 0x80 /* output level */

#define	M41T81REG_WD_RB0 0x01 /* watchdog resolution bit 0 */

#define	M41T81REG_WD_RB1 0x02 /* watchdog resolution bit 1 */

#define	M41T81REG_WD_BMB0 0x04 /* watchdog multiplier bit 0 */

#define	M41T81REG_WD_BMB1 0x08 /* watchdog multiplier bit 1 */

#define	M41T81REG_WD_BMB2 0x10 /* watchdog multiplier bit 2 */

#define	M41T81REG_WD_BMB3 0x20 /* watchdog multiplier bit 3 */

#define	M41T81REG_WD_BMB4 0x40 /* watchdog multiplier bit 4 */

#define	M41T81REG_AMO_ABE 0x20 /* alarm in "battery back-up mode" enable bit */

#define	M41T81REG_AMO_SQWE 0x40 /* square wave enable */

#define	M41T81REG_AMO_AFE 0x80 /* alarm flag enable flag */

#define	M41T81REG_ADT_RPT5 0x40 /* alarm repeat mode bit 5 */

#define	M41T81REG_ADT_RPT4 0x80 /* alarm repeat mode bit 4 */

#define	M41T81REG_AHR_RPT3 0x80 /* alarm repeat mode bit 3 */

#define	M41T81REG_AHR_HT 0x40 /* halt update bit */

#define	M41T81REG_AMN_RPT2 0x80 /* alarm repeat mode bit 2 */

#define	M41T81REG_ASC_RPT1 0x80 /* alarm repeat mode bit 1 */

#define	M41T81REG_FLG_AF 0x40 /* alarm flag (read only) */

#define	M41T81REG_FLG_WDF 0x80 /* watchdog flag (read only) */

#define	M41T81REG_SQW_RS0 0x10 /* sqw frequency bit 0 */

#define	M41T81REG_SQW_RS1 0x20 /* sqw frequency bit 1 */

#define	M41T81REG_SQW_RS2 0x40 /* sqw frequency bit 2 */

#define	M41T81REG_SQW_RS3 0x80 /* sqw frequency bit 3 */

#define	M41T81REG_TSC 0x00 /* tenths/hundredths of second */

#define	M41T81REG_SC 0x01 /* seconds */

#define	M41T81REG_MN 0x02 /* minute */

#define	M41T81REG_HR 0x03 /* hour/century */

#define	M41T81REG_DY 0x04 /* day of week */

#define	M41T81REG_DT 0x05 /* date of month */

#define	M41T81REG_MO 0x06 /* month */

#define	M41T81REG_YR 0x07 /* year */

#define	M41T81REG_CTL 0x08 /* control */

#define	M41T81REG_WD 0x09 /* watchdog */

#define	M41T81REG_AMO 0x0A /* alarm: month */

#define	M41T81REG_ADT 0x0B /* alarm: date */

#define	M41T81REG_AHR 0x0C /* alarm: hour */

#define	M41T81REG_AMN 0x0D /* alarm: minute */

#define	M41T81REG_ASC 0x0E /* alarm: second */

#define	M41T81REG_FLG 0x0F /* flags */

#define	M41T81REG_SQW 0x13 /* square wave register */

#define	M41T81_CCR_ADDRESS 0x68

#define	SMB_CSR(reg) IOADDR(A_SMB_REGISTER(1, reg))

Functions
int	m41t81_set_time (unsigned long t)

unsigned long	m41t81_get_time (void)

int	m41t81_probe (void)

Macro Definition Documentation

#define M41T81_CCR_ADDRESS 0x68

Definition at line 84 of file rtc_m41t81.c.

#define M41T81REG_ADT 0x0B /* alarm: date */

Definition at line 77 of file rtc_m41t81.c.

#define M41T81REG_ADT_RPT4 0x80 /* alarm repeat mode bit 4 */

Definition at line 49 of file rtc_m41t81.c.

#define M41T81REG_ADT_RPT5 0x40 /* alarm repeat mode bit 5 */

Definition at line 48 of file rtc_m41t81.c.

#define M41T81REG_AHR 0x0C /* alarm: hour */

Definition at line 78 of file rtc_m41t81.c.

#define M41T81REG_AHR_HT 0x40 /* halt update bit */

Definition at line 51 of file rtc_m41t81.c.

#define M41T81REG_AHR_RPT3 0x80 /* alarm repeat mode bit 3 */

Definition at line 50 of file rtc_m41t81.c.

#define M41T81REG_AMN 0x0D /* alarm: minute */

Definition at line 79 of file rtc_m41t81.c.

#define M41T81REG_AMN_RPT2 0x80 /* alarm repeat mode bit 2 */

Definition at line 52 of file rtc_m41t81.c.

#define M41T81REG_AMO 0x0A /* alarm: month */

Definition at line 76 of file rtc_m41t81.c.

#define M41T81REG_AMO_ABE 0x20 /* alarm in "battery back-up mode" enable bit */

Definition at line 45 of file rtc_m41t81.c.

#define M41T81REG_AMO_AFE 0x80 /* alarm flag enable flag */

Definition at line 47 of file rtc_m41t81.c.

#define M41T81REG_AMO_SQWE 0x40 /* square wave enable */

Definition at line 46 of file rtc_m41t81.c.

#define M41T81REG_ASC 0x0E /* alarm: second */

Definition at line 80 of file rtc_m41t81.c.

#define M41T81REG_ASC_RPT1 0x80 /* alarm repeat mode bit 1 */

Definition at line 53 of file rtc_m41t81.c.

#define M41T81REG_CTL 0x08 /* control */

Definition at line 74 of file rtc_m41t81.c.

#define M41T81REG_CTL_FT 0x40 /* frequency test bit */

Definition at line 36 of file rtc_m41t81.c.

#define M41T81REG_CTL_OUT 0x80 /* output level */

Definition at line 37 of file rtc_m41t81.c.

#define M41T81REG_CTL_S 0x20 /* sign bit */

Definition at line 35 of file rtc_m41t81.c.

#define M41T81REG_DT 0x05 /* date of month */

Definition at line 71 of file rtc_m41t81.c.

#define M41T81REG_DY 0x04 /* day of week */

Definition at line 70 of file rtc_m41t81.c.

#define M41T81REG_FLG 0x0F /* flags */

Definition at line 81 of file rtc_m41t81.c.

#define M41T81REG_FLG_AF 0x40 /* alarm flag (read only) */

Definition at line 54 of file rtc_m41t81.c.

#define M41T81REG_FLG_WDF 0x80 /* watchdog flag (read only) */

Definition at line 55 of file rtc_m41t81.c.

#define M41T81REG_HR 0x03 /* hour/century */

Definition at line 69 of file rtc_m41t81.c.

#define M41T81REG_HR_CB 0x40 /* century bit */

Definition at line 33 of file rtc_m41t81.c.

#define M41T81REG_HR_CEB 0x80 /* century enable bit */

Definition at line 34 of file rtc_m41t81.c.

#define M41T81REG_MN 0x02 /* minute */

Definition at line 68 of file rtc_m41t81.c.

#define M41T81REG_MO 0x06 /* month */

Definition at line 72 of file rtc_m41t81.c.

#define M41T81REG_SC 0x01 /* seconds */

Definition at line 67 of file rtc_m41t81.c.

#define M41T81REG_SC_ST 0x80 /* stop bit */

Definition at line 32 of file rtc_m41t81.c.

#define M41T81REG_SQW 0x13 /* square wave register */

Definition at line 82 of file rtc_m41t81.c.

#define M41T81REG_SQW_RS0 0x10 /* sqw frequency bit 0 */

Definition at line 56 of file rtc_m41t81.c.

#define M41T81REG_SQW_RS1 0x20 /* sqw frequency bit 1 */

Definition at line 57 of file rtc_m41t81.c.

#define M41T81REG_SQW_RS2 0x40 /* sqw frequency bit 2 */

Definition at line 58 of file rtc_m41t81.c.

#define M41T81REG_SQW_RS3 0x80 /* sqw frequency bit 3 */

Definition at line 59 of file rtc_m41t81.c.

#define M41T81REG_TSC 0x00 /* tenths/hundredths of second */

Definition at line 66 of file rtc_m41t81.c.

#define M41T81REG_WD 0x09 /* watchdog */

Definition at line 75 of file rtc_m41t81.c.

#define M41T81REG_WD_BMB0 0x04 /* watchdog multiplier bit 0 */

Definition at line 40 of file rtc_m41t81.c.

#define M41T81REG_WD_BMB1 0x08 /* watchdog multiplier bit 1 */

Definition at line 41 of file rtc_m41t81.c.

#define M41T81REG_WD_BMB2 0x10 /* watchdog multiplier bit 2 */

Definition at line 42 of file rtc_m41t81.c.

#define M41T81REG_WD_BMB3 0x20 /* watchdog multiplier bit 3 */

Definition at line 43 of file rtc_m41t81.c.

#define M41T81REG_WD_BMB4 0x40 /* watchdog multiplier bit 4 */

Definition at line 44 of file rtc_m41t81.c.

#define M41T81REG_WD_RB0 0x01 /* watchdog resolution bit 0 */

Definition at line 38 of file rtc_m41t81.c.

#define M41T81REG_WD_RB1 0x02 /* watchdog resolution bit 1 */

Definition at line 39 of file rtc_m41t81.c.

#define M41T81REG_YR 0x07 /* year */

Definition at line 73 of file rtc_m41t81.c.

#define SMB_CSR ( reg ) IOADDR(A_SMB_REGISTER(1, reg))

Definition at line 86 of file rtc_m41t81.c.

Function Documentation

unsigned long m41t81_get_time ( void )

Definition at line 191 of file rtc_m41t81.c.

int m41t81_probe ( void )

Definition at line 224 of file rtc_m41t81.c.

int m41t81_set_time ( unsigned long t )

Definition at line 144 of file rtc_m41t81.c.

Macros

Functions

Macro Definition Documentation

Function Documentation