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rtl871x_mp.h
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1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * Modifications for inclusion into the Linux staging tree are
19  * Copyright(c) 2010 Larry Finger. All rights reserved.
20  *
21  * Contact information:
22  * WLAN FAE <[email protected]>
23  * Larry Finger <[email protected]>
24  *
25  ******************************************************************************/
26 #ifndef __RTL871X_MP_H_
27 #define __RTL871X_MP_H_
28 
29 /* 00 - Success */
30 /* 11 - Error */
31 #define STATUS_SUCCESS (0x00000000L)
32 #define STATUS_PENDING (0x00000103L)
33 #define STATUS_UNSUCCESSFUL (0xC0000001L)
34 #define STATUS_INSUFFICIENT_RESOURCES (0xC000009AL)
35 #define STATUS_NOT_SUPPORTED (0xC00000BBL)
36 #define NDIS_STATUS_SUCCESS ((uint)STATUS_SUCCESS)
37 #define NDIS_STATUS_PENDING ((uint) STATUS_PENDING)
38 #define NDIS_STATUS_NOT_RECOGNIZED ((uint)0x00010001L)
39 #define NDIS_STATUS_NOT_COPIED ((uint)0x00010002L)
40 #define NDIS_STATUS_NOT_ACCEPTED ((uint)0x00010003L)
41 #define NDIS_STATUS_CALL_ACTIVE ((uint)0x00010007L)
42 #define NDIS_STATUS_FAILURE ((uint) STATUS_UNSUCCESSFUL)
43 #define NDIS_STATUS_RESOURCES ((uint)\
44  STATUS_INSUFFICIENT_RESOURCES)
45 #define NDIS_STATUS_CLOSING ((uint)0xC0010002L)
46 #define NDIS_STATUS_BAD_VERSION ((uint)0xC0010004L)
47 #define NDIS_STATUS_BAD_CHARACTERISTICS ((uint)0xC0010005L)
48 #define NDIS_STATUS_ADAPTER_NOT_FOUND ((uint)0xC0010006L)
49 #define NDIS_STATUS_OPEN_FAILED ((uint)0xC0010007L)
50 #define NDIS_STATUS_DEVICE_FAILED ((uint)0xC0010008L)
51 #define NDIS_STATUS_MULTICAST_FULL ((uint)0xC0010009L)
52 #define NDIS_STATUS_MULTICAST_EXISTS ((uint)0xC001000AL)
53 #define NDIS_STATUS_MULTICAST_NOT_FOUND ((uint)0xC001000BL)
54 #define NDIS_STATUS_REQUEST_ABORTED ((uint)0xC001000CL)
55 #define NDIS_STATUS_RESET_IN_PROGRESS ((uint)0xC001000DL)
56 #define NDIS_STATUS_CLOSING_INDICATING ((uint)0xC001000EL)
57 #define NDIS_STATUS_NOT_SUPPORTED ((uint)STATUS_NOT_SUPPORTED)
58 #define NDIS_STATUS_INVALID_PACKET ((uint)0xC001000FL)
59 #define NDIS_STATUS_OPEN_LIST_FULL ((uint)0xC0010010L)
60 #define NDIS_STATUS_ADAPTER_NOT_READY ((uint)0xC0010011L)
61 #define NDIS_STATUS_ADAPTER_NOT_OPEN ((uint)0xC0010012L)
62 #define NDIS_STATUS_NOT_INDICATING ((uint)0xC0010013L)
63 #define NDIS_STATUS_INVALID_LENGTH ((uint)0xC0010014L)
64 #define NDIS_STATUS_INVALID_DATA ((uint)0xC0010015L)
65 #define NDIS_STATUS_BUFFER_TOO_SHORT ((uint)0xC0010016L)
66 #define NDIS_STATUS_INVALID_OID ((uint)0xC0010017L)
67 #define NDIS_STATUS_ADAPTER_REMOVED ((uint)0xC0010018L)
68 #define NDIS_STATUS_UNSUPPORTED_MEDIA ((uint)0xC0010019L)
69 #define NDIS_STATUS_GROUP_ADDRESS_IN_USE ((uint)0xC001001AL)
70 #define NDIS_STATUS_FILE_NOT_FOUND ((uint)0xC001001BL)
71 #define NDIS_STATUS_ERROR_READING_FILE ((uint)0xC001001CL)
72 #define NDIS_STATUS_ALREADY_MAPPED ((uint)0xC001001DL)
73 #define NDIS_STATUS_RESOURCE_CONFLICT ((uint)0xC001001EL)
74 #define NDIS_STATUS_NO_CABLE ((uint)0xC001001FL)
75 #define NDIS_STATUS_INVALID_SAP ((uint)0xC0010020L)
76 #define NDIS_STATUS_SAP_IN_USE ((uint)0xC0010021L)
77 #define NDIS_STATUS_INVALID_ADDRESS ((uint)0xC0010022L)
78 #define NDIS_STATUS_VC_NOT_ACTIVATED ((uint)0xC0010023L)
79 #define NDIS_STATUS_DEST_OUT_OF_ORDER ((uint)0xC0010024L) /* cause 27*/
80 #define NDIS_STATUS_VC_NOT_AVAILABLE ((uint)0xC0010025L) /* 35,45*/
81 #define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((uint)0xC0010026L) /* 37*/
82 #define NDIS_STATUS_INCOMPATABLE_QOS ((uint)0xC0010027L) /* 49*/
83 #define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((uint)0xC0010028L) /* 93*/
84 #define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((uint)0xC0010029L) /* 3*/
85 #define MPT_NOOP 0
86 #define MPT_READ_MAC_1BYTE 1
87 #define MPT_READ_MAC_2BYTE 2
88 #define MPT_READ_MAC_4BYTE 3
89 #define MPT_WRITE_MAC_1BYTE 4
90 #define MPT_WRITE_MAC_2BYTE 5
91 #define MPT_WRITE_MAC_4BYTE 6
92 #define MPT_READ_BB_CCK 7
93 #define MPT_WRITE_BB_CCK 8
94 #define MPT_READ_BB_OFDM 9
95 #define MPT_WRITE_BB_OFDM 10
96 #define MPT_READ_RF 11
97 #define MPT_WRITE_RF 12
98 #define MPT_READ_EEPROM_1BYTE 13
99 #define MPT_WRITE_EEPROM_1BYTE 14
100 #define MPT_READ_EEPROM_2BYTE 15
101 #define MPT_WRITE_EEPROM_2BYTE 16
102 #define MPT_SET_CSTHRESHOLD 21
103 #define MPT_SET_INITGAIN 22
104 #define MPT_SWITCH_BAND 23
105 #define MPT_SWITCH_CHANNEL 24
106 #define MPT_SET_DATARATE 25
107 #define MPT_SWITCH_ANTENNA 26
108 #define MPT_SET_TX_POWER 27
109 #define MPT_SET_CONT_TX 28
110 #define MPT_SET_SINGLE_CARRIER 29
111 #define MPT_SET_CARRIER_SUPPRESSION 30
112 #define MPT_GET_RATE_TABLE 31
113 #define MPT_READ_TSSI 32
114 #define MPT_GET_THERMAL_METER 33
115 #define MAX_MP_XMITBUF_SZ 2048
116 #define NR_MP_XMITFRAME 8
117 
118 struct mp_xmit_frame {
119  struct list_head list;
120  struct pkt_attrib attrib;
121  _pkt *pkt;
122  int frame_tag;
123  struct _adapter *padapter;
124  u8 *mem_addr;
125  u16 sz[8];
126  struct urb *pxmit_urb[8];
127  u8 bpending[8];
128  u8 last[8];
129 };
130 
131 struct mp_wiparam {
132  u32 bcompleted;
133  u32 act_type;
134  u32 io_offset;
135  u32 io_value;
136 };
137 
138 struct mp_priv {
139  struct _adapter *papdater;
140  /*OID cmd handler*/
141  struct mp_wiparam workparam;
142  u8 act_in_progress;
143  /*Tx Section*/
144  u8 TID;
145  u32 tx_pktcount;
146  /*Rx Section*/
147  u32 rx_pktcount;
148  u32 rx_crcerrpktcount;
149  u32 rx_pktloss;
150  struct recv_stat rxstat;
151  /*RF/BB relative*/
152  u32 curr_ch;
153  u32 curr_rateidx;
154  u8 curr_bandwidth;
155  u8 curr_modem;
156  u8 curr_txpoweridx;
157  u32 curr_crystalcap;
158  u16 antenna_tx;
159  u16 antenna_rx;
160  u8 curr_rfpath;
161  u8 check_mp_pkt;
162  uint ForcedDataRate;
163  struct wlan_network mp_network;
164  unsigned char network_macaddr[6];
165  /*Testing Flag*/
166  u32 mode;/*0 for normal type packet,
167  * 1 for loopback packet (16bytes TXCMD)*/
168  sint prev_fw_state;
169  u8 *pallocated_mp_xmitframe_buf;
170  u8 *pmp_xmtframe_buf;
171  struct __queue free_mp_xmitqueue;
172  u32 free_mp_xmitframe_cnt;
173 };
174 
175 struct IOCMD_STRUCT {
176  u8 cmdclass;
177  u16 value;
178  u8 index;
179 };
180 
181 struct rf_reg_param {
182  u32 path;
183  u32 offset;
184  u32 value;
185 };
186 
187 struct bb_reg_param {
188  u32 offset;
189  u32 value;
190 };
191 /* ======================================================================= */
192 
193 #define LOWER true
194 #define RAISE false
195 #define IOCMD_CTRL_REG 0x10250370
196 #define IOCMD_DATA_REG 0x10250374
197 #define IOCMD_GET_THERMAL_METER 0xFD000028
198 #define IOCMD_CLASS_BB_RF 0xF0
199 #define IOCMD_BB_READ_IDX 0x00
200 #define IOCMD_BB_WRITE_IDX 0x01
201 #define IOCMD_RF_READ_IDX 0x02
202 #define IOCMD_RF_WRIT_IDX 0x03
203 #define BB_REG_BASE_ADDR 0x800
204 #define RF_PATH_A 0
205 #define RF_PATH_B 1
206 #define RF_PATH_C 2
207 #define RF_PATH_D 3
208 #define MAX_RF_PATH_NUMS 2
209 #define _2MAC_MODE_ 0
210 #define _LOOPBOOK_MODE_ 1
211 
212 /* MP set force data rate base on the definition. */
213 enum {
214  /* CCK rate. */
215  MPT_RATE_1M, /* 0 */
216  MPT_RATE_2M,
217  MPT_RATE_55M,
218  MPT_RATE_11M, /* 3 */
219 
220  /* OFDM rate. */
221  MPT_RATE_6M, /* 4 */
222  MPT_RATE_9M,
223  MPT_RATE_12M,
224  MPT_RATE_18M,
225  MPT_RATE_24M,
226  MPT_RATE_36M,
227  MPT_RATE_48M,
228  MPT_RATE_54M, /* 11 */
229 
230  /* HT rate. */
231  MPT_RATE_MCS0, /* 12 */
232  MPT_RATE_MCS1,
233  MPT_RATE_MCS2,
234  MPT_RATE_MCS3,
235  MPT_RATE_MCS4,
236  MPT_RATE_MCS5,
237  MPT_RATE_MCS6,
238  MPT_RATE_MCS7, /* 19 */
239  MPT_RATE_MCS8,
240  MPT_RATE_MCS9,
241  MPT_RATE_MCS10,
242  MPT_RATE_MCS11,
243  MPT_RATE_MCS12,
244  MPT_RATE_MCS13,
245  MPT_RATE_MCS14,
246  MPT_RATE_MCS15, /* 27 */
247  MPT_RATE_LAST
248 };
249 
250 /* Represent Channel Width in HT Capabilities */
251 enum HT_CHANNEL_WIDTH {
252  HT_CHANNEL_WIDTH_20 = 0,
253  HT_CHANNEL_WIDTH_40 = 1,
254 };
255 
256 #define MAX_TX_PWR_INDEX_N_MODE 64 /* 0x3F */
257 
258 enum POWER_MODE {
259  POWER_LOW = 0,
260  POWER_NORMAL
261 };
262 
263 #define RX_PKT_BROADCAST 1
264 #define RX_PKT_DEST_ADDR 2
265 #define RX_PKT_PHY_MATCH 3
266 
267 #define RPTMaxCount 0x000FFFFF;
268 
269 /* parameter 1 : BitMask
270  * bit 0 : OFDM PPDU
271  * bit 1 : OFDM False Alarm
272  * bit 2 : OFDM MPDU OK
273  * bit 3 : OFDM MPDU Fail
274  * bit 4 : CCK PPDU
275  * bit 5 : CCK False Alarm
276  * bit 6 : CCK MPDU ok
277  * bit 7 : CCK MPDU fail
278  * bit 8 : HT PPDU counter
279  * bit 9 : HT false alarm
280  * bit 10 : HT MPDU total
281  * bit 11 : HT MPDU OK
282  * bit 12 : HT MPDU fail
283  * bit 15 : RX full drop
284  */
285 enum RXPHY_BITMASK {
286  OFDM_PPDU_BIT = 0,
287  OFDM_MPDU_OK_BIT,
288  OFDM_MPDU_FAIL_BIT,
289  CCK_PPDU_BIT,
290  CCK_MPDU_OK_BIT,
291  CCK_MPDU_FAIL_BIT,
292  HT_PPDU_BIT,
293  HT_MPDU_BIT,
294  HT_MPDU_OK_BIT,
295  HT_MPDU_FAIL_BIT,
296 };
297 
298 enum ENCRY_CTRL_STATE {
299  HW_CONTROL, /*hw encryption& decryption*/
300  SW_CONTROL, /*sw encryption& decryption*/
301  HW_ENCRY_SW_DECRY, /*hw encryption & sw decryption*/
302  SW_ENCRY_HW_DECRY /*sw encryption & hw decryption*/
303 };
304 
305 /* Bandwidth Offset */
306 #define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
307 #define HAL_PRIME_CHNL_OFFSET_LOWER 1
308 #define HAL_PRIME_CHNL_OFFSET_UPPER 2
309 /*=======================================================================*/
310 void mp871xinit(struct _adapter *padapter);
311 void mp871xdeinit(struct _adapter *padapter);
312 u32 r8712_bb_reg_read(struct _adapter *Adapter, u16 offset);
313 u8 r8712_bb_reg_write(struct _adapter *Adapter, u16 offset, u32 value);
314 u32 r8712_rf_reg_read(struct _adapter *Adapter, u8 path, u8 offset);
315 u8 r8712_rf_reg_write(struct _adapter *Adapter, u8 path,
316  u8 offset, u32 value);
317 u32 r8712_get_bb_reg(struct _adapter *Adapter, u16 offset, u32 bitmask);
318 u8 r8712_set_bb_reg(struct _adapter *Adapter, u16 offset,
319  u32 bitmask, u32 value);
320 u32 r8712_get_rf_reg(struct _adapter *Adapter, u8 path, u8 offset,
321  u32 bitmask);
322 u8 r8712_set_rf_reg(struct _adapter *Adapter, u8 path, u8 offset,
323  u32 bitmask, u32 value);
324 
325 void r8712_SetChannel(struct _adapter *pAdapter);
326 void r8712_SetTxPower(struct _adapter *pAdapte);
327 void r8712_SetTxAGCOffset(struct _adapter *pAdapter, u32 ulTxAGCOffset);
328 void r8712_SetDataRate(struct _adapter *pAdapter);
329 void r8712_SwitchBandwidth(struct _adapter *pAdapter);
330 void r8712_SwitchAntenna(struct _adapter *pAdapter);
331 void r8712_SetCrystalCap(struct _adapter *pAdapter);
332 void r8712_GetThermalMeter(struct _adapter *pAdapter, u32 *value);
333 void r8712_SetContinuousTx(struct _adapter *pAdapter, u8 bStart);
334 void r8712_SetSingleCarrierTx(struct _adapter *pAdapter, u8 bStart);
335 void r8712_SetSingleToneTx(struct _adapter *pAdapter, u8 bStart);
336 void r8712_SetCarrierSuppressionTx(struct _adapter *pAdapter, u8 bStart);
337 void r8712_ResetPhyRxPktCount(struct _adapter *pAdapter);
338 u32 r8712_GetPhyRxPktReceived(struct _adapter *pAdapter);
339 u32 r8712_GetPhyRxPktCRC32Error(struct _adapter *pAdapter);
340 
341 #endif /*__RTL871X_MP_H_*/
342 
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