19 static const char *s0box_revision =
"$Revision: 2.6.2.4 $";
25 outb_p((addr + off) & 0x7f, padr);
33 static u_char nibtab[] = { 1, 9, 5, 0xd, 3, 0xb, 7, 0xf,
34 0, 0, 0, 0, 0, 0, 0, 0,
35 0, 8, 4, 0xc, 2, 0xa, 6, 0xe };
43 outb_p((addr + off) | 0x80, padr);
46 n1 = (
inb_p(padr + 1) >> 3) & 0x17;
48 n2 = (
inb_p(padr + 1) >> 3) & 0x17;
51 return nibtab[n1] | (nibtab[n2] << 4);
55 read_fifo(
unsigned int padr,
signed int adr,
u_char *
data,
int size)
64 for (i = 0; i <
size; i++) {
66 n1 = (
inb_p(padr + 1) >> 3) & 0x17;
68 n2 = (
inb_p(padr + 1) >> 3) & 0x17;
69 *(data++) = nibtab[n1] | (nibtab[n2] << 4);
77 write_fifo(
unsigned int padr,
signed int adr,
u_char *data,
int size)
83 for (i = 0; i <
size; i++) {
98 return (
readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, offset));
104 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, offset, value);
108 ReadISACfifo(
struct IsdnCardState *cs,
u_char *data,
int size)
110 read_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.isacfifo, data, size);
114 WriteISACfifo(
struct IsdnCardState *cs,
u_char *data,
int size)
116 write_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.isacfifo, data, size);
122 return (
readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[hscx], offset));
128 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[hscx], offset, value);
135 #define READHSCX(cs, nr, reg) readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[nr], reg)
136 #define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[nr], reg, data)
137 #define READHSCXFIFO(cs, nr, ptr, cnt) read_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscxfifo[nr], ptr, cnt)
138 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) write_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscxfifo[nr], ptr, cnt)
143 s0box_interrupt(
int intno,
void *
dev_id)
146 struct IsdnCardState *cs =
dev_id;
155 hscx_int_main(cs, val);
163 if (cs->debug & L1_DEB_HSCX)
164 debugl1(cs,
"HSCX IntStat after IntRoutine");
169 if (cs->debug & L1_DEB_ISAC)
170 debugl1(cs,
"ISAC IntStat after IntRoutine");
181 spin_unlock_irqrestore(&cs->lock, flags);
186 release_io_s0box(
struct IsdnCardState *cs)
192 S0Box_card_msg(
struct IsdnCardState *cs,
int mt,
void *
arg)
200 release_io_s0box(cs);
205 spin_unlock_irqrestore(&cs->lock, flags);
216 struct IsdnCardState *cs = card->
cs;
219 strcpy(tmp, s0box_revision);
224 cs->hw.teles3.cfg_reg = card->
para[1];
225 cs->hw.teles3.hscx[0] = -0x20;
226 cs->hw.teles3.hscx[1] = 0x0;
227 cs->hw.teles3.isac = 0x20;
228 cs->hw.teles3.isacfifo = cs->hw.teles3.isac + 0x3e;
229 cs->hw.teles3.hscxfifo[0] = cs->hw.teles3.hscx[0] + 0x3e;
230 cs->hw.teles3.hscxfifo[1] = cs->hw.teles3.hscx[1] + 0x3e;
231 cs->irq = card->
para[0];
232 if (!
request_region(cs->hw.teles3.cfg_reg, 8,
"S0Box parallel I/O")) {
234 cs->hw.teles3.cfg_reg,
235 cs->hw.teles3.cfg_reg + 7);
240 cs->hw.teles3.isac, cs->hw.teles3.cfg_reg);
242 cs->hw.teles3.hscx[0], cs->hw.teles3.hscx[1]);
246 cs->readisacfifo = &ReadISACfifo;
247 cs->writeisacfifo = &WriteISACfifo;
250 cs->BC_Send_Data = &hscx_fill_fifo;
251 cs->cardmsg = &S0Box_card_msg;
252 cs->irq_func = &s0box_interrupt;
256 "S0Box: wrong HSCX versions check IO address\n");
257 release_io_s0box(cs);