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sa1100.c
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1 /*
2  * Driver for SA11x0 serial ports
3  *
4  * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
5  *
6  * Copyright (C) 2000 Deep Blue Solutions Ltd.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21  */
22 
23 #if defined(CONFIG_SERIAL_SA1100_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
24 #define SUPPORT_SYSRQ
25 #endif
26 
27 #include <linux/module.h>
28 #include <linux/ioport.h>
29 #include <linux/init.h>
30 #include <linux/console.h>
31 #include <linux/sysrq.h>
32 #include <linux/platform_device.h>
33 #include <linux/tty.h>
34 #include <linux/tty_flip.h>
35 #include <linux/serial_core.h>
36 #include <linux/serial.h>
37 #include <linux/io.h>
38 
39 #include <asm/irq.h>
40 #include <mach/hardware.h>
41 #include <mach/irqs.h>
42 #include <asm/mach/serial_sa1100.h>
43 
44 /* We've been assigned a range on the "Low-density serial ports" major */
45 #define SERIAL_SA1100_MAJOR 204
46 #define MINOR_START 5
47 
48 #define NR_PORTS 3
49 
50 #define SA1100_ISR_PASS_LIMIT 256
51 
52 /*
53  * Convert from ignore_status_mask or read_status_mask to UTSR[01]
54  */
55 #define SM_TO_UTSR0(x) ((x) & 0xff)
56 #define SM_TO_UTSR1(x) ((x) >> 8)
57 #define UTSR0_TO_SM(x) ((x))
58 #define UTSR1_TO_SM(x) ((x) << 8)
59 
60 #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
61 #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
62 #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
63 #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
64 #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
65 #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
66 #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
67 
68 #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0)
69 #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1)
70 #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2)
71 #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3)
72 #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0)
73 #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1)
74 #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR)
75 
76 /*
77  * This is the size of our serial port register set.
78  */
79 #define UART_PORT_SIZE 0x24
80 
81 /*
82  * This determines how often we check the modem status signals
83  * for any change. They generally aren't connected to an IRQ
84  * so we have to poll them. We also check immediately before
85  * filling the TX fifo incase CTS has been dropped.
86  */
87 #define MCTRL_TIMEOUT (250*HZ/1000)
88 
89 struct sa1100_port {
90  struct uart_port port;
91  struct timer_list timer;
92  unsigned int old_status;
93 };
94 
95 /*
96  * Handle any change of modem status signal since we were last called.
97  */
98 static void sa1100_mctrl_check(struct sa1100_port *sport)
99 {
100  unsigned int status, changed;
101 
102  status = sport->port.ops->get_mctrl(&sport->port);
103  changed = status ^ sport->old_status;
104 
105  if (changed == 0)
106  return;
107 
108  sport->old_status = status;
109 
110  if (changed & TIOCM_RI)
111  sport->port.icount.rng++;
112  if (changed & TIOCM_DSR)
113  sport->port.icount.dsr++;
114  if (changed & TIOCM_CAR)
115  uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
116  if (changed & TIOCM_CTS)
117  uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
118 
119  wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
120 }
121 
122 /*
123  * This is our per-port timeout handler, for checking the
124  * modem status signals.
125  */
126 static void sa1100_timeout(unsigned long data)
127 {
128  struct sa1100_port *sport = (struct sa1100_port *)data;
129  unsigned long flags;
130 
131  if (sport->port.state) {
132  spin_lock_irqsave(&sport->port.lock, flags);
133  sa1100_mctrl_check(sport);
134  spin_unlock_irqrestore(&sport->port.lock, flags);
135 
136  mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
137  }
138 }
139 
140 /*
141  * interrupts disabled on entry
142  */
143 static void sa1100_stop_tx(struct uart_port *port)
144 {
145  struct sa1100_port *sport = (struct sa1100_port *)port;
146  u32 utcr3;
147 
148  utcr3 = UART_GET_UTCR3(sport);
149  UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE);
150  sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
151 }
152 
153 /*
154  * port locked and interrupts disabled
155  */
156 static void sa1100_start_tx(struct uart_port *port)
157 {
158  struct sa1100_port *sport = (struct sa1100_port *)port;
159  u32 utcr3;
160 
161  utcr3 = UART_GET_UTCR3(sport);
162  sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
163  UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE);
164 }
165 
166 /*
167  * Interrupts enabled
168  */
169 static void sa1100_stop_rx(struct uart_port *port)
170 {
171  struct sa1100_port *sport = (struct sa1100_port *)port;
172  u32 utcr3;
173 
174  utcr3 = UART_GET_UTCR3(sport);
175  UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE);
176 }
177 
178 /*
179  * Set the modem control timer to fire immediately.
180  */
181 static void sa1100_enable_ms(struct uart_port *port)
182 {
183  struct sa1100_port *sport = (struct sa1100_port *)port;
184 
185  mod_timer(&sport->timer, jiffies);
186 }
187 
188 static void
189 sa1100_rx_chars(struct sa1100_port *sport)
190 {
191  struct tty_struct *tty = sport->port.state->port.tty;
192  unsigned int status, ch, flg;
193 
194  status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
195  UTSR0_TO_SM(UART_GET_UTSR0(sport));
196  while (status & UTSR1_TO_SM(UTSR1_RNE)) {
197  ch = UART_GET_CHAR(sport);
198 
199  sport->port.icount.rx++;
200 
201  flg = TTY_NORMAL;
202 
203  /*
204  * note that the error handling code is
205  * out of the main execution path
206  */
207  if (status & UTSR1_TO_SM(UTSR1_PRE | UTSR1_FRE | UTSR1_ROR)) {
208  if (status & UTSR1_TO_SM(UTSR1_PRE))
209  sport->port.icount.parity++;
210  else if (status & UTSR1_TO_SM(UTSR1_FRE))
211  sport->port.icount.frame++;
212  if (status & UTSR1_TO_SM(UTSR1_ROR))
213  sport->port.icount.overrun++;
214 
215  status &= sport->port.read_status_mask;
216 
217  if (status & UTSR1_TO_SM(UTSR1_PRE))
218  flg = TTY_PARITY;
219  else if (status & UTSR1_TO_SM(UTSR1_FRE))
220  flg = TTY_FRAME;
221 
222 #ifdef SUPPORT_SYSRQ
223  sport->port.sysrq = 0;
224 #endif
225  }
226 
227  if (uart_handle_sysrq_char(&sport->port, ch))
228  goto ignore_char;
229 
230  uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg);
231 
232  ignore_char:
233  status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
234  UTSR0_TO_SM(UART_GET_UTSR0(sport));
235  }
237 }
238 
239 static void sa1100_tx_chars(struct sa1100_port *sport)
240 {
241  struct circ_buf *xmit = &sport->port.state->xmit;
242 
243  if (sport->port.x_char) {
244  UART_PUT_CHAR(sport, sport->port.x_char);
245  sport->port.icount.tx++;
246  sport->port.x_char = 0;
247  return;
248  }
249 
250  /*
251  * Check the modem control lines before
252  * transmitting anything.
253  */
254  sa1100_mctrl_check(sport);
255 
256  if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
257  sa1100_stop_tx(&sport->port);
258  return;
259  }
260 
261  /*
262  * Tried using FIFO (not checking TNF) for fifo fill:
263  * still had the '4 bytes repeated' problem.
264  */
265  while (UART_GET_UTSR1(sport) & UTSR1_TNF) {
266  UART_PUT_CHAR(sport, xmit->buf[xmit->tail]);
267  xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
268  sport->port.icount.tx++;
269  if (uart_circ_empty(xmit))
270  break;
271  }
272 
274  uart_write_wakeup(&sport->port);
275 
276  if (uart_circ_empty(xmit))
277  sa1100_stop_tx(&sport->port);
278 }
279 
280 static irqreturn_t sa1100_int(int irq, void *dev_id)
281 {
282  struct sa1100_port *sport = dev_id;
283  unsigned int status, pass_counter = 0;
284 
285  spin_lock(&sport->port.lock);
286  status = UART_GET_UTSR0(sport);
287  status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
288  do {
289  if (status & (UTSR0_RFS | UTSR0_RID)) {
290  /* Clear the receiver idle bit, if set */
291  if (status & UTSR0_RID)
292  UART_PUT_UTSR0(sport, UTSR0_RID);
293  sa1100_rx_chars(sport);
294  }
295 
296  /* Clear the relevant break bits */
297  if (status & (UTSR0_RBB | UTSR0_REB))
298  UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB));
299 
300  if (status & UTSR0_RBB)
301  sport->port.icount.brk++;
302 
303  if (status & UTSR0_REB)
304  uart_handle_break(&sport->port);
305 
306  if (status & UTSR0_TFS)
307  sa1100_tx_chars(sport);
308  if (pass_counter++ > SA1100_ISR_PASS_LIMIT)
309  break;
310  status = UART_GET_UTSR0(sport);
311  status &= SM_TO_UTSR0(sport->port.read_status_mask) |
312  ~UTSR0_TFS;
313  } while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID));
314  spin_unlock(&sport->port.lock);
315 
316  return IRQ_HANDLED;
317 }
318 
319 /*
320  * Return TIOCSER_TEMT when transmitter is not busy.
321  */
322 static unsigned int sa1100_tx_empty(struct uart_port *port)
323 {
324  struct sa1100_port *sport = (struct sa1100_port *)port;
325 
326  return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT;
327 }
328 
329 static unsigned int sa1100_get_mctrl(struct uart_port *port)
330 {
331  return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
332 }
333 
334 static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl)
335 {
336 }
337 
338 /*
339  * Interrupts always disabled.
340  */
341 static void sa1100_break_ctl(struct uart_port *port, int break_state)
342 {
343  struct sa1100_port *sport = (struct sa1100_port *)port;
344  unsigned long flags;
345  unsigned int utcr3;
346 
347  spin_lock_irqsave(&sport->port.lock, flags);
348  utcr3 = UART_GET_UTCR3(sport);
349  if (break_state == -1)
350  utcr3 |= UTCR3_BRK;
351  else
352  utcr3 &= ~UTCR3_BRK;
353  UART_PUT_UTCR3(sport, utcr3);
354  spin_unlock_irqrestore(&sport->port.lock, flags);
355 }
356 
357 static int sa1100_startup(struct uart_port *port)
358 {
359  struct sa1100_port *sport = (struct sa1100_port *)port;
360  int retval;
361 
362  /*
363  * Allocate the IRQ
364  */
365  retval = request_irq(sport->port.irq, sa1100_int, 0,
366  "sa11x0-uart", sport);
367  if (retval)
368  return retval;
369 
370  /*
371  * Finally, clear and enable interrupts
372  */
373  UART_PUT_UTSR0(sport, -1);
375 
376  /*
377  * Enable modem status interrupts
378  */
379  spin_lock_irq(&sport->port.lock);
380  sa1100_enable_ms(&sport->port);
381  spin_unlock_irq(&sport->port.lock);
382 
383  return 0;
384 }
385 
386 static void sa1100_shutdown(struct uart_port *port)
387 {
388  struct sa1100_port *sport = (struct sa1100_port *)port;
389 
390  /*
391  * Stop our timer.
392  */
393  del_timer_sync(&sport->timer);
394 
395  /*
396  * Free the interrupt
397  */
398  free_irq(sport->port.irq, sport);
399 
400  /*
401  * Disable all interrupts, port and break condition.
402  */
403  UART_PUT_UTCR3(sport, 0);
404 }
405 
406 static void
407 sa1100_set_termios(struct uart_port *port, struct ktermios *termios,
408  struct ktermios *old)
409 {
410  struct sa1100_port *sport = (struct sa1100_port *)port;
411  unsigned long flags;
412  unsigned int utcr0, old_utcr3, baud, quot;
413  unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
414 
415  /*
416  * We only support CS7 and CS8.
417  */
418  while ((termios->c_cflag & CSIZE) != CS7 &&
419  (termios->c_cflag & CSIZE) != CS8) {
420  termios->c_cflag &= ~CSIZE;
421  termios->c_cflag |= old_csize;
422  old_csize = CS8;
423  }
424 
425  if ((termios->c_cflag & CSIZE) == CS8)
426  utcr0 = UTCR0_DSS;
427  else
428  utcr0 = 0;
429 
430  if (termios->c_cflag & CSTOPB)
431  utcr0 |= UTCR0_SBS;
432  if (termios->c_cflag & PARENB) {
433  utcr0 |= UTCR0_PE;
434  if (!(termios->c_cflag & PARODD))
435  utcr0 |= UTCR0_OES;
436  }
437 
438  /*
439  * Ask the core to calculate the divisor for us.
440  */
441  baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
442  quot = uart_get_divisor(port, baud);
443 
444  spin_lock_irqsave(&sport->port.lock, flags);
445 
446  sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
447  sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
448  if (termios->c_iflag & INPCK)
449  sport->port.read_status_mask |=
451  if (termios->c_iflag & (BRKINT | PARMRK))
452  sport->port.read_status_mask |=
453  UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
454 
455  /*
456  * Characters to ignore
457  */
458  sport->port.ignore_status_mask = 0;
459  if (termios->c_iflag & IGNPAR)
460  sport->port.ignore_status_mask |=
462  if (termios->c_iflag & IGNBRK) {
463  sport->port.ignore_status_mask |=
464  UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
465  /*
466  * If we're ignoring parity and break indicators,
467  * ignore overruns too (for real raw support).
468  */
469  if (termios->c_iflag & IGNPAR)
470  sport->port.ignore_status_mask |=
472  }
473 
474  del_timer_sync(&sport->timer);
475 
476  /*
477  * Update the per-port timeout.
478  */
479  uart_update_timeout(port, termios->c_cflag, baud);
480 
481  /*
482  * disable interrupts and drain transmitter
483  */
484  old_utcr3 = UART_GET_UTCR3(sport);
485  UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE));
486 
487  while (UART_GET_UTSR1(sport) & UTSR1_TBY)
488  barrier();
489 
490  /* then, disable everything */
491  UART_PUT_UTCR3(sport, 0);
492 
493  /* set the parity, stop bits and data size */
494  UART_PUT_UTCR0(sport, utcr0);
495 
496  /* set the baud rate */
497  quot -= 1;
498  UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8));
499  UART_PUT_UTCR2(sport, (quot & 0xff));
500 
501  UART_PUT_UTSR0(sport, -1);
502 
503  UART_PUT_UTCR3(sport, old_utcr3);
504 
505  if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
506  sa1100_enable_ms(&sport->port);
507 
508  spin_unlock_irqrestore(&sport->port.lock, flags);
509 }
510 
511 static const char *sa1100_type(struct uart_port *port)
512 {
513  struct sa1100_port *sport = (struct sa1100_port *)port;
514 
515  return sport->port.type == PORT_SA1100 ? "SA1100" : NULL;
516 }
517 
518 /*
519  * Release the memory region(s) being used by 'port'.
520  */
521 static void sa1100_release_port(struct uart_port *port)
522 {
523  struct sa1100_port *sport = (struct sa1100_port *)port;
524 
525  release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
526 }
527 
528 /*
529  * Request the memory region(s) being used by 'port'.
530  */
531 static int sa1100_request_port(struct uart_port *port)
532 {
533  struct sa1100_port *sport = (struct sa1100_port *)port;
534 
535  return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
536  "sa11x0-uart") != NULL ? 0 : -EBUSY;
537 }
538 
539 /*
540  * Configure/autoconfigure the port.
541  */
542 static void sa1100_config_port(struct uart_port *port, int flags)
543 {
544  struct sa1100_port *sport = (struct sa1100_port *)port;
545 
546  if (flags & UART_CONFIG_TYPE &&
547  sa1100_request_port(&sport->port) == 0)
548  sport->port.type = PORT_SA1100;
549 }
550 
551 /*
552  * Verify the new serial_struct (for TIOCSSERIAL).
553  * The only change we allow are to the flags and type, and
554  * even then only between PORT_SA1100 and PORT_UNKNOWN
555  */
556 static int
557 sa1100_verify_port(struct uart_port *port, struct serial_struct *ser)
558 {
559  struct sa1100_port *sport = (struct sa1100_port *)port;
560  int ret = 0;
561 
562  if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100)
563  ret = -EINVAL;
564  if (sport->port.irq != ser->irq)
565  ret = -EINVAL;
566  if (ser->io_type != SERIAL_IO_MEM)
567  ret = -EINVAL;
568  if (sport->port.uartclk / 16 != ser->baud_base)
569  ret = -EINVAL;
570  if ((void *)sport->port.mapbase != ser->iomem_base)
571  ret = -EINVAL;
572  if (sport->port.iobase != ser->port)
573  ret = -EINVAL;
574  if (ser->hub6 != 0)
575  ret = -EINVAL;
576  return ret;
577 }
578 
579 static struct uart_ops sa1100_pops = {
580  .tx_empty = sa1100_tx_empty,
581  .set_mctrl = sa1100_set_mctrl,
582  .get_mctrl = sa1100_get_mctrl,
583  .stop_tx = sa1100_stop_tx,
584  .start_tx = sa1100_start_tx,
585  .stop_rx = sa1100_stop_rx,
586  .enable_ms = sa1100_enable_ms,
587  .break_ctl = sa1100_break_ctl,
588  .startup = sa1100_startup,
589  .shutdown = sa1100_shutdown,
590  .set_termios = sa1100_set_termios,
591  .type = sa1100_type,
592  .release_port = sa1100_release_port,
593  .request_port = sa1100_request_port,
594  .config_port = sa1100_config_port,
595  .verify_port = sa1100_verify_port,
596 };
597 
598 static struct sa1100_port sa1100_ports[NR_PORTS];
599 
600 /*
601  * Setup the SA1100 serial ports. Note that we don't include the IrDA
602  * port here since we have our own SIR/FIR driver (see drivers/net/irda)
603  *
604  * Note also that we support "console=ttySAx" where "x" is either 0 or 1.
605  * Which serial port this ends up being depends on the machine you're
606  * running this kernel on. I'm not convinced that this is a good idea,
607  * but that's the way it traditionally works.
608  *
609  * Note that NanoEngine UART3 becomes UART2, and UART2 is no longer
610  * used here.
611  */
612 static void __init sa1100_init_ports(void)
613 {
614  static int first = 1;
615  int i;
616 
617  if (!first)
618  return;
619  first = 0;
620 
621  for (i = 0; i < NR_PORTS; i++) {
622  sa1100_ports[i].port.uartclk = 3686400;
623  sa1100_ports[i].port.ops = &sa1100_pops;
624  sa1100_ports[i].port.fifosize = 8;
625  sa1100_ports[i].port.line = i;
626  sa1100_ports[i].port.iotype = UPIO_MEM;
627  init_timer(&sa1100_ports[i].timer);
628  sa1100_ports[i].timer.function = sa1100_timeout;
629  sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i];
630  }
631 
632  /*
633  * make transmit lines outputs, so that when the port
634  * is closed, the output is in the MARK state.
635  */
636  PPDR |= PPC_TXD1 | PPC_TXD3;
637  PPSR |= PPC_TXD1 | PPC_TXD3;
638 }
639 
641 {
642  if (fns->get_mctrl)
643  sa1100_pops.get_mctrl = fns->get_mctrl;
644  if (fns->set_mctrl)
645  sa1100_pops.set_mctrl = fns->set_mctrl;
646 
647  sa1100_pops.pm = fns->pm;
648  sa1100_pops.set_wake = fns->set_wake;
649 }
650 
651 void __init sa1100_register_uart(int idx, int port)
652 {
653  if (idx >= NR_PORTS) {
654  printk(KERN_ERR "%s: bad index number %d\n", __func__, idx);
655  return;
656  }
657 
658  switch (port) {
659  case 1:
660  sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
661  sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
662  sa1100_ports[idx].port.irq = IRQ_Ser1UART;
663  sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
664  break;
665 
666  case 2:
667  sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
668  sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
669  sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
670  sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
671  break;
672 
673  case 3:
674  sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
675  sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
676  sa1100_ports[idx].port.irq = IRQ_Ser3UART;
677  sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
678  break;
679 
680  default:
681  printk(KERN_ERR "%s: bad port number %d\n", __func__, port);
682  }
683 }
684 
685 
686 #ifdef CONFIG_SERIAL_SA1100_CONSOLE
687 static void sa1100_console_putchar(struct uart_port *port, int ch)
688 {
689  struct sa1100_port *sport = (struct sa1100_port *)port;
690 
691  while (!(UART_GET_UTSR1(sport) & UTSR1_TNF))
692  barrier();
693  UART_PUT_CHAR(sport, ch);
694 }
695 
696 /*
697  * Interrupts are disabled on entering
698  */
699 static void
700 sa1100_console_write(struct console *co, const char *s, unsigned int count)
701 {
702  struct sa1100_port *sport = &sa1100_ports[co->index];
703  unsigned int old_utcr3, status;
704 
705  /*
706  * First, save UTCR3 and then disable interrupts
707  */
708  old_utcr3 = UART_GET_UTCR3(sport);
709  UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) |
710  UTCR3_TXE);
711 
712  uart_console_write(&sport->port, s, count, sa1100_console_putchar);
713 
714  /*
715  * Finally, wait for transmitter to become empty
716  * and restore UTCR3
717  */
718  do {
719  status = UART_GET_UTSR1(sport);
720  } while (status & UTSR1_TBY);
721  UART_PUT_UTCR3(sport, old_utcr3);
722 }
723 
724 /*
725  * If the port was already initialised (eg, by a boot loader),
726  * try to determine the current setup.
727  */
728 static void __init
729 sa1100_console_get_options(struct sa1100_port *sport, int *baud,
730  int *parity, int *bits)
731 {
732  unsigned int utcr3;
733 
734  utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE);
735  if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) {
736  /* ok, the port was enabled */
737  unsigned int utcr0, quot;
738 
739  utcr0 = UART_GET_UTCR0(sport);
740 
741  *parity = 'n';
742  if (utcr0 & UTCR0_PE) {
743  if (utcr0 & UTCR0_OES)
744  *parity = 'e';
745  else
746  *parity = 'o';
747  }
748 
749  if (utcr0 & UTCR0_DSS)
750  *bits = 8;
751  else
752  *bits = 7;
753 
754  quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8;
755  quot &= 0xfff;
756  *baud = sport->port.uartclk / (16 * (quot + 1));
757  }
758 }
759 
760 static int __init
761 sa1100_console_setup(struct console *co, char *options)
762 {
763  struct sa1100_port *sport;
764  int baud = 9600;
765  int bits = 8;
766  int parity = 'n';
767  int flow = 'n';
768 
769  /*
770  * Check whether an invalid uart number has been specified, and
771  * if so, search for the first available port that does have
772  * console support.
773  */
774  if (co->index == -1 || co->index >= NR_PORTS)
775  co->index = 0;
776  sport = &sa1100_ports[co->index];
777 
778  if (options)
779  uart_parse_options(options, &baud, &parity, &bits, &flow);
780  else
781  sa1100_console_get_options(sport, &baud, &parity, &bits);
782 
783  return uart_set_options(&sport->port, co, baud, parity, bits, flow);
784 }
785 
786 static struct uart_driver sa1100_reg;
787 static struct console sa1100_console = {
788  .name = "ttySA",
789  .write = sa1100_console_write,
790  .device = uart_console_device,
791  .setup = sa1100_console_setup,
792  .flags = CON_PRINTBUFFER,
793  .index = -1,
794  .data = &sa1100_reg,
795 };
796 
797 static int __init sa1100_rs_console_init(void)
798 {
799  sa1100_init_ports();
800  register_console(&sa1100_console);
801  return 0;
802 }
803 console_initcall(sa1100_rs_console_init);
804 
805 #define SA1100_CONSOLE &sa1100_console
806 #else
807 #define SA1100_CONSOLE NULL
808 #endif
809 
810 static struct uart_driver sa1100_reg = {
811  .owner = THIS_MODULE,
812  .driver_name = "ttySA",
813  .dev_name = "ttySA",
814  .major = SERIAL_SA1100_MAJOR,
815  .minor = MINOR_START,
816  .nr = NR_PORTS,
817  .cons = SA1100_CONSOLE,
818 };
819 
820 static int sa1100_serial_suspend(struct platform_device *dev, pm_message_t state)
821 {
822  struct sa1100_port *sport = platform_get_drvdata(dev);
823 
824  if (sport)
825  uart_suspend_port(&sa1100_reg, &sport->port);
826 
827  return 0;
828 }
829 
830 static int sa1100_serial_resume(struct platform_device *dev)
831 {
832  struct sa1100_port *sport = platform_get_drvdata(dev);
833 
834  if (sport)
835  uart_resume_port(&sa1100_reg, &sport->port);
836 
837  return 0;
838 }
839 
840 static int sa1100_serial_probe(struct platform_device *dev)
841 {
842  struct resource *res = dev->resource;
843  int i;
844 
845  for (i = 0; i < dev->num_resources; i++, res++)
846  if (res->flags & IORESOURCE_MEM)
847  break;
848 
849  if (i < dev->num_resources) {
850  for (i = 0; i < NR_PORTS; i++) {
851  if (sa1100_ports[i].port.mapbase != res->start)
852  continue;
853 
854  sa1100_ports[i].port.dev = &dev->dev;
855  uart_add_one_port(&sa1100_reg, &sa1100_ports[i].port);
856  platform_set_drvdata(dev, &sa1100_ports[i]);
857  break;
858  }
859  }
860 
861  return 0;
862 }
863 
864 static int sa1100_serial_remove(struct platform_device *pdev)
865 {
866  struct sa1100_port *sport = platform_get_drvdata(pdev);
867 
868  platform_set_drvdata(pdev, NULL);
869 
870  if (sport)
871  uart_remove_one_port(&sa1100_reg, &sport->port);
872 
873  return 0;
874 }
875 
876 static struct platform_driver sa11x0_serial_driver = {
877  .probe = sa1100_serial_probe,
878  .remove = sa1100_serial_remove,
879  .suspend = sa1100_serial_suspend,
880  .resume = sa1100_serial_resume,
881  .driver = {
882  .name = "sa11x0-uart",
883  .owner = THIS_MODULE,
884  },
885 };
886 
887 static int __init sa1100_serial_init(void)
888 {
889  int ret;
890 
891  printk(KERN_INFO "Serial: SA11x0 driver\n");
892 
893  sa1100_init_ports();
894 
895  ret = uart_register_driver(&sa1100_reg);
896  if (ret == 0) {
897  ret = platform_driver_register(&sa11x0_serial_driver);
898  if (ret)
899  uart_unregister_driver(&sa1100_reg);
900  }
901  return ret;
902 }
903 
904 static void __exit sa1100_serial_exit(void)
905 {
906  platform_driver_unregister(&sa11x0_serial_driver);
907  uart_unregister_driver(&sa1100_reg);
908 }
909 
910 module_init(sa1100_serial_init);
911 module_exit(sa1100_serial_exit);
912 
913 MODULE_AUTHOR("Deep Blue Solutions Ltd");
914 MODULE_DESCRIPTION("SA1100 generic serial port driver");
915 MODULE_LICENSE("GPL");
917 MODULE_ALIAS("platform:sa11x0-uart");