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Linux Kernel
3.7.1
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#include <linux/module.h>#include <linux/errno.h>#include <linux/signal.h>#include <linux/sched.h>#include <linux/timer.h>#include <linux/time.h>#include <linux/interrupt.h>#include <linux/tty.h>#include <linux/tty_flip.h>#include <linux/serial.h>#include <linux/major.h>#include <linux/string.h>#include <linux/fcntl.h>#include <linux/ptrace.h>#include <linux/ioport.h>#include <linux/mm.h>#include <linux/seq_file.h>#include <linux/slab.h>#include <linux/netdevice.h>#include <linux/vmalloc.h>#include <linux/init.h>#include <linux/delay.h>#include <linux/ioctl.h>#include <linux/synclink.h>#include <asm/io.h>#include <asm/irq.h>#include <asm/dma.h>#include <linux/bitops.h>#include <asm/types.h>#include <linux/termios.h>#include <linux/workqueue.h>#include <linux/hdlc.h>#include <pcmcia/cistpl.h>#include <pcmcia/cisreg.h>#include <pcmcia/ds.h>#include <asm/uaccess.h>Go to the source code of this file.
Data Structures | |
| struct | RXBUF |
| struct | _input_signal_events |
| struct | _mgslpc_info |
Macros | |
| #define | VERSION(ver, rel, seq) (((ver)<<16) | ((rel)<<8) | (seq)) |
| #define | BREAKPOINT() { } |
| #define | MAX_DEVICE_COUNT 4 |
| #define | SYNCLINK_GENERIC_HDLC 0 |
| #define | GET_USER(error, value, addr) error = get_user(value,addr) |
| #define | COPY_FROM_USER(error, dest, src, size) error = copy_from_user(dest,src,size) ? -EFAULT : 0 |
| #define | PUT_USER(error, value, addr) error = put_user(value,addr) |
| #define | COPY_TO_USER(error, dest, src, size) error = copy_to_user(dest,src,size) ? -EFAULT : 0 |
| #define | BH_RECEIVE 1 |
| #define | BH_TRANSMIT 2 |
| #define | BH_STATUS 4 |
| #define | IO_PIN_SHUTDOWN_LIMIT 100 |
| #define | RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) |
| #define | MGSLPC_MAGIC 0x5402 |
| #define | TXBUFSIZE 4096 |
| #define | CHA 0x00 /* channel A offset */ |
| #define | CHB 0x40 /* channel B offset */ |
| #define | RXFIFO 0 |
| #define | TXFIFO 0 |
| #define | STAR 0x20 |
| #define | CMDR 0x20 |
| #define | RSTA 0x21 |
| #define | PRE 0x21 |
| #define | MODE 0x22 |
| #define | TIMR 0x23 |
| #define | XAD1 0x24 |
| #define | XAD2 0x25 |
| #define | RAH1 0x26 |
| #define | RAH2 0x27 |
| #define | DAFO 0x27 |
| #define | RAL1 0x28 |
| #define | RFC 0x28 |
| #define | RHCR 0x29 |
| #define | RAL2 0x29 |
| #define | RBCL 0x2a |
| #define | XBCL 0x2a |
| #define | RBCH 0x2b |
| #define | XBCH 0x2b |
| #define | CCR0 0x2c |
| #define | CCR1 0x2d |
| #define | CCR2 0x2e |
| #define | CCR3 0x2f |
| #define | VSTR 0x34 |
| #define | BGR 0x34 |
| #define | RLCR 0x35 |
| #define | AML 0x36 |
| #define | AMH 0x37 |
| #define | GIS 0x38 |
| #define | IVA 0x38 |
| #define | IPC 0x39 |
| #define | ISR 0x3a |
| #define | IMR 0x3a |
| #define | PVR 0x3c |
| #define | PIS 0x3d |
| #define | PIM 0x3d |
| #define | PCR 0x3e |
| #define | CCR4 0x3f |
| #define | IRQ_BREAK_ON BIT15 |
| #define | IRQ_DATAOVERRUN BIT14 |
| #define | IRQ_ALLSENT BIT13 |
| #define | IRQ_UNDERRUN BIT12 |
| #define | IRQ_TIMER BIT11 |
| #define | IRQ_CTS BIT10 |
| #define | IRQ_TXREPEAT BIT9 |
| #define | IRQ_TXFIFO BIT8 |
| #define | IRQ_RXEOM BIT7 |
| #define | IRQ_EXITHUNT BIT6 |
| #define | IRQ_RXTIME BIT6 |
| #define | IRQ_DCD BIT2 |
| #define | IRQ_OVERRUN BIT1 |
| #define | IRQ_RXFIFO BIT0 |
| #define | XFW BIT6 |
| #define | CEC BIT2 |
| #define | CTS BIT1 |
| #define | PVR_DTR BIT0 |
| #define | PVR_DSR BIT1 |
| #define | PVR_RI BIT2 |
| #define | PVR_AUTOCTS BIT3 |
| #define | PVR_RS232 0x20 /* 0010b */ |
| #define | PVR_V35 0xe0 /* 1110b */ |
| #define | PVR_RS422 0x40 /* 0100b */ |
| #define | write_reg(info, reg, val) outb((val),(info)->io_base + (reg)) |
| #define | read_reg(info, reg) inb((info)->io_base + (reg)) |
| #define | read_reg16(info, reg) inw((info)->io_base + (reg)) |
| #define | write_reg16(info, reg, val) outw((val), (info)->io_base + (reg)) |
| #define | set_reg_bits(info, reg, mask) |
| #define | clear_reg_bits(info, reg, mask) |
| #define | port_irq_disable(info, mask) { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); } |
| #define | port_irq_enable(info, mask) { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); } |
| #define | WAKEUP_CHARS 256 |
| #define | CMD_RXFIFO BIT7 |
| #define | CMD_RXRESET BIT6 |
| #define | CMD_RXFIFO_READ BIT5 |
| #define | CMD_START_TIMER BIT4 |
| #define | CMD_TXFIFO BIT3 |
| #define | CMD_TXEOM BIT1 |
| #define | CMD_TXRESET BIT0 |
Typedefs | |
| typedef struct _mgslpc_info | MGSLPC_INFO |
Functions | |
| module_param (break_on_load, bool, 0) | |
| module_param (ttymajor, int, 0) | |
| module_param (debug_level, int, 0) | |
| module_param_array (maxframe, int, NULL, 0) | |
| MODULE_LICENSE ("GPL") | |
| MODULE_DEVICE_TABLE (pcmcia, mgslpc_ids) | |
| module_init (synclink_cs_init) | |
| module_exit (synclink_cs_exit) | |
| #define AMH 0x37 |
Definition at line 277 of file synclink_cs.c.
| #define AML 0x36 |
Definition at line 276 of file synclink_cs.c.
| #define BGR 0x34 |
Definition at line 274 of file synclink_cs.c.
| #define BH_RECEIVE 1 |
Definition at line 114 of file synclink_cs.c.
| #define BH_STATUS 4 |
Definition at line 116 of file synclink_cs.c.
| #define BH_TRANSMIT 2 |
Definition at line 115 of file synclink_cs.c.
| #define BREAKPOINT | ( | ) | { } |
Definition at line 33 of file synclink_cs.c.
| #define CCR0 0x2c |
Definition at line 269 of file synclink_cs.c.
| #define CCR1 0x2d |
Definition at line 270 of file synclink_cs.c.
| #define CCR2 0x2e |
Definition at line 271 of file synclink_cs.c.
| #define CCR3 0x2f |
Definition at line 272 of file synclink_cs.c.
| #define CCR4 0x3f |
Definition at line 287 of file synclink_cs.c.
| #define CEC BIT2 |
Definition at line 309 of file synclink_cs.c.
| #define CHA 0x00 /* channel A offset */ |
Definition at line 240 of file synclink_cs.c.
| #define CHB 0x40 /* channel B offset */ |
Definition at line 241 of file synclink_cs.c.
| #define CMD_RXFIFO BIT7 |
Definition at line 670 of file synclink_cs.c.
| #define CMD_RXFIFO_READ BIT5 |
Definition at line 672 of file synclink_cs.c.
| #define CMD_RXRESET BIT6 |
Definition at line 671 of file synclink_cs.c.
| #define CMD_START_TIMER BIT4 |
Definition at line 673 of file synclink_cs.c.
| #define CMD_TXEOM BIT1 |
Definition at line 675 of file synclink_cs.c.
| #define CMD_TXFIFO BIT3 |
Definition at line 674 of file synclink_cs.c.
| #define CMD_TXRESET BIT0 |
Definition at line 676 of file synclink_cs.c.
| #define CMDR 0x20 |
Definition at line 251 of file synclink_cs.c.
| #define COPY_FROM_USER | ( | error, | |
| dest, | |||
| src, | |||
| size | |||
| ) | error = copy_from_user(dest,src,size) ? -EFAULT : 0 |
Definition at line 83 of file synclink_cs.c.
Definition at line 85 of file synclink_cs.c.
| #define CTS BIT1 |
Definition at line 310 of file synclink_cs.c.
| #define DAFO 0x27 |
Definition at line 260 of file synclink_cs.c.
Definition at line 82 of file synclink_cs.c.
| #define GIS 0x38 |
Definition at line 278 of file synclink_cs.c.
| #define IMR 0x3a |
Definition at line 282 of file synclink_cs.c.
| #define IO_PIN_SHUTDOWN_LIMIT 100 |
Definition at line 118 of file synclink_cs.c.
| #define IPC 0x39 |
Definition at line 280 of file synclink_cs.c.
| #define IRQ_ALLSENT BIT13 |
Definition at line 293 of file synclink_cs.c.
| #define IRQ_BREAK_ON BIT15 |
Definition at line 291 of file synclink_cs.c.
| #define IRQ_CTS BIT10 |
Definition at line 296 of file synclink_cs.c.
| #define IRQ_DATAOVERRUN BIT14 |
Definition at line 292 of file synclink_cs.c.
| #define IRQ_DCD BIT2 |
Definition at line 302 of file synclink_cs.c.
| #define IRQ_EXITHUNT BIT6 |
Definition at line 300 of file synclink_cs.c.
| #define IRQ_OVERRUN BIT1 |
Definition at line 303 of file synclink_cs.c.
| #define IRQ_RXEOM BIT7 |
Definition at line 299 of file synclink_cs.c.
| #define IRQ_RXFIFO BIT0 |
Definition at line 304 of file synclink_cs.c.
| #define IRQ_RXTIME BIT6 |
Definition at line 301 of file synclink_cs.c.
| #define IRQ_TIMER BIT11 |
Definition at line 295 of file synclink_cs.c.
| #define IRQ_TXFIFO BIT8 |
Definition at line 298 of file synclink_cs.c.
| #define IRQ_TXREPEAT BIT9 |
Definition at line 297 of file synclink_cs.c.
| #define IRQ_UNDERRUN BIT12 |
Definition at line 294 of file synclink_cs.c.
| #define ISR 0x3a |
Definition at line 281 of file synclink_cs.c.
| #define IVA 0x38 |
Definition at line 279 of file synclink_cs.c.
| #define MAX_DEVICE_COUNT 4 |
Definition at line 36 of file synclink_cs.c.
| #define MGSLPC_MAGIC 0x5402 |
Definition at line 232 of file synclink_cs.c.
| #define MODE 0x22 |
Definition at line 254 of file synclink_cs.c.
| #define PCR 0x3e |
Definition at line 286 of file synclink_cs.c.
| #define PIM 0x3d |
Definition at line 285 of file synclink_cs.c.
| #define PIS 0x3d |
Definition at line 284 of file synclink_cs.c.
| #define port_irq_disable | ( | info, | |
| mask | |||
| ) | { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); } |
Definition at line 358 of file synclink_cs.c.
| #define port_irq_enable | ( | info, | |
| mask | |||
| ) | { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); } |
Definition at line 361 of file synclink_cs.c.
| #define PRE 0x21 |
Definition at line 253 of file synclink_cs.c.
Definition at line 84 of file synclink_cs.c.
| #define PVR 0x3c |
Definition at line 283 of file synclink_cs.c.
| #define PVR_AUTOCTS BIT3 |
Definition at line 315 of file synclink_cs.c.
| #define PVR_DSR BIT1 |
Definition at line 313 of file synclink_cs.c.
| #define PVR_DTR BIT0 |
Definition at line 312 of file synclink_cs.c.
| #define PVR_RI BIT2 |
Definition at line 314 of file synclink_cs.c.
| #define PVR_RS232 0x20 /* 0010b */ |
Definition at line 316 of file synclink_cs.c.
| #define PVR_RS422 0x40 /* 0100b */ |
Definition at line 318 of file synclink_cs.c.
| #define PVR_V35 0xe0 /* 1110b */ |
Definition at line 317 of file synclink_cs.c.
| #define RAH1 0x26 |
Definition at line 258 of file synclink_cs.c.
| #define RAH2 0x27 |
Definition at line 259 of file synclink_cs.c.
| #define RAL1 0x28 |
Definition at line 261 of file synclink_cs.c.
| #define RAL2 0x29 |
Definition at line 264 of file synclink_cs.c.
| #define RBCH 0x2b |
Definition at line 267 of file synclink_cs.c.
| #define RBCL 0x2a |
Definition at line 265 of file synclink_cs.c.
Definition at line 323 of file synclink_cs.c.
Definition at line 325 of file synclink_cs.c.
Definition at line 120 of file synclink_cs.c.
| #define RFC 0x28 |
Definition at line 262 of file synclink_cs.c.
| #define RHCR 0x29 |
Definition at line 263 of file synclink_cs.c.
| #define RLCR 0x35 |
Definition at line 275 of file synclink_cs.c.
| #define RSTA 0x21 |
Definition at line 252 of file synclink_cs.c.
| #define RXFIFO 0 |
Definition at line 248 of file synclink_cs.c.
| #define STAR 0x20 |
Definition at line 250 of file synclink_cs.c.
| #define SYNCLINK_GENERIC_HDLC 0 |
Definition at line 79 of file synclink_cs.c.
| #define TIMR 0x23 |
Definition at line 255 of file synclink_cs.c.
| #define TXBUFSIZE 4096 |
Definition at line 237 of file synclink_cs.c.
| #define TXFIFO 0 |
Definition at line 249 of file synclink_cs.c.
Definition at line 29 of file synclink_cs.c.
| #define VSTR 0x34 |
Definition at line 273 of file synclink_cs.c.
| #define WAKEUP_CHARS 256 |
Definition at line 465 of file synclink_cs.c.
Definition at line 322 of file synclink_cs.c.
Definition at line 326 of file synclink_cs.c.
| #define XAD1 0x24 |
Definition at line 256 of file synclink_cs.c.
| #define XAD2 0x25 |
Definition at line 257 of file synclink_cs.c.
| #define XBCH 0x2b |
Definition at line 268 of file synclink_cs.c.
| #define XBCL 0x2a |
Definition at line 266 of file synclink_cs.c.
| #define XFW BIT6 |
Definition at line 308 of file synclink_cs.c.
| typedef struct _mgslpc_info MGSLPC_INFO |
| MODULE_DEVICE_TABLE | ( | pcmcia | , |
| mgslpc_ids | |||
| ) |
| module_exit | ( | synclink_cs_exit | ) |
| module_init | ( | synclink_cs_init | ) |
| MODULE_LICENSE | ( | "GPL" | ) |
| module_param | ( | break_on_load | , |
| bool | , | ||
| 0 | |||
| ) |
| module_param | ( | ttymajor | , |
| int | , | ||
| 0 | |||
| ) |
| module_param | ( | debug_level | , |
| int | , | ||
| 0 | |||
| ) |
1.8.2