|
Linux Kernel
3.7.1
|
All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
|
Linux Kernel
3.7.1
|
#include <linux/interrupt.h>#include <linux/module.h>#include <linux/kernel.h>#include <linux/delay.h>#include <linux/pci.h>#include <linux/dma-mapping.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>#include <linux/ethtool.h>#include <linux/mii.h>#include <linux/crc32.h>#include <asm/irq.h>Go to the source code of this file.
Data Structures | |
| struct | sc92031_priv |
Macros | |
| #define | SC92031_NAME "sc92031" |
| #define | SC92031_USE_PIO 0 |
| #define | RX_BUF_LEN_IDX 3 /* 0==8K, 1==16K, 2==32K, 3==64K ,4==128K*/ |
| #define | RX_BUF_LEN (8192 << RX_BUF_LEN_IDX) |
| #define | NUM_TX_DESC 4 |
| #define | MAX_ETH_FRAME_SIZE 1536 |
| #define | TX_BUF_SIZE MAX_ETH_FRAME_SIZE |
| #define | TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC) |
| #define | RX_FIFO_THRESH 7 /* Rx buffer level before first PCI xfer. */ |
| #define | TX_TIMEOUT (4*HZ) |
| #define | SILAN_STATS_NUM 2 /* number of ETHTOOL_GSTATS */ |
| #define | AUTOSELECT 0x00 |
| #define | M10_HALF 0x01 |
| #define | M10_FULL 0x02 |
| #define | M100_HALF 0x04 |
| #define | M100_FULL 0x08 |
| #define | MII_JAB 16 |
| #define | MII_OutputStatus 24 |
| #define | PHY_16_JAB_ENB 0x1000 |
| #define | PHY_16_PORT_ENB 0x1 |
Enumerations | |
| enum | silan_registers { Config0 = 0x00, Config1 = 0x04, RxBufWPtr = 0x08, IntrStatus = 0x0C, IntrMask = 0x10, RxbufAddr = 0x14, RxBufRPtr = 0x18, Txstatusall = 0x1C, TxStatus0 = 0x20, TxAddr0 = 0x30, RxConfig = 0x40, MAC0 = 0x44, MAR0 = 0x4C, RxStatus0 = 0x54, TxConfig = 0x5C, PhyCtrl = 0x60, FlowCtrlConfig = 0x64, Miicmd0 = 0x68, Miicmd1 = 0x6C, Miistatus = 0x70, Timercnt = 0x74, TimerIntr = 0x78, PMConfig = 0x7C, CRC0 = 0x80, Wakeup0 = 0x88, LSBCRC0 = 0xC8, TestD0 = 0xD0, TestD4 = 0xD4, TestD8 = 0xD8 } |
| enum | IntrStatusBits { PCIErr = 0x8000, PCSTimeout = 0x4000, RxFIFOOver = 0x40, RxUnderrun = 0x20, RxOverflow = 0x10, TxErr = 0x08, TxOK = 0x04, RxErr = 0x02, RxOK = 0x01, RxAckBits = RxFIFOOver | RxOverflow | RxOK, LinkFail = 0x80000000, LinkOK = 0x40000000, TimeOut = 0x20000000, RxOverflow = 0x0040, RxOK = 0x0020, TxOK = 0x0001, IntrBits = LinkFail|LinkOK|TimeOut|RxOverflow|RxOK|TxOK } |
| enum | TxStatusBits { TxHostOwns = 0x2000, TxUnderrun = 0x4000, TxStatOK = 0x8000, TxOutOfWindow = 0x20000000, TxAborted = 0x40000000, TxCarrierLost = 0x80000000, TxCarrierLost = 0x20000000, TxAborted = 0x10000000, TxOutOfWindow = 0x08000000, TxNccShift = 22, EarlyTxThresShift = 16, TxStatOK = 0x8000, TxUnderrun = 0x4000, TxOwn = 0x2000 } |
| enum | RxStatusBits { RxMulticast = 0x8000, RxPhysical = 0x4000, RxBroadcast = 0x2000, RxBadSymbol = 0x0020, RxRunt = 0x0010, RxTooLong = 0x0008, RxCRCErr = 0x0004, RxBadAlign = 0x0002, RxStatusOK = 0x0001, RxStatesOK = 0x80000, RxBadAlign = 0x40000, RxHugeFrame = 0x20000, RxSmallFrame = 0x10000, RxCRCOK = 0x8000, RxCrlFrame = 0x4000, Rx_Broadcast = 0x2000, Rx_Multicast = 0x1000, RxAddrMatch = 0x0800, MiiErr = 0x0400 } |
| enum | RxConfigBits { RxCfgFIFOShift = 13, RxCfgFIFONone = (7 << RxCfgFIFOShift), RxCfgDMAShift = 8, RxCfgDMAUnlimited = (7 << RxCfgDMAShift), RxCfgRcv8K = 0, RxCfgRcv16K = (1 << 11), RxCfgRcv32K = (1 << 12), RxCfgRcv64K = (1 << 11) | (1 << 12), RxNoWrap = (1 << 7), RxFullDx = 0x80000000, RxEnb = 0x40000000, RxSmall = 0x20000000, RxHuge = 0x10000000, RxErr = 0x08000000, RxAllphys = 0x04000000, RxMulticast = 0x02000000, RxBroadcast = 0x01000000, RxLoopBack = (1 << 23) | (1 << 22), LowThresholdShift = 12, HighThresholdShift = 2 } |
| enum | TxConfigBits { TxFullDx = 0x80000000, TxEnb = 0x40000000, TxEnbPad = 0x20000000, TxEnbHuge = 0x10000000, TxEnbFCS = 0x08000000, TxNoBackOff = 0x04000000, TxEnbPrem = 0x02000000, TxCareLostCrs = 0x1000000, TxExdCollNum = 0xf00000, TxDataRate = 0x80000 } |
| enum | PhyCtrlconfigbits { PhyCtrlAne = 0x80000000, PhyCtrlSpd100 = 0x40000000, PhyCtrlSpd10 = 0x20000000, PhyCtrlPhyBaseAddr = 0x1f000000, PhyCtrlDux = 0x800000, PhyCtrlReset = 0x400000 } |
| enum | FlowCtrlConfigBits { FlowCtrlFullDX = 0x80000000, FlowCtrlEnb = 0x40000000 } |
| enum | Config0Bits { Cfg0_Reset = 0x80000000, Cfg0_Anaoff = 0x40000000, Cfg0_LDPS = 0x20000000 } |
| enum | Config1Bits { Cfg1_PM_Enable = 0x01, Cfg1_VPD_Enable = 0x02, Cfg1_PIO = 0x04, Cfg1_MMIO = 0x08, LWAKE = 0x10, Cfg1_Driver_Load = 0x20, Cfg1_LED0 = 0x40, Cfg1_LED1 = 0x80, SLEEP = (1 << 1), PWRDN = (1 << 0), Cfg1_EarlyRx = 1 << 31, Cfg1_EarlyTx = 1 << 30, Cfg1_Rcv8K = 0x0, Cfg1_Rcv16K = 0x1, Cfg1_Rcv32K = 0x3, Cfg1_Rcv64K = 0x7, Cfg1_Rcv128K = 0xf } |
| enum | MiiCmd0Bits { Mii_Divider = 0x20000000, Mii_WRITE = 0x400000, Mii_READ = 0x200000, Mii_SCAN = 0x100000, Mii_Tamod = 0x80000, Mii_Drvmod = 0x40000, Mii_mdc = 0x20000, Mii_mdoen = 0x10000, Mii_mdo = 0x8000, Mii_mdi = 0x4000 } |
| enum | MiiStatusBits { Mii_StatusBusy = 0x80000000 } |
| enum | PMConfigBits { PM_Enable = 1 << 31, PM_LongWF = 1 << 30, PM_Magic = 1 << 29, PM_LANWake = 1 << 28, PM_LWPTN = (1 << 27 | 1<< 26), PM_LinkUp = 1 << 25, PM_WakeUp = 1 << 24 } |
Functions | |
| module_param (multicast_filter_limit, int, 0) | |
| MODULE_PARM_DESC (multicast_filter_limit,"Maximum number of filtered multicast addresses") | |
| module_param (media, int, 0) | |
| MODULE_PARM_DESC (media,"Media type (0x00 = autodetect,"" 0x01 = 10M half, 0x02 = 10M full,"" 0x04 = 100M half, 0x08 = 100M full)") | |
| MODULE_DEVICE_TABLE (pci, sc92031_pci_device_id_table) | |
| module_init (sc92031_init) | |
| module_exit (sc92031_exit) | |
| MODULE_LICENSE ("GPL") | |
| MODULE_AUTHOR ("Cesar Eduardo Barros <[email protected]>") | |
| MODULE_DESCRIPTION ("Silan SC92031 PCI Fast Ethernet Adapter driver") | |
| #define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX) |
| #define RX_BUF_LEN_IDX 3 /* 0==8K, 1==16K, 2==32K, 3==64K ,4==128K*/ |
| #define SILAN_STATS_NUM 2 /* number of ETHTOOL_GSTATS */ |
| #define TX_BUF_SIZE MAX_ETH_FRAME_SIZE |
| #define TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC) |
| enum Config0Bits |
| enum Config1Bits |
| enum FlowCtrlConfigBits |
| enum IntrStatusBits |
| enum MiiCmd0Bits |
| enum MiiStatusBits |
| enum PhyCtrlconfigbits |
| enum PMConfigBits |
| enum RxConfigBits |
| enum RxStatusBits |
| enum silan_registers |
| enum TxConfigBits |
| enum TxStatusBits |
| MODULE_AUTHOR | ( | "Cesar Eduardo Barros <[email protected]>" | ) |
| MODULE_DEVICE_TABLE | ( | pci | , |
| sc92031_pci_device_id_table | |||
| ) |
| module_exit | ( | sc92031_exit | ) |
| module_init | ( | sc92031_init | ) |
| MODULE_LICENSE | ( | "GPL" | ) |
| module_param | ( | multicast_filter_limit | , |
| int | , | ||
| 0 | |||
| ) |
| module_param | ( | media | , |
| int | , | ||
| 0 | |||
| ) |
| MODULE_PARM_DESC | ( | multicast_filter_limit | , |
| "Maximum number of filtered multicast addresses" | |||
| ) |
| MODULE_PARM_DESC | ( | media | , |
| "Media type (0x00 = autodetect,"" 0x01 = 10M half, 0x02 = 10M full,"" 0x04 = 100M half, 0x08 = 100M full)" | |||
| ) |
1.8.2