shpchp_hpc.c File Reference

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/interrupt.h>
#include "shpchp.h"

Go to the source code of this file.

Macros
#define	SLOT_33MHZ   0x0000001f
#define	SLOT_66MHZ_PCIX   0x00001f00
#define	SLOT_100MHZ_PCIX   0x001f0000
#define	SLOT_133MHZ_PCIX   0x1f000000
#define	SLOT_66MHZ   0x0000001f
#define	SLOT_66MHZ_PCIX_266   0x00000f00
#define	SLOT_100MHZ_PCIX_266   0x0000f000
#define	SLOT_133MHZ_PCIX_266   0x000f0000
#define	SLOT_66MHZ_PCIX_533   0x00f00000
#define	SLOT_100MHZ_PCIX_533   0x0f000000
#define	SLOT_133MHZ_PCIX_533   0xf0000000
#define	SLOT_NUM   0x0000001F
#define	FIRST_DEV_NUM   0x00001F00
#define	PSN   0x07FF0000
#define	UPDOWN   0x20000000
#define	MRLSENSOR   0x40000000
#define	ATTN_BUTTON   0x80000000
#define	CMD_INTR_PENDING   (1 << 0)
#define	SLOT_INTR_PENDING(i)   (1 << (i + 1))
#define	GLOBAL_INTR_MASK   (1 << 0)
#define	GLOBAL_SERR_MASK   (1 << 1)
#define	COMMAND_INTR_MASK   (1 << 2)
#define	ARBITER_SERR_MASK   (1 << 3)
#define	COMMAND_DETECTED   (1 << 16)
#define	ARBITER_DETECTED   (1 << 17)
#define	SERR_INTR_RSVDZ_MASK   0xfffc0000
#define	SLOT_REG(i)   (SLOT1 + (4 * i))
#define	SLOT_STATE_SHIFT   (0)
#define	SLOT_STATE_MASK   (3 << 0)
#define	SLOT_STATE_PWRONLY   (1)
#define	SLOT_STATE_ENABLED   (2)
#define	SLOT_STATE_DISABLED   (3)
#define	PWR_LED_STATE_SHIFT   (2)
#define	PWR_LED_STATE_MASK   (3 << 2)
#define	ATN_LED_STATE_SHIFT   (4)
#define	ATN_LED_STATE_MASK   (3 << 4)
#define	ATN_LED_STATE_ON   (1)
#define	ATN_LED_STATE_BLINK   (2)
#define	ATN_LED_STATE_OFF   (3)
#define	POWER_FAULT   (1 << 6)
#define	ATN_BUTTON   (1 << 7)
#define	MRL_SENSOR   (1 << 8)
#define	MHZ66_CAP   (1 << 9)
#define	PRSNT_SHIFT   (10)
#define	PRSNT_MASK   (3 << 10)
#define	PCIX_CAP_SHIFT   (12)
#define	PCIX_CAP_MASK_PI1   (3 << 12)
#define	PCIX_CAP_MASK_PI2   (7 << 12)
#define	PRSNT_CHANGE_DETECTED   (1 << 16)
#define	ISO_PFAULT_DETECTED   (1 << 17)
#define	BUTTON_PRESS_DETECTED   (1 << 18)
#define	MRL_CHANGE_DETECTED   (1 << 19)
#define	CON_PFAULT_DETECTED   (1 << 20)
#define	PRSNT_CHANGE_INTR_MASK   (1 << 24)
#define	ISO_PFAULT_INTR_MASK   (1 << 25)
#define	BUTTON_PRESS_INTR_MASK   (1 << 26)
#define	MRL_CHANGE_INTR_MASK   (1 << 27)
#define	CON_PFAULT_INTR_MASK   (1 << 28)
#define	MRL_CHANGE_SERR_MASK   (1 << 29)
#define	CON_PFAULT_SERR_MASK   (1 << 30)
#define	SLOT_REG_RSVDZ_MASK   ((1 << 15) | (7 << 21))
#define	SET_SLOT_PWR   0x01 /* Slot Operation */
#define	SET_SLOT_ENABLE   0x02
#define	SET_SLOT_DISABLE   0x03
#define	SET_PWR_ON   0x04
#define	SET_PWR_BLINK   0x08
#define	SET_PWR_OFF   0x0c
#define	SET_ATTN_ON   0x10
#define	SET_ATTN_BLINK   0x20
#define	SET_ATTN_OFF   0x30
#define	SETA_PCI_33MHZ   0x40 /* Set Bus Segment Speed/Mode A */
#define	SETA_PCI_66MHZ   0x41
#define	SETA_PCIX_66MHZ   0x42
#define	SETA_PCIX_100MHZ   0x43
#define	SETA_PCIX_133MHZ   0x44
#define	SETA_RESERVED1   0x45
#define	SETA_RESERVED2   0x46
#define	SETA_RESERVED3   0x47
#define	SET_PWR_ONLY_ALL   0x48 /* Power-Only All Slots */
#define	SET_ENABLE_ALL   0x49 /* Enable All Slots */
#define	SETB_PCI_33MHZ   0x50 /* Set Bus Segment Speed/Mode B */
#define	SETB_PCI_66MHZ   0x51
#define	SETB_PCIX_66MHZ_PM   0x52
#define	SETB_PCIX_100MHZ_PM   0x53
#define	SETB_PCIX_133MHZ_PM   0x54
#define	SETB_PCIX_66MHZ_EM   0x55
#define	SETB_PCIX_100MHZ_EM   0x56
#define	SETB_PCIX_133MHZ_EM   0x57
#define	SETB_PCIX_66MHZ_266   0x58
#define	SETB_PCIX_100MHZ_266   0x59
#define	SETB_PCIX_133MHZ_266   0x5a
#define	SETB_PCIX_66MHZ_533   0x5b
#define	SETB_PCIX_100MHZ_533   0x5c
#define	SETB_PCIX_133MHZ_533   0x5d
#define	SETB_RESERVED1   0x5e
#define	SETB_RESERVED2   0x5f
#define	SWITCH_OPEN   0x1
#define	INVALID_CMD   0x2
#define	INVALID_SPEED_MODE   0x4
#define	DWORD_SELECT   0x2
#define	DWORD_DATA   0x4
#define	SLOT_EVENT_LATCH   0x2
#define	SLOT_SERR_INT_MASK   0x3

Functions
int	shpc_init (struct controller *ctrl, struct pci_dev *pdev)

Macro Definition Documentation

#define ARBITER_DETECTED   (1 << 17)

Definition at line 75 of file shpchp_hpc.c.

#define ARBITER_SERR_MASK   (1 << 3)

Definition at line 73 of file shpchp_hpc.c.

#define ATN_BUTTON   (1 << 7)

Definition at line 96 of file shpchp_hpc.c.

#define ATN_LED_STATE_BLINK   (2)

Definition at line 93 of file shpchp_hpc.c.

#define ATN_LED_STATE_MASK   (3 << 4)

Definition at line 91 of file shpchp_hpc.c.

#define ATN_LED_STATE_OFF   (3)

Definition at line 94 of file shpchp_hpc.c.

#define ATN_LED_STATE_ON   (1)

Definition at line 92 of file shpchp_hpc.c.

#define ATN_LED_STATE_SHIFT   (4)

Definition at line 90 of file shpchp_hpc.c.

#define ATTN_BUTTON   0x80000000

Definition at line 59 of file shpchp_hpc.c.

#define BUTTON_PRESS_DETECTED   (1 << 18)

Definition at line 106 of file shpchp_hpc.c.

#define BUTTON_PRESS_INTR_MASK   (1 << 26)

Definition at line 111 of file shpchp_hpc.c.

#define CMD_INTR_PENDING   (1 << 0)

Definition at line 64 of file shpchp_hpc.c.

#define COMMAND_DETECTED   (1 << 16)

Definition at line 74 of file shpchp_hpc.c.

#define COMMAND_INTR_MASK   (1 << 2)

Definition at line 72 of file shpchp_hpc.c.

#define CON_PFAULT_DETECTED   (1 << 20)

Definition at line 108 of file shpchp_hpc.c.

#define CON_PFAULT_INTR_MASK   (1 << 28)

Definition at line 113 of file shpchp_hpc.c.

#define CON_PFAULT_SERR_MASK   (1 << 30)

Definition at line 115 of file shpchp_hpc.c.

#define DWORD_DATA   0x4

Definition at line 176 of file shpchp_hpc.c.

#define DWORD_SELECT   0x2

Definition at line 175 of file shpchp_hpc.c.

#define FIRST_DEV_NUM   0x00001F00

Definition at line 55 of file shpchp_hpc.c.

#define GLOBAL_INTR_MASK   (1 << 0)

Definition at line 70 of file shpchp_hpc.c.

#define GLOBAL_SERR_MASK   (1 << 1)

Definition at line 71 of file shpchp_hpc.c.

#define INVALID_CMD   0x2

Definition at line 169 of file shpchp_hpc.c.

#define INVALID_SPEED_MODE   0x4

Definition at line 170 of file shpchp_hpc.c.

#define ISO_PFAULT_DETECTED   (1 << 17)

Definition at line 105 of file shpchp_hpc.c.

#define ISO_PFAULT_INTR_MASK   (1 << 25)

Definition at line 110 of file shpchp_hpc.c.

#define MHZ66_CAP   (1 << 9)

Definition at line 98 of file shpchp_hpc.c.

#define MRL_CHANGE_DETECTED   (1 << 19)

Definition at line 107 of file shpchp_hpc.c.

#define MRL_CHANGE_INTR_MASK   (1 << 27)

Definition at line 112 of file shpchp_hpc.c.

#define MRL_CHANGE_SERR_MASK   (1 << 29)

Definition at line 114 of file shpchp_hpc.c.

#define MRL_SENSOR   (1 << 8)

Definition at line 97 of file shpchp_hpc.c.

#define MRLSENSOR   0x40000000

Definition at line 58 of file shpchp_hpc.c.

#define PCIX_CAP_MASK_PI1   (3 << 12)

Definition at line 102 of file shpchp_hpc.c.

#define PCIX_CAP_MASK_PI2   (7 << 12)

Definition at line 103 of file shpchp_hpc.c.

#define PCIX_CAP_SHIFT   (12)

Definition at line 101 of file shpchp_hpc.c.

#define POWER_FAULT   (1 << 6)

Definition at line 95 of file shpchp_hpc.c.

#define PRSNT_CHANGE_DETECTED   (1 << 16)

Definition at line 104 of file shpchp_hpc.c.

#define PRSNT_CHANGE_INTR_MASK   (1 << 24)

Definition at line 109 of file shpchp_hpc.c.

#define PRSNT_MASK   (3 << 10)

Definition at line 100 of file shpchp_hpc.c.

#define PRSNT_SHIFT   (10)

Definition at line 99 of file shpchp_hpc.c.

#define PSN   0x07FF0000

Definition at line 56 of file shpchp_hpc.c.

#define PWR_LED_STATE_MASK   (3 << 2)

Definition at line 89 of file shpchp_hpc.c.

#define PWR_LED_STATE_SHIFT   (2)

Definition at line 88 of file shpchp_hpc.c.

#define SERR_INTR_RSVDZ_MASK   0xfffc0000

Definition at line 76 of file shpchp_hpc.c.

#define SET_ATTN_BLINK   0x20

Definition at line 136 of file shpchp_hpc.c.

#define SET_ATTN_OFF   0x30

Definition at line 137 of file shpchp_hpc.c.

#define SET_ATTN_ON   0x10

Definition at line 135 of file shpchp_hpc.c.

#define SET_ENABLE_ALL   0x49 /* Enable All Slots */

Definition at line 147 of file shpchp_hpc.c.

#define SET_PWR_BLINK   0x08

Definition at line 133 of file shpchp_hpc.c.

#define SET_PWR_OFF   0x0c

Definition at line 134 of file shpchp_hpc.c.

#define SET_PWR_ON   0x04

Definition at line 132 of file shpchp_hpc.c.

#define SET_PWR_ONLY_ALL   0x48 /* Power-Only All Slots */

Definition at line 146 of file shpchp_hpc.c.

#define SET_SLOT_DISABLE   0x03

Definition at line 131 of file shpchp_hpc.c.

#define SET_SLOT_ENABLE   0x02

Definition at line 130 of file shpchp_hpc.c.

#define SET_SLOT_PWR   0x01 /* Slot Operation */

Definition at line 129 of file shpchp_hpc.c.

#define SETA_PCI_33MHZ   0x40 /* Set Bus Segment Speed/Mode A */

Definition at line 138 of file shpchp_hpc.c.

#define SETA_PCI_66MHZ   0x41

Definition at line 139 of file shpchp_hpc.c.

#define SETA_PCIX_100MHZ   0x43

Definition at line 141 of file shpchp_hpc.c.

#define SETA_PCIX_133MHZ   0x44

Definition at line 142 of file shpchp_hpc.c.

#define SETA_PCIX_66MHZ   0x42

Definition at line 140 of file shpchp_hpc.c.

#define SETA_RESERVED1   0x45

Definition at line 143 of file shpchp_hpc.c.

#define SETA_RESERVED2   0x46

Definition at line 144 of file shpchp_hpc.c.

#define SETA_RESERVED3   0x47

Definition at line 145 of file shpchp_hpc.c.

#define SETB_PCI_33MHZ   0x50 /* Set Bus Segment Speed/Mode B */

Definition at line 148 of file shpchp_hpc.c.

#define SETB_PCI_66MHZ   0x51

Definition at line 149 of file shpchp_hpc.c.

#define SETB_PCIX_100MHZ_266   0x59

Definition at line 157 of file shpchp_hpc.c.

#define SETB_PCIX_100MHZ_533   0x5c

Definition at line 160 of file shpchp_hpc.c.

#define SETB_PCIX_100MHZ_EM   0x56

Definition at line 154 of file shpchp_hpc.c.

#define SETB_PCIX_100MHZ_PM   0x53

Definition at line 151 of file shpchp_hpc.c.

#define SETB_PCIX_133MHZ_266   0x5a

Definition at line 158 of file shpchp_hpc.c.

#define SETB_PCIX_133MHZ_533   0x5d

Definition at line 161 of file shpchp_hpc.c.

#define SETB_PCIX_133MHZ_EM   0x57

Definition at line 155 of file shpchp_hpc.c.

#define SETB_PCIX_133MHZ_PM   0x54

Definition at line 152 of file shpchp_hpc.c.

#define SETB_PCIX_66MHZ_266   0x58

Definition at line 156 of file shpchp_hpc.c.

#define SETB_PCIX_66MHZ_533   0x5b

Definition at line 159 of file shpchp_hpc.c.

#define SETB_PCIX_66MHZ_EM   0x55

Definition at line 153 of file shpchp_hpc.c.

#define SETB_PCIX_66MHZ_PM   0x52

Definition at line 150 of file shpchp_hpc.c.

#define SETB_RESERVED1   0x5e

Definition at line 162 of file shpchp_hpc.c.

#define SETB_RESERVED2   0x5f

Definition at line 163 of file shpchp_hpc.c.

#define SLOT_100MHZ_PCIX   0x001f0000

Definition at line 41 of file shpchp_hpc.c.

#define SLOT_100MHZ_PCIX_266   0x0000f000

Definition at line 47 of file shpchp_hpc.c.

#define SLOT_100MHZ_PCIX_533   0x0f000000

Definition at line 50 of file shpchp_hpc.c.

#define SLOT_133MHZ_PCIX   0x1f000000

Definition at line 42 of file shpchp_hpc.c.

#define SLOT_133MHZ_PCIX_266   0x000f0000

Definition at line 48 of file shpchp_hpc.c.

#define SLOT_133MHZ_PCIX_533   0xf0000000

Definition at line 51 of file shpchp_hpc.c.

#define SLOT_33MHZ   0x0000001f

Definition at line 39 of file shpchp_hpc.c.

#define SLOT_66MHZ   0x0000001f

Definition at line 45 of file shpchp_hpc.c.

#define SLOT_66MHZ_PCIX   0x00001f00

Definition at line 40 of file shpchp_hpc.c.

#define SLOT_66MHZ_PCIX_266   0x00000f00

Definition at line 46 of file shpchp_hpc.c.

#define SLOT_66MHZ_PCIX_533   0x00f00000

Definition at line 49 of file shpchp_hpc.c.

#define SLOT_EVENT_LATCH   0x2

Definition at line 179 of file shpchp_hpc.c.

#define SLOT_INTR_PENDING

(

i

)

(1 << (i + 1))

Definition at line 65 of file shpchp_hpc.c.

#define SLOT_NUM   0x0000001F

Definition at line 54 of file shpchp_hpc.c.

#define SLOT_REG

(

i

)

(SLOT1 + (4 * i))

Definition at line 81 of file shpchp_hpc.c.

#define SLOT_REG_RSVDZ_MASK   ((1 << 15) | (7 << 21))

Definition at line 116 of file shpchp_hpc.c.

#define SLOT_SERR_INT_MASK   0x3

Definition at line 180 of file shpchp_hpc.c.

#define SLOT_STATE_DISABLED   (3)

Definition at line 87 of file shpchp_hpc.c.

#define SLOT_STATE_ENABLED   (2)

Definition at line 86 of file shpchp_hpc.c.

#define SLOT_STATE_MASK   (3 << 0)

Definition at line 84 of file shpchp_hpc.c.

#define SLOT_STATE_PWRONLY   (1)

Definition at line 85 of file shpchp_hpc.c.

#define SLOT_STATE_SHIFT   (0)

Definition at line 83 of file shpchp_hpc.c.

#define SWITCH_OPEN   0x1

Definition at line 168 of file shpchp_hpc.c.

#define UPDOWN   0x20000000

Definition at line 57 of file shpchp_hpc.c.

Function Documentation

int shpc_init	(	struct controller *	ctrl,
		struct pci_dev *	pdev
	)

Definition at line 936 of file shpchp_hpc.c.