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Linux Kernel
3.7.1
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Go to the source code of this file.
| #define SH1_EVENT_OCCURRED __IA64_UL_CONST(0x0000000110010000) |
Definition at line 54 of file shub_mmr.h.
| #define SH1_EVENT_OCCURRED_ALIAS __IA64_UL_CONST(0x0000000110010008) |
Definition at line 55 of file shub_mmr.h.
| #define SH1_INT_CMPB __IA64_UL_CONST(0x00000001101b0080) |
Definition at line 407 of file shub_mmr.h.
| #define SH1_INT_CMPC __IA64_UL_CONST(0x00000001101b0100) |
Definition at line 422 of file shub_mmr.h.
| #define SH1_INT_CMPD __IA64_UL_CONST(0x00000001101b0180) |
Definition at line 437 of file shub_mmr.h.
| #define SH1_IPI_ACCESS __IA64_UL_CONST(0x0000000110060480) |
Definition at line 396 of file shub_mmr.h.
| #define SH1_IPI_INT __IA64_UL_CONST(0x0000000110000380) |
Definition at line 17 of file shub_mmr.h.
| #define SH1_MD_DQLP_MMR_DIR_PRIVEC0 __IA64_UL_CONST(0x0000000100030300) |
Definition at line 451 of file shub_mmr.h.
| #define SH1_MD_DQRP_MMR_DIR_PRIVEC0 __IA64_UL_CONST(0x0000000100050300) |
Definition at line 457 of file shub_mmr.h.
| #define SH1_PI_CAM_CONTROL __IA64_UL_CONST(0x0000000120050300) |
Definition at line 63 of file shub_mmr.h.
| #define SH1_PIO_WRITE_STATUS_0 __IA64_UL_CONST(0x0000000120070200) |
Definition at line 85 of file shub_mmr.h.
| #define SH1_PIO_WRITE_STATUS_0_ALIAS __IA64_UL_CONST(0x0000000120070208) |
Definition at line 107 of file shub_mmr.h.
| #define SH1_PIO_WRITE_STATUS_1 __IA64_UL_CONST(0x0000000120070280) |
Definition at line 86 of file shub_mmr.h.
| #define SH1_PTC_0 __IA64_UL_CONST(0x00000001101a0000) |
Definition at line 168 of file shub_mmr.h.
| #define SH1_PTC_0_A_SHFT 0 |
Definition at line 172 of file shub_mmr.h.
| #define SH1_PTC_0_PS_SHFT 2 |
Definition at line 176 of file shub_mmr.h.
| #define SH1_PTC_0_RID_SHFT 8 |
Definition at line 180 of file shub_mmr.h.
| #define SH1_PTC_0_START_SHFT 63 |
Definition at line 184 of file shub_mmr.h.
| #define SH1_PTC_1 __IA64_UL_CONST(0x00000001101a0080) |
Definition at line 190 of file shub_mmr.h.
| #define SH1_PTC_1_START_SHFT 63 |
Definition at line 194 of file shub_mmr.h.
| #define SH1_REAL_JUNK_BUS_LED0 0x7fed00000UL |
Definition at line 154 of file shub_mmr.h.
| #define SH1_REAL_JUNK_BUS_LED1 0x7fed10000UL |
Definition at line 155 of file shub_mmr.h.
| #define SH1_REAL_JUNK_BUS_LED2 0x7fed20000UL |
Definition at line 156 of file shub_mmr.h.
| #define SH1_REAL_JUNK_BUS_LED3 0x7fed30000UL |
Definition at line 157 of file shub_mmr.h.
| #define SH1_RTC __IA64_UL_CONST(0x00000001101c0000) |
Definition at line 77 of file shub_mmr.h.
| #define SH1_RTC1_INT_CONFIG __IA64_UL_CONST(0x0000000110001480) |
Definition at line 228 of file shub_mmr.h.
| #define SH1_RTC1_INT_ENABLE __IA64_UL_CONST(0x0000000110001500) |
Definition at line 263 of file shub_mmr.h.
| #define SH1_RTC2_INT_CONFIG __IA64_UL_CONST(0x0000000110001580) |
Definition at line 279 of file shub_mmr.h.
| #define SH1_RTC2_INT_ENABLE __IA64_UL_CONST(0x0000000110001600) |
Definition at line 314 of file shub_mmr.h.
| #define SH1_RTC3_INT_CONFIG __IA64_UL_CONST(0x0000000110001680) |
Definition at line 330 of file shub_mmr.h.
| #define SH1_RTC3_INT_ENABLE __IA64_UL_CONST(0x0000000110001700) |
Definition at line 365 of file shub_mmr.h.
| #define SH1_SHUB_ID __IA64_UL_CONST(0x0000000110060580) |
Definition at line 69 of file shub_mmr.h.
| #define SH1_SHUB_ID_REVISION_MASK __IA64_UL_CONST(0x00000000f0000000) |
Definition at line 71 of file shub_mmr.h.
| #define SH1_SHUB_ID_REVISION_SHFT 28 |
Definition at line 70 of file shub_mmr.h.
| #define SH2_BT_ENG_CSR_0 __IA64_UL_CONST(0x0000000030040000) |
Definition at line 489 of file shub_mmr.h.
| #define SH2_BT_ENG_CSR_1 __IA64_UL_CONST(0x0000000030050000) |
Definition at line 498 of file shub_mmr.h.
| #define SH2_BT_ENG_CSR_2 __IA64_UL_CONST(0x0000000030060000) |
Definition at line 499 of file shub_mmr.h.
| #define SH2_BT_ENG_CSR_3 __IA64_UL_CONST(0x0000000030070000) |
Definition at line 500 of file shub_mmr.h.
| #define SH2_BT_ENG_DEST_ADDR_0 __IA64_UL_CONST(0x0000000030040100) |
Definition at line 491 of file shub_mmr.h.
| #define SH2_BT_ENG_NOTIF_ADDR_0 __IA64_UL_CONST(0x0000000030040180) |
Definition at line 492 of file shub_mmr.h.
| #define SH2_BT_ENG_SRC_ADDR_0 __IA64_UL_CONST(0x0000000030040080) |
Definition at line 490 of file shub_mmr.h.
| #define SH2_EVENT_OCCURRED __IA64_UL_CONST(0x0000000010010000) |
Definition at line 56 of file shub_mmr.h.
| #define SH2_EVENT_OCCURRED_ALIAS __IA64_UL_CONST(0x0000000010010008) |
Definition at line 57 of file shub_mmr.h.
| #define SH2_EVENT_OCCURRED_EXTIO_INT2_MASK __IA64_UL_CONST(0x0000000200000000) |
Definition at line 137 of file shub_mmr.h.
| #define SH2_EVENT_OCCURRED_EXTIO_INT2_SHFT 33 |
Definition at line 136 of file shub_mmr.h.
| #define SH2_EVENT_OCCURRED_EXTIO_INT3_MASK __IA64_UL_CONST(0x0000000400000000) |
Definition at line 142 of file shub_mmr.h.
| #define SH2_EVENT_OCCURRED_EXTIO_INT3_SHFT 34 |
Definition at line 141 of file shub_mmr.h.
| #define SH2_INT_CMPB __IA64_UL_CONST(0x00000000101b0080) |
Definition at line 408 of file shub_mmr.h.
| #define SH2_INT_CMPC __IA64_UL_CONST(0x00000000101b0100) |
Definition at line 423 of file shub_mmr.h.
| #define SH2_INT_CMPD __IA64_UL_CONST(0x00000000101b0180) |
Definition at line 438 of file shub_mmr.h.
| #define SH2_IPI_ACCESS0 __IA64_UL_CONST(0x0000000010060c00) |
Definition at line 397 of file shub_mmr.h.
| #define SH2_IPI_ACCESS1 __IA64_UL_CONST(0x0000000010060c80) |
Definition at line 398 of file shub_mmr.h.
| #define SH2_IPI_ACCESS2 __IA64_UL_CONST(0x0000000010060d00) |
Definition at line 399 of file shub_mmr.h.
| #define SH2_IPI_ACCESS3 __IA64_UL_CONST(0x0000000010060d80) |
Definition at line 400 of file shub_mmr.h.
| #define SH2_IPI_INT __IA64_UL_CONST(0x0000000010000380) |
Definition at line 18 of file shub_mmr.h.
| #define SH2_PIO_WRITE_STATUS_0 __IA64_UL_CONST(0x0000000020070200) |
Definition at line 87 of file shub_mmr.h.
| #define SH2_PIO_WRITE_STATUS_0_ALIAS __IA64_UL_CONST(0x0000000020070208) |
Definition at line 108 of file shub_mmr.h.
| #define SH2_PIO_WRITE_STATUS_1 __IA64_UL_CONST(0x0000000020070280) |
Definition at line 88 of file shub_mmr.h.
| #define SH2_PIO_WRITE_STATUS_2 __IA64_UL_CONST(0x0000000020070300) |
Definition at line 89 of file shub_mmr.h.
| #define SH2_PIO_WRITE_STATUS_3 __IA64_UL_CONST(0x0000000020070380) |
Definition at line 90 of file shub_mmr.h.
| #define SH2_PTC __IA64_UL_CONST(0x0000000170000000) |
Definition at line 200 of file shub_mmr.h.
| #define SH2_PTC_A_SHFT 0 |
Definition at line 204 of file shub_mmr.h.
| #define SH2_PTC_ADDR_MASK __IA64_UL_CONST(0x1ffffffffffff000) |
Definition at line 221 of file shub_mmr.h.
| #define SH2_PTC_ADDR_SHFT 4 |
Definition at line 220 of file shub_mmr.h.
| #define SH2_PTC_PS_SHFT 2 |
Definition at line 208 of file shub_mmr.h.
| #define SH2_PTC_RID_SHFT 4 |
Definition at line 212 of file shub_mmr.h.
| #define SH2_PTC_START_SHFT 63 |
Definition at line 216 of file shub_mmr.h.
| #define SH2_REAL_JUNK_BUS_LED0 0xf0000000UL |
Definition at line 159 of file shub_mmr.h.
| #define SH2_REAL_JUNK_BUS_LED1 0xf0010000UL |
Definition at line 160 of file shub_mmr.h.
| #define SH2_REAL_JUNK_BUS_LED2 0xf0020000UL |
Definition at line 161 of file shub_mmr.h.
| #define SH2_REAL_JUNK_BUS_LED3 0xf0030000UL |
Definition at line 162 of file shub_mmr.h.
| #define SH2_RTC __IA64_UL_CONST(0x00000002101c0000) |
Definition at line 78 of file shub_mmr.h.
| #define SH2_RTC1_INT_CONFIG __IA64_UL_CONST(0x0000000010001480) |
Definition at line 229 of file shub_mmr.h.
| #define SH2_RTC1_INT_ENABLE __IA64_UL_CONST(0x0000000010001500) |
Definition at line 264 of file shub_mmr.h.
| #define SH2_RTC2_INT_CONFIG __IA64_UL_CONST(0x0000000010001580) |
Definition at line 280 of file shub_mmr.h.
| #define SH2_RTC2_INT_ENABLE __IA64_UL_CONST(0x0000000010001600) |
Definition at line 315 of file shub_mmr.h.
| #define SH2_RTC3_INT_CONFIG __IA64_UL_CONST(0x0000000010001680) |
Definition at line 331 of file shub_mmr.h.
| #define SH2_RTC3_INT_ENABLE __IA64_UL_CONST(0x0000000010001700) |
Definition at line 366 of file shub_mmr.h.
| #define SH_ALL_INT_MASK |
Definition at line 144 of file shub_mmr.h.
Definition at line 471 of file shub_mmr.h.
Definition at line 472 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_II_INT0_MASK __IA64_UL_CONST(0x0000000020000000) |
Definition at line 127 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_II_INT0_SHFT 29 |
Definition at line 126 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_II_INT1_MASK __IA64_UL_CONST(0x0000000040000000) |
Definition at line 132 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_II_INT1_SHFT 30 |
Definition at line 131 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_IPI_INT_MASK __IA64_UL_CONST(0x0000000010000000) |
Definition at line 122 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_IPI_INT_SHFT 28 |
Definition at line 121 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_RTC1_INT_MASK __IA64_UL_CONST(0x0000000001000000) |
Definition at line 379 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_RTC1_INT_SHFT 24 |
Definition at line 378 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_RTC2_INT_MASK __IA64_UL_CONST(0x0000000002000000) |
Definition at line 384 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_RTC2_INT_SHFT 25 |
Definition at line 383 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_RTC3_INT_MASK __IA64_UL_CONST(0x0000000004000000) |
Definition at line 389 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_RTC3_INT_SHFT 26 |
Definition at line 388 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_UART_INT_MASK __IA64_UL_CONST(0x0000000000100000) |
Definition at line 117 of file shub_mmr.h.
| #define SH_EVENT_OCCURRED_UART_INT_SHFT 20 |
Definition at line 116 of file shub_mmr.h.
Definition at line 480 of file shub_mmr.h.
| #define SH_INT_CMPB_INIT __IA64_UL_CONST(0x0000000000000000) |
Definition at line 410 of file shub_mmr.h.
| #define SH_INT_CMPB_MASK __IA64_UL_CONST(0x007fffffffffffff) |
Definition at line 409 of file shub_mmr.h.
| #define SH_INT_CMPB_REAL_TIME_CMPB_MASK __IA64_UL_CONST(0x007fffffffffffff) |
Definition at line 415 of file shub_mmr.h.
| #define SH_INT_CMPB_REAL_TIME_CMPB_SHFT 0 |
Definition at line 414 of file shub_mmr.h.
Definition at line 481 of file shub_mmr.h.
| #define SH_INT_CMPC_INIT __IA64_UL_CONST(0x0000000000000000) |
Definition at line 425 of file shub_mmr.h.
| #define SH_INT_CMPC_MASK __IA64_UL_CONST(0x007fffffffffffff) |
Definition at line 424 of file shub_mmr.h.
| #define SH_INT_CMPC_REAL_TIME_CMPC_MASK __IA64_UL_CONST(0x007fffffffffffff) |
Definition at line 430 of file shub_mmr.h.
| #define SH_INT_CMPC_REAL_TIME_CMPC_SHFT 0 |
Definition at line 429 of file shub_mmr.h.
Definition at line 482 of file shub_mmr.h.
| #define SH_INT_CMPD_INIT __IA64_UL_CONST(0x0000000000000000) |
Definition at line 440 of file shub_mmr.h.
| #define SH_INT_CMPD_MASK __IA64_UL_CONST(0x007fffffffffffff) |
Definition at line 439 of file shub_mmr.h.
| #define SH_INT_CMPD_REAL_TIME_CMPD_MASK __IA64_UL_CONST(0x007fffffffffffff) |
Definition at line 445 of file shub_mmr.h.
| #define SH_INT_CMPD_REAL_TIME_CMPD_SHFT 0 |
Definition at line 444 of file shub_mmr.h.
Definition at line 470 of file shub_mmr.h.
| #define SH_IPI_INT_AGT_MASK __IA64_UL_CONST(0x0000000000000008) |
Definition at line 28 of file shub_mmr.h.
| #define SH_IPI_INT_AGT_SHFT 3 |
Definition at line 27 of file shub_mmr.h.
| #define SH_IPI_INT_BASE_MASK __IA64_UL_CONST(0x0003ffffffe00000) |
Definition at line 38 of file shub_mmr.h.
| #define SH_IPI_INT_BASE_SHFT 21 |
Definition at line 37 of file shub_mmr.h.
| #define SH_IPI_INT_IDX_MASK __IA64_UL_CONST(0x0ff0000000000000) |
Definition at line 43 of file shub_mmr.h.
| #define SH_IPI_INT_IDX_SHFT 52 |
Definition at line 42 of file shub_mmr.h.
| #define SH_IPI_INT_PID_MASK __IA64_UL_CONST(0x00000000000ffff0) |
Definition at line 33 of file shub_mmr.h.
| #define SH_IPI_INT_PID_SHFT 4 |
Definition at line 32 of file shub_mmr.h.
| #define SH_IPI_INT_SEND_MASK __IA64_UL_CONST(0x8000000000000000) |
Definition at line 48 of file shub_mmr.h.
| #define SH_IPI_INT_SEND_SHFT 63 |
Definition at line 47 of file shub_mmr.h.
| #define SH_IPI_INT_TYPE_MASK __IA64_UL_CONST(0x0000000000000007) |
Definition at line 23 of file shub_mmr.h.
| #define SH_IPI_INT_TYPE_SHFT 0 |
Definition at line 22 of file shub_mmr.h.
| #define SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK __IA64_UL_CONST(0x3f00000000000000) |
Definition at line 101 of file shub_mmr.h.
| #define SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_SHFT 56 |
Definition at line 100 of file shub_mmr.h.
| #define SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_MASK __IA64_UL_CONST(0x0000000000000002) |
Definition at line 95 of file shub_mmr.h.
| #define SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_SHFT 1 |
Definition at line 94 of file shub_mmr.h.
Definition at line 469 of file shub_mmr.h.
Definition at line 473 of file shub_mmr.h.
Definition at line 474 of file shub_mmr.h.
| #define SH_RTC1_INT_CONFIG_AGT_MASK __IA64_UL_CONST(0x0000000000000008) |
Definition at line 241 of file shub_mmr.h.
| #define SH_RTC1_INT_CONFIG_AGT_SHFT 3 |
Definition at line 240 of file shub_mmr.h.
| #define SH_RTC1_INT_CONFIG_BASE_MASK __IA64_UL_CONST(0x0003ffffffe00000) |
Definition at line 251 of file shub_mmr.h.
| #define SH_RTC1_INT_CONFIG_BASE_SHFT 21 |
Definition at line 250 of file shub_mmr.h.
| #define SH_RTC1_INT_CONFIG_IDX_MASK __IA64_UL_CONST(0x0ff0000000000000) |
Definition at line 256 of file shub_mmr.h.
| #define SH_RTC1_INT_CONFIG_IDX_SHFT 52 |
Definition at line 255 of file shub_mmr.h.
| #define SH_RTC1_INT_CONFIG_INIT __IA64_UL_CONST(0x0000000000000000) |
Definition at line 231 of file shub_mmr.h.
| #define SH_RTC1_INT_CONFIG_MASK __IA64_UL_CONST(0x0ff3ffffffefffff) |
Definition at line 230 of file shub_mmr.h.
| #define SH_RTC1_INT_CONFIG_PID_MASK __IA64_UL_CONST(0x00000000000ffff0) |
Definition at line 246 of file shub_mmr.h.
| #define SH_RTC1_INT_CONFIG_PID_SHFT 4 |
Definition at line 245 of file shub_mmr.h.
| #define SH_RTC1_INT_CONFIG_TYPE_MASK __IA64_UL_CONST(0x0000000000000007) |
Definition at line 236 of file shub_mmr.h.
| #define SH_RTC1_INT_CONFIG_TYPE_SHFT 0 |
Definition at line 235 of file shub_mmr.h.
Definition at line 475 of file shub_mmr.h.
| #define SH_RTC1_INT_ENABLE_INIT __IA64_UL_CONST(0x0000000000000000) |
Definition at line 266 of file shub_mmr.h.
| #define SH_RTC1_INT_ENABLE_MASK __IA64_UL_CONST(0x0000000000000001) |
Definition at line 265 of file shub_mmr.h.
| #define SH_RTC1_INT_ENABLE_RTC1_ENABLE_MASK __IA64_UL_CONST(0x0000000000000001) |
Definition at line 271 of file shub_mmr.h.
| #define SH_RTC1_INT_ENABLE_RTC1_ENABLE_SHFT 0 |
Definition at line 270 of file shub_mmr.h.
Definition at line 476 of file shub_mmr.h.
| #define SH_RTC2_INT_CONFIG_AGT_MASK __IA64_UL_CONST(0x0000000000000008) |
Definition at line 292 of file shub_mmr.h.
| #define SH_RTC2_INT_CONFIG_AGT_SHFT 3 |
Definition at line 291 of file shub_mmr.h.
| #define SH_RTC2_INT_CONFIG_BASE_MASK __IA64_UL_CONST(0x0003ffffffe00000) |
Definition at line 302 of file shub_mmr.h.
| #define SH_RTC2_INT_CONFIG_BASE_SHFT 21 |
Definition at line 301 of file shub_mmr.h.
| #define SH_RTC2_INT_CONFIG_IDX_MASK __IA64_UL_CONST(0x0ff0000000000000) |
Definition at line 307 of file shub_mmr.h.
| #define SH_RTC2_INT_CONFIG_IDX_SHFT 52 |
Definition at line 306 of file shub_mmr.h.
| #define SH_RTC2_INT_CONFIG_INIT __IA64_UL_CONST(0x0000000000000000) |
Definition at line 282 of file shub_mmr.h.
| #define SH_RTC2_INT_CONFIG_MASK __IA64_UL_CONST(0x0ff3ffffffefffff) |
Definition at line 281 of file shub_mmr.h.
| #define SH_RTC2_INT_CONFIG_PID_MASK __IA64_UL_CONST(0x00000000000ffff0) |
Definition at line 297 of file shub_mmr.h.
| #define SH_RTC2_INT_CONFIG_PID_SHFT 4 |
Definition at line 296 of file shub_mmr.h.
| #define SH_RTC2_INT_CONFIG_TYPE_MASK __IA64_UL_CONST(0x0000000000000007) |
Definition at line 287 of file shub_mmr.h.
| #define SH_RTC2_INT_CONFIG_TYPE_SHFT 0 |
Definition at line 286 of file shub_mmr.h.
Definition at line 477 of file shub_mmr.h.
| #define SH_RTC2_INT_ENABLE_INIT __IA64_UL_CONST(0x0000000000000000) |
Definition at line 317 of file shub_mmr.h.
| #define SH_RTC2_INT_ENABLE_MASK __IA64_UL_CONST(0x0000000000000001) |
Definition at line 316 of file shub_mmr.h.
| #define SH_RTC2_INT_ENABLE_RTC2_ENABLE_MASK __IA64_UL_CONST(0x0000000000000001) |
Definition at line 322 of file shub_mmr.h.
| #define SH_RTC2_INT_ENABLE_RTC2_ENABLE_SHFT 0 |
Definition at line 321 of file shub_mmr.h.
Definition at line 478 of file shub_mmr.h.
| #define SH_RTC3_INT_CONFIG_AGT_MASK __IA64_UL_CONST(0x0000000000000008) |
Definition at line 343 of file shub_mmr.h.
| #define SH_RTC3_INT_CONFIG_AGT_SHFT 3 |
Definition at line 342 of file shub_mmr.h.
| #define SH_RTC3_INT_CONFIG_BASE_MASK __IA64_UL_CONST(0x0003ffffffe00000) |
Definition at line 353 of file shub_mmr.h.
| #define SH_RTC3_INT_CONFIG_BASE_SHFT 21 |
Definition at line 352 of file shub_mmr.h.
| #define SH_RTC3_INT_CONFIG_IDX_MASK __IA64_UL_CONST(0x0ff0000000000000) |
Definition at line 358 of file shub_mmr.h.
| #define SH_RTC3_INT_CONFIG_IDX_SHFT 52 |
Definition at line 357 of file shub_mmr.h.
| #define SH_RTC3_INT_CONFIG_INIT __IA64_UL_CONST(0x0000000000000000) |
Definition at line 333 of file shub_mmr.h.
| #define SH_RTC3_INT_CONFIG_MASK __IA64_UL_CONST(0x0ff3ffffffefffff) |
Definition at line 332 of file shub_mmr.h.
| #define SH_RTC3_INT_CONFIG_PID_MASK __IA64_UL_CONST(0x00000000000ffff0) |
Definition at line 348 of file shub_mmr.h.
| #define SH_RTC3_INT_CONFIG_PID_SHFT 4 |
Definition at line 347 of file shub_mmr.h.
| #define SH_RTC3_INT_CONFIG_TYPE_MASK __IA64_UL_CONST(0x0000000000000007) |
Definition at line 338 of file shub_mmr.h.
| #define SH_RTC3_INT_CONFIG_TYPE_SHFT 0 |
Definition at line 337 of file shub_mmr.h.
Definition at line 479 of file shub_mmr.h.
| #define SH_RTC3_INT_ENABLE_INIT __IA64_UL_CONST(0x0000000000000000) |
Definition at line 368 of file shub_mmr.h.
| #define SH_RTC3_INT_ENABLE_MASK __IA64_UL_CONST(0x0000000000000001) |
Definition at line 367 of file shub_mmr.h.
| #define SH_RTC3_INT_ENABLE_RTC3_ENABLE_MASK __IA64_UL_CONST(0x0000000000000001) |
Definition at line 373 of file shub_mmr.h.
| #define SH_RTC3_INT_ENABLE_RTC3_ENABLE_SHFT 0 |
Definition at line 372 of file shub_mmr.h.
| #define SH_RTC_MASK __IA64_UL_CONST(0x007fffffffffffff) |
Definition at line 79 of file shub_mmr.h.
1.8.2