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smartreflex.c
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1 /*
2  * OMAP SmartReflex Voltage Control
3  *
4  * Author: Thara Gopinath <[email protected]>
5  *
6  * Copyright (C) 2012 Texas Instruments, Inc.
7  * Thara Gopinath <[email protected]>
8  *
9  * Copyright (C) 2008 Nokia Corporation
10  * Kalle Jokiniemi
11  *
12  * Copyright (C) 2007 Texas Instruments, Inc.
13  * Lesly A M <[email protected]>
14  *
15  * This program is free software; you can redistribute it and/or modify
16  * it under the terms of the GNU General Public License version 2 as
17  * published by the Free Software Foundation.
18  */
19 
20 #include <linux/module.h>
21 #include <linux/interrupt.h>
22 #include <linux/clk.h>
23 #include <linux/io.h>
24 #include <linux/debugfs.h>
25 #include <linux/delay.h>
26 #include <linux/slab.h>
27 #include <linux/pm_runtime.h>
29 
30 #include <plat/cpu.h>
31 
32 #define SMARTREFLEX_NAME_LEN 16
33 #define NVALUE_NAME_LEN 40
34 #define SR_DISABLE_TIMEOUT 200
35 
36 /* sr_list contains all the instances of smartreflex module */
37 static LIST_HEAD(sr_list);
38 
39 static struct omap_sr_class_data *sr_class;
40 static struct omap_sr_pmic_data *sr_pmic_data;
41 static struct dentry *sr_dbg_dir;
42 
43 static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
44 {
45  __raw_writel(value, (sr->base + offset));
46 }
47 
48 static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
49  u32 value)
50 {
51  u32 reg_val;
52 
53  /*
54  * Smartreflex error config register is special as it contains
55  * certain status bits which if written a 1 into means a clear
56  * of those bits. So in order to make sure no accidental write of
57  * 1 happens to those status bits, do a clear of them in the read
58  * value. This mean this API doesn't rewrite values in these bits
59  * if they are currently set, but does allow the caller to write
60  * those bits.
61  */
62  if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
64  else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
66 
67  reg_val = __raw_readl(sr->base + offset);
68  reg_val &= ~mask;
69 
70  value &= mask;
71 
72  reg_val |= value;
73 
74  __raw_writel(reg_val, (sr->base + offset));
75 }
76 
77 static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
78 {
79  return __raw_readl(sr->base + offset);
80 }
81 
82 static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
83 {
84  struct omap_sr *sr_info;
85 
86  if (!voltdm) {
87  pr_err("%s: Null voltage domain passed!\n", __func__);
88  return ERR_PTR(-EINVAL);
89  }
90 
91  list_for_each_entry(sr_info, &sr_list, node) {
92  if (voltdm == sr_info->voltdm)
93  return sr_info;
94  }
95 
96  return ERR_PTR(-ENODATA);
97 }
98 
99 static irqreturn_t sr_interrupt(int irq, void *data)
100 {
101  struct omap_sr *sr_info = data;
102  u32 status = 0;
103 
104  switch (sr_info->ip_type) {
105  case SR_TYPE_V1:
106  /* Read the status bits */
107  status = sr_read_reg(sr_info, ERRCONFIG_V1);
108 
109  /* Clear them by writing back */
110  sr_write_reg(sr_info, ERRCONFIG_V1, status);
111  break;
112  case SR_TYPE_V2:
113  /* Read the status bits */
114  status = sr_read_reg(sr_info, IRQSTATUS);
115 
116  /* Clear them by writing back */
117  sr_write_reg(sr_info, IRQSTATUS, status);
118  break;
119  default:
120  dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
121  sr_info->ip_type);
122  return IRQ_NONE;
123  }
124 
125  if (sr_class->notify)
126  sr_class->notify(sr_info, status);
127 
128  return IRQ_HANDLED;
129 }
130 
131 static void sr_set_clk_length(struct omap_sr *sr)
132 {
133  struct clk *sys_ck;
134  u32 sys_clk_speed;
135 
136  if (cpu_is_omap34xx())
137  sys_ck = clk_get(NULL, "sys_ck");
138  else
139  sys_ck = clk_get(NULL, "sys_clkin_ck");
140 
141  if (IS_ERR(sys_ck)) {
142  dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n",
143  __func__);
144  return;
145  }
146 
147  sys_clk_speed = clk_get_rate(sys_ck);
148  clk_put(sys_ck);
149 
150  switch (sys_clk_speed) {
151  case 12000000:
153  break;
154  case 13000000:
156  break;
157  case 19200000:
159  break;
160  case 26000000:
162  break;
163  case 38400000:
165  break;
166  default:
167  dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n",
168  __func__, sys_clk_speed);
169  break;
170  }
171 }
172 
173 static void sr_set_regfields(struct omap_sr *sr)
174 {
175  /*
176  * For time being these values are defined in smartreflex.h
177  * and populated during init. May be they can be moved to board
178  * file or pmic specific data structure. In that case these structure
179  * fields will have to be populated using the pdata or pmic structure.
180  */
181  if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
185  if (!(strcmp(sr->name, "smartreflex_mpu_iva"))) {
188  } else {
191  }
192  }
193 }
194 
195 static void sr_start_vddautocomp(struct omap_sr *sr)
196 {
197  if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
198  dev_warn(&sr->pdev->dev,
199  "%s: smartreflex class driver not registered\n",
200  __func__);
201  return;
202  }
203 
204  if (!sr_class->enable(sr))
205  sr->autocomp_active = true;
206 }
207 
208 static void sr_stop_vddautocomp(struct omap_sr *sr)
209 {
210  if (!sr_class || !(sr_class->disable)) {
211  dev_warn(&sr->pdev->dev,
212  "%s: smartreflex class driver not registered\n",
213  __func__);
214  return;
215  }
216 
217  if (sr->autocomp_active) {
218  sr_class->disable(sr, 1);
219  sr->autocomp_active = false;
220  }
221 }
222 
223 /*
224  * This function handles the intializations which have to be done
225  * only when both sr device and class driver regiter has
226  * completed. This will be attempted to be called from both sr class
227  * driver register and sr device intializtion API's. Only one call
228  * will ultimately succeed.
229  *
230  * Currently this function registers interrupt handler for a particular SR
231  * if smartreflex class driver is already registered and has
232  * requested for interrupts and the SR interrupt line in present.
233  */
234 static int sr_late_init(struct omap_sr *sr_info)
235 {
236  struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
237  struct resource *mem;
238  int ret = 0;
239 
240  if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
241  ret = request_irq(sr_info->irq, sr_interrupt,
242  0, sr_info->name, sr_info);
243  if (ret)
244  goto error;
245  disable_irq(sr_info->irq);
246  }
247 
248  if (pdata && pdata->enable_on_init)
249  sr_start_vddautocomp(sr_info);
250 
251  return ret;
252 
253 error:
254  iounmap(sr_info->base);
255  mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
256  release_mem_region(mem->start, resource_size(mem));
257  list_del(&sr_info->node);
258  dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
259  "interrupt handler. Smartreflex will"
260  "not function as desired\n", __func__);
261  kfree(sr_info);
262 
263  return ret;
264 }
265 
266 static void sr_v1_disable(struct omap_sr *sr)
267 {
268  int timeout = 0;
271 
272  /* Enable MCUDisableAcknowledge interrupt */
273  sr_modify_reg(sr, ERRCONFIG_V1,
275 
276  /* SRCONFIG - disable SR */
277  sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
278 
279  /* Disable all other SR interrupts and clear the status as needed */
280  if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
281  errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
282  sr_modify_reg(sr, ERRCONFIG_V1,
285  errconf_val);
286 
287  /*
288  * Wait for SR to be disabled.
289  * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
290  */
291  sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
293  timeout);
294 
295  if (timeout >= SR_DISABLE_TIMEOUT)
296  dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
297  __func__);
298 
299  /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
300  sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
302 }
303 
304 static void sr_v2_disable(struct omap_sr *sr)
305 {
306  int timeout = 0;
307 
308  /* Enable MCUDisableAcknowledge interrupt */
309  sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
310 
311  /* SRCONFIG - disable SR */
312  sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
313 
314  /*
315  * Disable all other SR interrupts and clear the status
316  * write to status register ONLY on need basis - only if status
317  * is set.
318  */
319  if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
320  sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
321  ERRCONFIG_VPBOUNDINTST_V2);
322  else
323  sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
324  0x0);
325  sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
328  sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
331 
332  /*
333  * Wait for SR to be disabled.
334  * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
335  */
336  sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
338  timeout);
339 
340  if (timeout >= SR_DISABLE_TIMEOUT)
341  dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
342  __func__);
343 
344  /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
345  sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
346  sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
347 }
348 
349 static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
350  struct omap_sr *sr, u32 efuse_offs)
351 {
352  int i;
353 
354  if (!sr->nvalue_table) {
355  dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
356  __func__);
357  return NULL;
358  }
359 
360  for (i = 0; i < sr->nvalue_count; i++) {
361  if (sr->nvalue_table[i].efuse_offs == efuse_offs)
362  return &sr->nvalue_table[i];
363  }
364 
365  return NULL;
366 }
367 
368 /* Public Functions */
369 
383 {
384  u32 sr_config, sr_errconfig, errconfig_offs;
385  u32 vpboundint_en, vpboundint_st;
386  u32 senp_en = 0, senn_en = 0;
387  u8 senp_shift, senn_shift;
388  struct omap_sr *sr = _sr_lookup(voltdm);
389 
390  if (IS_ERR(sr)) {
391  pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
392  return PTR_ERR(sr);
393  }
394 
395  if (!sr->clk_length)
396  sr_set_clk_length(sr);
397 
398  senp_en = sr->senp_mod;
399  senn_en = sr->senn_mod;
400 
401  sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
403 
404  switch (sr->ip_type) {
405  case SR_TYPE_V1:
406  sr_config |= SRCONFIG_DELAYCTRL;
407  senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
408  senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
409  errconfig_offs = ERRCONFIG_V1;
410  vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
411  vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
412  break;
413  case SR_TYPE_V2:
414  senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
415  senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
416  errconfig_offs = ERRCONFIG_V2;
417  vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
418  vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
419  break;
420  default:
421  dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
422  "module without specifying the ip\n", __func__);
423  return -EINVAL;
424  }
425 
426  sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
427  sr_write_reg(sr, SRCONFIG, sr_config);
428  sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
431  sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
433  sr_errconfig);
434 
435  /* Enabling the interrupts if the ERROR module is used */
436  sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
437  vpboundint_en);
438 
439  return 0;
440 }
441 
451 int sr_disable_errgen(struct voltagedomain *voltdm)
452 {
453  u32 errconfig_offs;
454  u32 vpboundint_en, vpboundint_st;
455  struct omap_sr *sr = _sr_lookup(voltdm);
456 
457  if (IS_ERR(sr)) {
458  pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
459  return PTR_ERR(sr);
460  }
461 
462  switch (sr->ip_type) {
463  case SR_TYPE_V1:
464  errconfig_offs = ERRCONFIG_V1;
465  vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
466  vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
467  break;
468  case SR_TYPE_V2:
469  errconfig_offs = ERRCONFIG_V2;
470  vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
471  vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
472  break;
473  default:
474  dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
475  "module without specifying the ip\n", __func__);
476  return -EINVAL;
477  }
478 
479  /* Disable the interrupts of ERROR module */
480  sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
481 
482  /* Disable the Sensor and errorgen */
483  sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
484 
485  return 0;
486 }
487 
501 {
502  u32 sr_config, sr_avgwt;
503  u32 senp_en = 0, senn_en = 0;
504  u8 senp_shift, senn_shift;
505  struct omap_sr *sr = _sr_lookup(voltdm);
506 
507  if (IS_ERR(sr)) {
508  pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
509  return PTR_ERR(sr);
510  }
511 
512  if (!sr->clk_length)
513  sr_set_clk_length(sr);
514 
515  senp_en = sr->senp_mod;
516  senn_en = sr->senn_mod;
517 
518  sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
521 
522  switch (sr->ip_type) {
523  case SR_TYPE_V1:
524  sr_config |= SRCONFIG_DELAYCTRL;
525  senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
526  senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
527  break;
528  case SR_TYPE_V2:
529  senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
530  senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
531  break;
532  default:
533  dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
534  "module without specifying the ip\n", __func__);
535  return -EINVAL;
536  }
537 
538  sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
539  sr_write_reg(sr, SRCONFIG, sr_config);
540  sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
542  sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
543 
544  /*
545  * Enabling the interrupts if MINMAXAVG module is used.
546  * TODO: check if all the interrupts are mandatory
547  */
548  switch (sr->ip_type) {
549  case SR_TYPE_V1:
550  sr_modify_reg(sr, ERRCONFIG_V1,
556  break;
557  case SR_TYPE_V2:
558  sr_write_reg(sr, IRQSTATUS,
561  sr_write_reg(sr, IRQENABLE_SET,
564  break;
565  default:
566  dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
567  "module without specifying the ip\n", __func__);
568  return -EINVAL;
569  }
570 
571  return 0;
572 }
573 
585 int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
586 {
587  struct omap_volt_data *volt_data;
588  struct omap_sr *sr = _sr_lookup(voltdm);
589  struct omap_sr_nvalue_table *nvalue_row;
590  int ret;
591 
592  if (IS_ERR(sr)) {
593  pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
594  return PTR_ERR(sr);
595  }
596 
597  volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
598 
599  if (IS_ERR(volt_data)) {
600  dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
601  "for nominal voltage %ld\n", __func__, volt);
602  return PTR_ERR(volt_data);
603  }
604 
605  nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
606 
607  if (!nvalue_row) {
608  dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
609  __func__, volt);
610  return -ENODATA;
611  }
612 
613  /* errminlimit is opp dependent and hence linked to voltage */
614  sr->err_minlimit = nvalue_row->errminlimit;
615 
616  pm_runtime_get_sync(&sr->pdev->dev);
617 
618  /* Check if SR is already enabled. If yes do nothing */
619  if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
620  return 0;
621 
622  /* Configure SR */
623  ret = sr_class->configure(sr);
624  if (ret)
625  return ret;
626 
627  sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
628 
629  /* SRCONFIG - enable SR */
630  sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
631  return 0;
632 }
633 
641 void sr_disable(struct voltagedomain *voltdm)
642 {
643  struct omap_sr *sr = _sr_lookup(voltdm);
644 
645  if (IS_ERR(sr)) {
646  pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
647  return;
648  }
649 
650  /* Check if SR clocks are already disabled. If yes do nothing */
651  if (pm_runtime_suspended(&sr->pdev->dev))
652  return;
653 
654  /*
655  * Disable SR if only it is indeed enabled. Else just
656  * disable the clocks.
657  */
658  if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
659  switch (sr->ip_type) {
660  case SR_TYPE_V1:
661  sr_v1_disable(sr);
662  break;
663  case SR_TYPE_V2:
664  sr_v2_disable(sr);
665  break;
666  default:
667  dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
668  sr->ip_type);
669  }
670  }
671 
672  pm_runtime_put_sync_suspend(&sr->pdev->dev);
673 }
674 
683 int sr_register_class(struct omap_sr_class_data *class_data)
684 {
685  struct omap_sr *sr_info;
686 
687  if (!class_data) {
688  pr_warning("%s:, Smartreflex class data passed is NULL\n",
689  __func__);
690  return -EINVAL;
691  }
692 
693  if (sr_class) {
694  pr_warning("%s: Smartreflex class driver already registered\n",
695  __func__);
696  return -EBUSY;
697  }
698 
699  sr_class = class_data;
700 
701  /*
702  * Call into late init to do intializations that require
703  * both sr driver and sr class driver to be initiallized.
704  */
705  list_for_each_entry(sr_info, &sr_list, node)
706  sr_late_init(sr_info);
707 
708  return 0;
709 }
710 
721 void omap_sr_enable(struct voltagedomain *voltdm)
722 {
723  struct omap_sr *sr = _sr_lookup(voltdm);
724 
725  if (IS_ERR(sr)) {
726  pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
727  return;
728  }
729 
730  if (!sr->autocomp_active)
731  return;
732 
733  if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
734  dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
735  "registered\n", __func__);
736  return;
737  }
738 
739  sr_class->enable(sr);
740 }
741 
753 void omap_sr_disable(struct voltagedomain *voltdm)
754 {
755  struct omap_sr *sr = _sr_lookup(voltdm);
756 
757  if (IS_ERR(sr)) {
758  pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
759  return;
760  }
761 
762  if (!sr->autocomp_active)
763  return;
764 
765  if (!sr_class || !(sr_class->disable)) {
766  dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
767  "registered\n", __func__);
768  return;
769  }
770 
771  sr_class->disable(sr, 0);
772 }
773 
786 {
787  struct omap_sr *sr = _sr_lookup(voltdm);
788 
789  if (IS_ERR(sr)) {
790  pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
791  return;
792  }
793 
794  if (!sr->autocomp_active)
795  return;
796 
797  if (!sr_class || !(sr_class->disable)) {
798  dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
799  "registered\n", __func__);
800  return;
801  }
802 
803  sr_class->disable(sr, 1);
804 }
805 
814 void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
815 {
816  if (!pmic_data) {
817  pr_warning("%s: Trying to register NULL PMIC data structure"
818  "with smartreflex\n", __func__);
819  return;
820  }
821 
822  sr_pmic_data = pmic_data;
823 }
824 
825 /* PM Debug FS entries to enable and disable smartreflex. */
826 static int omap_sr_autocomp_show(void *data, u64 *val)
827 {
828  struct omap_sr *sr_info = data;
829 
830  if (!sr_info) {
831  pr_warning("%s: omap_sr struct not found\n", __func__);
832  return -EINVAL;
833  }
834 
835  *val = sr_info->autocomp_active;
836 
837  return 0;
838 }
839 
840 static int omap_sr_autocomp_store(void *data, u64 val)
841 {
842  struct omap_sr *sr_info = data;
843 
844  if (!sr_info) {
845  pr_warning("%s: omap_sr struct not found\n", __func__);
846  return -EINVAL;
847  }
848 
849  /* Sanity check */
850  if (val > 1) {
851  pr_warning("%s: Invalid argument %lld\n", __func__, val);
852  return -EINVAL;
853  }
854 
855  /* control enable/disable only if there is a delta in value */
856  if (sr_info->autocomp_active != val) {
857  if (!val)
858  sr_stop_vddautocomp(sr_info);
859  else
860  sr_start_vddautocomp(sr_info);
861  }
862 
863  return 0;
864 }
865 
866 DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
867  omap_sr_autocomp_store, "%llu\n");
868 
869 static int __init omap_sr_probe(struct platform_device *pdev)
870 {
871  struct omap_sr *sr_info;
872  struct omap_sr_data *pdata = pdev->dev.platform_data;
873  struct resource *mem, *irq;
874  struct dentry *nvalue_dir;
875  int i, ret = 0;
876 
877  sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
878  if (!sr_info) {
879  dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
880  __func__);
881  return -ENOMEM;
882  }
883 
884  platform_set_drvdata(pdev, sr_info);
885 
886  if (!pdata) {
887  dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
888  ret = -EINVAL;
889  goto err_free_devinfo;
890  }
891 
892  mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
893  if (!mem) {
894  dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
895  ret = -ENODEV;
896  goto err_free_devinfo;
897  }
898 
899  mem = request_mem_region(mem->start, resource_size(mem),
900  dev_name(&pdev->dev));
901  if (!mem) {
902  dev_err(&pdev->dev, "%s: no mem region\n", __func__);
903  ret = -EBUSY;
904  goto err_free_devinfo;
905  }
906 
907  irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
908 
909  pm_runtime_enable(&pdev->dev);
910  pm_runtime_irq_safe(&pdev->dev);
911 
912  sr_info->name = kasprintf(GFP_KERNEL, "%s", pdata->name);
913  if (!sr_info->name) {
914  dev_err(&pdev->dev, "%s: Unable to alloc SR instance name\n",
915  __func__);
916  ret = -ENOMEM;
917  goto err_release_region;
918  }
919 
920  sr_info->pdev = pdev;
921  sr_info->srid = pdev->id;
922  sr_info->voltdm = pdata->voltdm;
923  sr_info->nvalue_table = pdata->nvalue_table;
924  sr_info->nvalue_count = pdata->nvalue_count;
925  sr_info->senn_mod = pdata->senn_mod;
926  sr_info->senp_mod = pdata->senp_mod;
927  sr_info->autocomp_active = false;
928  sr_info->ip_type = pdata->ip_type;
929  sr_info->base = ioremap(mem->start, resource_size(mem));
930  if (!sr_info->base) {
931  dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
932  ret = -ENOMEM;
933  goto err_free_name;
934  }
935 
936  if (irq)
937  sr_info->irq = irq->start;
938 
939  sr_set_clk_length(sr_info);
940  sr_set_regfields(sr_info);
941 
942  list_add(&sr_info->node, &sr_list);
943 
944  /*
945  * Call into late init to do intializations that require
946  * both sr driver and sr class driver to be initiallized.
947  */
948  if (sr_class) {
949  ret = sr_late_init(sr_info);
950  if (ret) {
951  pr_warning("%s: Error in SR late init\n", __func__);
952  goto err_iounmap;
953  }
954  }
955 
956  dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
957  if (!sr_dbg_dir) {
958  sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
959  if (IS_ERR_OR_NULL(sr_dbg_dir)) {
960  ret = PTR_ERR(sr_dbg_dir);
961  pr_err("%s:sr debugfs dir creation failed(%d)\n",
962  __func__, ret);
963  goto err_iounmap;
964  }
965  }
966 
967  sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
968  if (IS_ERR_OR_NULL(sr_info->dbg_dir)) {
969  dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
970  __func__);
971  ret = PTR_ERR(sr_info->dbg_dir);
972  goto err_debugfs;
973  }
974 
975  (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
976  sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
977  (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
978  &sr_info->err_weight);
979  (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
980  &sr_info->err_maxlimit);
981 
982  nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
983  if (IS_ERR_OR_NULL(nvalue_dir)) {
984  dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
985  "for n-values\n", __func__);
986  ret = PTR_ERR(nvalue_dir);
987  goto err_debugfs;
988  }
989 
990  if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
991  dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
992  __func__, sr_info->name);
993 
994  ret = -ENODATA;
995  goto err_debugfs;
996  }
997 
998  for (i = 0; i < sr_info->nvalue_count; i++) {
999  char name[NVALUE_NAME_LEN + 1];
1000 
1001  snprintf(name, sizeof(name), "volt_%lu",
1002  sr_info->nvalue_table[i].volt_nominal);
1003  (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
1004  &(sr_info->nvalue_table[i].nvalue));
1005  snprintf(name, sizeof(name), "errminlimit_%lu",
1006  sr_info->nvalue_table[i].volt_nominal);
1007  (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
1008  &(sr_info->nvalue_table[i].errminlimit));
1009 
1010  }
1011 
1012  return ret;
1013 
1014 err_debugfs:
1016 err_iounmap:
1017  list_del(&sr_info->node);
1018  iounmap(sr_info->base);
1019 err_free_name:
1020  kfree(sr_info->name);
1021 err_release_region:
1022  release_mem_region(mem->start, resource_size(mem));
1023 err_free_devinfo:
1024  kfree(sr_info);
1025 
1026  return ret;
1027 }
1028 
1029 static int __devexit omap_sr_remove(struct platform_device *pdev)
1030 {
1031  struct omap_sr_data *pdata = pdev->dev.platform_data;
1032  struct omap_sr *sr_info;
1033  struct resource *mem;
1034 
1035  if (!pdata) {
1036  dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
1037  return -EINVAL;
1038  }
1039 
1040  sr_info = _sr_lookup(pdata->voltdm);
1041  if (IS_ERR(sr_info)) {
1042  dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
1043  __func__);
1044  return PTR_ERR(sr_info);
1045  }
1046 
1047  if (sr_info->autocomp_active)
1048  sr_stop_vddautocomp(sr_info);
1049  if (sr_info->dbg_dir)
1051 
1052  list_del(&sr_info->node);
1053  iounmap(sr_info->base);
1054  kfree(sr_info->name);
1055  kfree(sr_info);
1056  mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1057  release_mem_region(mem->start, resource_size(mem));
1058 
1059  return 0;
1060 }
1061 
1062 static void __devexit omap_sr_shutdown(struct platform_device *pdev)
1063 {
1064  struct omap_sr_data *pdata = pdev->dev.platform_data;
1065  struct omap_sr *sr_info;
1066 
1067  if (!pdata) {
1068  dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
1069  return;
1070  }
1071 
1072  sr_info = _sr_lookup(pdata->voltdm);
1073  if (IS_ERR(sr_info)) {
1074  dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
1075  __func__);
1076  return;
1077  }
1078 
1079  if (sr_info->autocomp_active)
1080  sr_stop_vddautocomp(sr_info);
1081 
1082  return;
1083 }
1084 
1085 static struct platform_driver smartreflex_driver = {
1086  .remove = __devexit_p(omap_sr_remove),
1087  .shutdown = __devexit_p(omap_sr_shutdown),
1088  .driver = {
1089  .name = "smartreflex",
1090  },
1091 };
1092 
1093 static int __init sr_init(void)
1094 {
1095  int ret = 0;
1096 
1097  /*
1098  * sr_init is a late init. If by then a pmic specific API is not
1099  * registered either there is no need for anything to be done on
1100  * the PMIC side or somebody has forgotten to register a PMIC
1101  * handler. Warn for the second condition.
1102  */
1103  if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
1104  sr_pmic_data->sr_pmic_init();
1105  else
1106  pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
1107 
1108  ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
1109  if (ret) {
1110  pr_err("%s: platform driver register failed for SR\n",
1111  __func__);
1112  return ret;
1113  }
1114 
1115  return 0;
1116 }
1117 late_initcall(sr_init);
1118 
1119 static void __exit sr_exit(void)
1120 {
1121  platform_driver_unregister(&smartreflex_driver);
1122 }
1123 module_exit(sr_exit);
1124 
1125 MODULE_DESCRIPTION("OMAP Smartreflex Driver");
1126 MODULE_LICENSE("GPL");
1127 MODULE_ALIAS("platform:" DRIVER_NAME);
1128 MODULE_AUTHOR("Texas Instruments Inc");