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Macros | Typedefs
smc9194.h File Reference

Go to the source code of this file.

Macros

#define SMC_IO_EXTENT   16
 
#define BANK_SELECT   14
 
#define TCR   0 /* transmit control register */
 
#define TCR_ENABLE   0x0001 /* if this is 1, we can transmit */
 
#define TCR_FDUPLX   0x0800 /* receive packets sent out */
 
#define TCR_STP_SQET   0x1000 /* stop transmitting if Signal quality error */
 
#define TCR_MON_CNS   0x0400 /* monitors the carrier status */
 
#define TCR_PAD_ENABLE   0x0080 /* pads short packets to 64 bytes */
 
#define TCR_CLEAR   0 /* do NOTHING */
 
#define TCR_NORMAL   TCR_ENABLE
 
#define EPH_STATUS   2
 
#define ES_LINK_OK   0x4000 /* is the link integrity ok ? */
 
#define RCR   4
 
#define RCR_SOFTRESET   0x8000 /* resets the chip */
 
#define RCR_STRIP_CRC   0x200 /* strips CRC */
 
#define RCR_ENABLE   0x100 /* IFF this is set, we can receive packets */
 
#define RCR_ALMUL   0x4 /* receive all multicast packets */
 
#define RCR_PROMISC   0x2 /* enable promiscuous mode */
 
#define RCR_NORMAL   (RCR_STRIP_CRC | RCR_ENABLE)
 
#define RCR_CLEAR   0x0 /* set it to a base state */
 
#define COUNTER   6
 
#define MIR   8
 
#define MCR   10
 
#define CONFIG   0
 
#define CFG_AUI_SELECT   0x100
 
#define BASE   2
 
#define ADDR0   4
 
#define ADDR1   6
 
#define ADDR2   8
 
#define GENERAL   10
 
#define CONTROL   12
 
#define CTL_POWERDOWN   0x2000
 
#define CTL_LE_ENABLE   0x80
 
#define CTL_CR_ENABLE   0x40
 
#define CTL_TE_ENABLE   0x0020
 
#define CTL_AUTO_RELEASE   0x0800
 
#define CTL_EPROM_ACCESS   0x0003 /* high if Eprom is being read */
 
#define MMU_CMD   0
 
#define MC_BUSY   1 /* only readable bit in the register */
 
#define MC_NOP   0
 
#define MC_ALLOC   0x20 /* or with number of 256 byte packets */
 
#define MC_RESET   0x40
 
#define MC_REMOVE   0x60 /* remove the current rx packet */
 
#define MC_RELEASE   0x80 /* remove and release the current rx packet */
 
#define MC_FREEPKT   0xA0 /* Release packet in PNR register */
 
#define MC_ENQUEUE   0xC0 /* Enqueue the packet for transmit */
 
#define PNR_ARR   2
 
#define FIFO_PORTS   4
 
#define FP_RXEMPTY   0x8000
 
#define FP_TXEMPTY   0x80
 
#define POINTER   6
 
#define PTR_READ   0x2000
 
#define PTR_RCV   0x8000
 
#define PTR_AUTOINC   0x4000
 
#define PTR_AUTO_INC   0x0040
 
#define DATA_1   8
 
#define DATA_2   10
 
#define INTERRUPT   12
 
#define INT_MASK   13
 
#define IM_RCV_INT   0x1
 
#define IM_TX_INT   0x2
 
#define IM_TX_EMPTY_INT   0x4
 
#define IM_ALLOC_INT   0x8
 
#define IM_RX_OVRN_INT   0x10
 
#define IM_EPH_INT   0x20
 
#define IM_ERCV_INT   0x40 /* not on SMC9192 */
 
#define MULTICAST1   0
 
#define MULTICAST2   2
 
#define MULTICAST3   4
 
#define MULTICAST4   6
 
#define MGMT   8
 
#define REVISION   10 /* ( hi: chip id low: rev # ) */
 
#define ERCV   12
 
#define CHIP_9190   3
 
#define CHIP_9194   4
 
#define CHIP_9195   5
 
#define CHIP_91100   7
 
#define TS_SUCCESS   0x0001
 
#define TS_LOSTCAR   0x0400
 
#define TS_LATCOL   0x0200
 
#define TS_16COL   0x0010
 
#define RS_ALGNERR   0x8000
 
#define RS_BADCRC   0x2000
 
#define RS_ODDFRAME   0x1000
 
#define RS_TOOLONG   0x0800
 
#define RS_TOOSHORT   0x0400
 
#define RS_MULTICAST   0x0001
 
#define RS_ERRORS   (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
 
#define SMC_SELECT_BANK(x)   { outw( x, ioaddr + BANK_SELECT ); }
 
#define SMC_DELAY()
 
#define SMC_ENABLE_INT(x)
 
#define SMC_DISABLE_INT(x)
 
#define SMC_INTERRUPT_MASK   (IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT)
 

Typedefs

typedef unsigned char byte
 
typedef unsigned short word
 
typedef unsigned long int dword
 

Macro Definition Documentation

#define ADDR0   4

Definition at line 100 of file smc9194.h.

#define ADDR1   6

Definition at line 101 of file smc9194.h.

#define ADDR2   8

Definition at line 102 of file smc9194.h.

#define BANK_SELECT   14

Definition at line 60 of file smc9194.h.

#define BASE   2

Definition at line 99 of file smc9194.h.

#define CFG_AUI_SELECT   0x100

Definition at line 98 of file smc9194.h.

#define CHIP_91100   7

Definition at line 163 of file smc9194.h.

#define CHIP_9190   3

Definition at line 160 of file smc9194.h.

#define CHIP_9194   4

Definition at line 161 of file smc9194.h.

#define CHIP_9195   5

Definition at line 162 of file smc9194.h.

#define CONFIG   0

Definition at line 97 of file smc9194.h.

#define CONTROL   12

Definition at line 104 of file smc9194.h.

#define COUNTER   6

Definition at line 91 of file smc9194.h.

#define CTL_AUTO_RELEASE   0x0800

Definition at line 109 of file smc9194.h.

#define CTL_CR_ENABLE   0x40

Definition at line 107 of file smc9194.h.

#define CTL_EPROM_ACCESS   0x0003 /* high if Eprom is being read */

Definition at line 110 of file smc9194.h.

#define CTL_LE_ENABLE   0x80

Definition at line 106 of file smc9194.h.

#define CTL_POWERDOWN   0x2000

Definition at line 105 of file smc9194.h.

#define CTL_TE_ENABLE   0x0020

Definition at line 108 of file smc9194.h.

#define DATA_1   8

Definition at line 135 of file smc9194.h.

#define DATA_2   10

Definition at line 136 of file smc9194.h.

#define EPH_STATUS   2

Definition at line 77 of file smc9194.h.

#define ERCV   12

Definition at line 158 of file smc9194.h.

#define ES_LINK_OK   0x4000 /* is the link integrity ok ? */

Definition at line 78 of file smc9194.h.

#define FIFO_PORTS   4

Definition at line 124 of file smc9194.h.

#define FP_RXEMPTY   0x8000

Definition at line 126 of file smc9194.h.

#define FP_TXEMPTY   0x80

Definition at line 127 of file smc9194.h.

#define GENERAL   10

Definition at line 103 of file smc9194.h.

#define IM_ALLOC_INT   0x8

Definition at line 143 of file smc9194.h.

#define IM_EPH_INT   0x20

Definition at line 145 of file smc9194.h.

#define IM_ERCV_INT   0x40 /* not on SMC9192 */

Definition at line 146 of file smc9194.h.

#define IM_RCV_INT   0x1

Definition at line 140 of file smc9194.h.

#define IM_RX_OVRN_INT   0x10

Definition at line 144 of file smc9194.h.

#define IM_TX_EMPTY_INT   0x4

Definition at line 142 of file smc9194.h.

#define IM_TX_INT   0x2

Definition at line 141 of file smc9194.h.

#define INT_MASK   13

Definition at line 139 of file smc9194.h.

#define INTERRUPT   12

Definition at line 137 of file smc9194.h.

#define MC_ALLOC   0x20 /* or with number of 256 byte packets */

Definition at line 116 of file smc9194.h.

#define MC_BUSY   1 /* only readable bit in the register */

Definition at line 114 of file smc9194.h.

#define MC_ENQUEUE   0xC0 /* Enqueue the packet for transmit */

Definition at line 121 of file smc9194.h.

#define MC_FREEPKT   0xA0 /* Release packet in PNR register */

Definition at line 120 of file smc9194.h.

#define MC_NOP   0

Definition at line 115 of file smc9194.h.

#define MC_RELEASE   0x80 /* remove and release the current rx packet */

Definition at line 119 of file smc9194.h.

#define MC_REMOVE   0x60 /* remove the current rx packet */

Definition at line 118 of file smc9194.h.

#define MC_RESET   0x40

Definition at line 117 of file smc9194.h.

#define MCR   10

Definition at line 93 of file smc9194.h.

#define MGMT   8

Definition at line 153 of file smc9194.h.

#define MIR   8

Definition at line 92 of file smc9194.h.

#define MMU_CMD   0

Definition at line 113 of file smc9194.h.

#define MULTICAST1   0

Definition at line 149 of file smc9194.h.

#define MULTICAST2   2

Definition at line 150 of file smc9194.h.

#define MULTICAST3   4

Definition at line 151 of file smc9194.h.

#define MULTICAST4   6

Definition at line 152 of file smc9194.h.

#define PNR_ARR   2

Definition at line 123 of file smc9194.h.

#define POINTER   6

Definition at line 129 of file smc9194.h.

#define PTR_AUTO_INC   0x0040

Definition at line 133 of file smc9194.h.

#define PTR_AUTOINC   0x4000

Definition at line 132 of file smc9194.h.

#define PTR_RCV   0x8000

Definition at line 131 of file smc9194.h.

#define PTR_READ   0x2000

Definition at line 130 of file smc9194.h.

#define RCR   4

Definition at line 80 of file smc9194.h.

#define RCR_ALMUL   0x4 /* receive all multicast packets */

Definition at line 84 of file smc9194.h.

#define RCR_CLEAR   0x0 /* set it to a base state */

Definition at line 89 of file smc9194.h.

#define RCR_ENABLE   0x100 /* IFF this is set, we can receive packets */

Definition at line 83 of file smc9194.h.

#define RCR_NORMAL   (RCR_STRIP_CRC | RCR_ENABLE)

Definition at line 88 of file smc9194.h.

#define RCR_PROMISC   0x2 /* enable promiscuous mode */

Definition at line 85 of file smc9194.h.

#define RCR_SOFTRESET   0x8000 /* resets the chip */

Definition at line 81 of file smc9194.h.

#define RCR_STRIP_CRC   0x200 /* strips CRC */

Definition at line 82 of file smc9194.h.

#define REVISION   10 /* ( hi: chip id low: rev # ) */

Definition at line 154 of file smc9194.h.

#define RS_ALGNERR   0x8000

Definition at line 187 of file smc9194.h.

#define RS_BADCRC   0x2000

Definition at line 188 of file smc9194.h.

#define RS_ERRORS   (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)

Definition at line 193 of file smc9194.h.

#define RS_MULTICAST   0x0001

Definition at line 192 of file smc9194.h.

#define RS_ODDFRAME   0x1000

Definition at line 189 of file smc9194.h.

#define RS_TOOLONG   0x0800

Definition at line 190 of file smc9194.h.

#define RS_TOOSHORT   0x0400

Definition at line 191 of file smc9194.h.

#define SMC_DELAY ( )
Value:
{ inw( ioaddr + RCR );\
inw( ioaddr + RCR );\
inw( ioaddr + RCR ); }

Definition at line 207 of file smc9194.h.

#define SMC_DISABLE_INT (   x)
Value:
{\
unsigned char mask;\
SMC_SELECT_BANK(2);\
mask = inb( ioaddr + INT_MASK );\
mask &= ~(x);\
outb( mask, ioaddr + INT_MASK ); \
}

Definition at line 222 of file smc9194.h.

#define SMC_ENABLE_INT (   x)
Value:
{\
unsigned char mask;\
SMC_SELECT_BANK(2);\
mask = inb( ioaddr + INT_MASK );\
mask |= (x);\
outb( mask, ioaddr + INT_MASK ); \
}

Definition at line 212 of file smc9194.h.

#define SMC_INTERRUPT_MASK   (IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT)

Definition at line 238 of file smc9194.h.

#define SMC_IO_EXTENT   16

Definition at line 37 of file smc9194.h.

#define SMC_SELECT_BANK (   x)    { outw( x, ioaddr + BANK_SELECT ); }

Definition at line 204 of file smc9194.h.

#define TCR   0 /* transmit control register */

Definition at line 64 of file smc9194.h.

#define TCR_CLEAR   0 /* do NOTHING */

Definition at line 71 of file smc9194.h.

#define TCR_ENABLE   0x0001 /* if this is 1, we can transmit */

Definition at line 65 of file smc9194.h.

#define TCR_FDUPLX   0x0800 /* receive packets sent out */

Definition at line 66 of file smc9194.h.

#define TCR_MON_CNS   0x0400 /* monitors the carrier status */

Definition at line 68 of file smc9194.h.

#define TCR_NORMAL   TCR_ENABLE

Definition at line 74 of file smc9194.h.

#define TCR_PAD_ENABLE   0x0080 /* pads short packets to 64 bytes */

Definition at line 69 of file smc9194.h.

#define TCR_STP_SQET   0x1000 /* stop transmitting if Signal quality error */

Definition at line 67 of file smc9194.h.

#define TS_16COL   0x0010

Definition at line 182 of file smc9194.h.

#define TS_LATCOL   0x0200

Definition at line 181 of file smc9194.h.

#define TS_LOSTCAR   0x0400

Definition at line 180 of file smc9194.h.

#define TS_SUCCESS   0x0001

Definition at line 179 of file smc9194.h.

Typedef Documentation

typedef unsigned char byte

Definition at line 30 of file smc9194.h.

typedef unsigned long int dword

Definition at line 32 of file smc9194.h.

typedef unsigned short word

Definition at line 31 of file smc9194.h.