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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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| #define DMA_RX_MODE 0x04 /* I/O to mem, ++, demand. */ |
Definition at line 39 of file smsc-ircc2.h.
| #define DMA_TX_MODE 0x08 /* Mem to I/O, ++, demand. */ |
Definition at line 38 of file smsc-ircc2.h.
| #define IRCC_1152 0x80 |
Definition at line 160 of file smsc-ircc2.h.
| #define IRCC_ATC 0x00 |
Definition at line 164 of file smsc-ircc2.h.
| #define IRCC_ATC_ENABLE 0x20 |
Definition at line 167 of file smsc-ircc2.h.
| #define IRCC_ATC_MASK 0xE0 |
Definition at line 168 of file smsc-ircc2.h.
| #define IRCC_ATC_nPROGREADY 0x80 |
Definition at line 165 of file smsc-ircc2.h.
| #define IRCC_ATC_SPEED 0x40 |
Definition at line 166 of file smsc-ircc2.h.
| #define IRCC_BOF_COUNT_HI 0x00 /* High nibble (bit 0-3) */ |
Definition at line 152 of file smsc-ircc2.h.
| #define IRCC_BOF_COUNT_LO 0x01 /* Low byte */ |
Definition at line 151 of file smsc-ircc2.h.
| #define IRCC_BRICKWALL_CNT_HI 0x03 /* High nibble (bit 4-7) */ |
Definition at line 154 of file smsc-ircc2.h.
| #define IRCC_BRICKWALL_CNT_LO 0x02 /* Low byte */ |
Definition at line 153 of file smsc-ircc2.h.
| #define IRCC_BSR 0x06 |
Definition at line 97 of file smsc-ircc2.h.
| #define IRCC_BSR_FIFO_FULL 0x40 |
Definition at line 99 of file smsc-ircc2.h.
| #define IRCC_BSR_NOT_EMPTY 0x80 |
Definition at line 98 of file smsc-ircc2.h.
| #define IRCC_BSR_TIMEOUT 0x20 |
Definition at line 100 of file smsc-ircc2.h.
| #define IRCC_CFGA_ASK_SIR 0x10 |
Definition at line 115 of file smsc-ircc2.h.
| #define IRCC_CFGA_AUX_IR 0x80 |
Definition at line 107 of file smsc-ircc2.h.
| #define IRCC_CFGA_COM 0x00 |
Definition at line 112 of file smsc-ircc2.h.
| #define IRCC_CFGA_CONSUMER 0x30 |
Definition at line 119 of file smsc-ircc2.h.
| #define IRCC_CFGA_HALF_DUPLEX 0x04 |
Definition at line 108 of file smsc-ircc2.h.
| #define IRCC_CFGA_IRDA_4PPM 0x28 |
Definition at line 118 of file smsc-ircc2.h.
| #define IRCC_CFGA_IRDA_HDLC 0x20 |
Definition at line 117 of file smsc-ircc2.h.
| #define IRCC_CFGA_IRDA_SIR_A 0x08 |
Definition at line 114 of file smsc-ircc2.h.
| #define IRCC_CFGA_IRDA_SIR_B 0x18 |
Definition at line 116 of file smsc-ircc2.h.
| #define IRCC_CFGA_OTHER 0x40 |
Definition at line 121 of file smsc-ircc2.h.
| #define IRCC_CFGA_RAW_IR 0x38 |
Definition at line 120 of file smsc-ircc2.h.
| #define IRCC_CFGA_RX_POLARITY 0x01 |
Definition at line 110 of file smsc-ircc2.h.
| #define IRCC_CFGA_TX_POLARITY 0x02 |
Definition at line 109 of file smsc-ircc2.h.
| #define IRCC_CFGB_DMA_BURST 0x02 |
Definition at line 132 of file smsc-ircc2.h.
| #define IRCC_CFGB_DMA_ENABLE 0x01 |
Definition at line 133 of file smsc-ircc2.h.
| #define IRCC_CFGB_LOOPBACK 0x20 |
Definition at line 128 of file smsc-ircc2.h.
| #define IRCC_CFGB_LPBCK_TX_CRC 0x10 |
Definition at line 129 of file smsc-ircc2.h.
| #define IRCC_CFGB_MUX_AUX 0x80 |
Definition at line 137 of file smsc-ircc2.h.
| #define IRCC_CFGB_MUX_COM 0x00 |
Definition at line 135 of file smsc-ircc2.h.
| #define IRCC_CFGB_MUX_INACTIVE 0xc0 |
Definition at line 138 of file smsc-ircc2.h.
| #define IRCC_CFGB_MUX_IR 0x40 |
Definition at line 136 of file smsc-ircc2.h.
| #define IRCC_CFGB_NOWAIT 0x08 |
Definition at line 130 of file smsc-ircc2.h.
| #define IRCC_CFGB_STRING_MOVE 0x04 |
Definition at line 131 of file smsc-ircc2.h.
| #define IRCC_CHIP_ID 0x02 /* 0xF1 */ |
Definition at line 143 of file smsc-ircc2.h.
| #define IRCC_CONTROL 0x00 |
Definition at line 150 of file smsc-ircc2.h.
| #define IRCC_CRC 0x40 |
Definition at line 161 of file smsc-ircc2.h.
| #define IRCC_FIFO_THRESHOLD 0x02 |
Definition at line 104 of file smsc-ircc2.h.
| #define IRCC_ID_HIGH 0x00 /* 0x10 */ |
Definition at line 141 of file smsc-ircc2.h.
| #define IRCC_ID_LOW 0x01 /* 0xB8 */ |
Definition at line 142 of file smsc-ircc2.h.
| #define IRCC_IER 0x02 |
Definition at line 58 of file smsc-ircc2.h.
| #define IRCC_IER_ACTIVE_FRAME 0x80 |
Definition at line 59 of file smsc-ircc2.h.
| #define IRCC_IER_EOM 0x40 |
Definition at line 60 of file smsc-ircc2.h.
| #define IRCC_IER_FIFO 0x10 |
Definition at line 62 of file smsc-ircc2.h.
| #define IRCC_IER_RAW_MODE 0x20 |
Definition at line 61 of file smsc-ircc2.h.
| #define IRCC_IIR 0x01 |
Definition at line 51 of file smsc-ircc2.h.
| #define IRCC_IIR_ACTIVE_FRAME 0x80 |
Definition at line 52 of file smsc-ircc2.h.
| #define IRCC_IIR_EOM 0x40 |
Definition at line 53 of file smsc-ircc2.h.
| #define IRCC_IIR_FIFO 0x10 |
Definition at line 55 of file smsc-ircc2.h.
| #define IRCC_IIR_RAW_MODE 0x20 |
Definition at line 54 of file smsc-ircc2.h.
| #define IRCC_INTERFACE 0x04 /* low 4 = DMA, high 4 = IRQ */ |
Definition at line 145 of file smsc-ircc2.h.
| #define IRCC_INTERFACE_DMA_MASK 0x0F /* low 4 = DMA, high 4 = IRQ */ |
Definition at line 146 of file smsc-ircc2.h.
| #define IRCC_INTERFACE_IRQ_MASK 0xF0 /* low 4 = DMA, high 4 = IRQ */ |
Definition at line 147 of file smsc-ircc2.h.
| #define IRCC_IR_4PPM 0x01 |
Definition at line 124 of file smsc-ircc2.h.
| #define IRCC_IR_CONSUMER 0x02 |
Definition at line 125 of file smsc-ircc2.h.
| #define IRCC_IR_HDLC 0x04 |
Definition at line 123 of file smsc-ircc2.h.
| #define IRCC_IRHALFDUPLEX_TIMEOUT 0x01 |
Definition at line 171 of file smsc-ircc2.h.
| #define IRCC_LCR_A 0x04 |
Definition at line 78 of file smsc-ircc2.h.
| #define IRCC_LCR_A_ABORT 0x04 |
Definition at line 84 of file smsc-ircc2.h.
| #define IRCC_LCR_A_DATA_DONE 0x02 |
Definition at line 85 of file smsc-ircc2.h.
| #define IRCC_LCR_A_FAST 0x40 |
Definition at line 80 of file smsc-ircc2.h.
| #define IRCC_LCR_A_FIFO_RESET 0x80 |
Definition at line 79 of file smsc-ircc2.h.
| #define IRCC_LCR_A_GP_DATA 0x20 |
Definition at line 81 of file smsc-ircc2.h.
| #define IRCC_LCR_A_RAW_RX 0x08 |
Definition at line 83 of file smsc-ircc2.h.
| #define IRCC_LCR_A_RAW_TX 0x10 |
Definition at line 82 of file smsc-ircc2.h.
| #define IRCC_LCR_B 0x05 |
Definition at line 88 of file smsc-ircc2.h.
| #define IRCC_LCR_B_BRICK_WALL 0x10 |
Definition at line 94 of file smsc-ircc2.h.
| #define IRCC_LCR_B_SCE_DISABLED 0x00 |
Definition at line 89 of file smsc-ircc2.h.
| #define IRCC_LCR_B_SCE_RECEIVE 0x80 |
Definition at line 91 of file smsc-ircc2.h.
| #define IRCC_LCR_B_SCE_TRANSMIT 0x40 |
Definition at line 90 of file smsc-ircc2.h.
| #define IRCC_LCR_B_SCE_UNDEFINED 0xc0 |
Definition at line 92 of file smsc-ircc2.h.
| #define IRCC_LCR_B_SIP_ENABLE 0x20 |
Definition at line 93 of file smsc-ircc2.h.
| #define IRCC_LSAR 0x03 |
Definition at line 74 of file smsc-ircc2.h.
| #define IRCC_LSAR_ADDRESS_MASK 0x07 |
Definition at line 75 of file smsc-ircc2.h.
| #define IRCC_LSR 0x03 |
Definition at line 65 of file smsc-ircc2.h.
| #define IRCC_LSR_CRC_ERROR 0x80 |
Definition at line 70 of file smsc-ircc2.h.
| #define IRCC_LSR_FRAME_ABORT 0x40 |
Definition at line 71 of file smsc-ircc2.h.
| #define IRCC_LSR_FRAME_ERROR 0x20 |
Definition at line 68 of file smsc-ircc2.h.
| #define IRCC_LSR_OVERRUN 0x40 |
Definition at line 67 of file smsc-ircc2.h.
| #define IRCC_LSR_SIZE_ERROR 0x10 |
Definition at line 69 of file smsc-ircc2.h.
| #define IRCC_LSR_UNDERRUN 0x80 |
Definition at line 66 of file smsc-ircc2.h.
| #define IRCC_MASTER 0x07 |
Definition at line 42 of file smsc-ircc2.h.
| #define IRCC_MASTER_ERROR_RESET 0x10 |
Definition at line 46 of file smsc-ircc2.h.
| #define IRCC_MASTER_INT_EN 0x20 |
Definition at line 45 of file smsc-ircc2.h.
| #define IRCC_MASTER_POWERDOWN 0x80 |
Definition at line 43 of file smsc-ircc2.h.
| #define IRCC_MASTER_RESET 0x40 |
Definition at line 44 of file smsc-ircc2.h.
| #define IRCC_RX_SIZE_HI 0x05 /* High nibble (bit 0-3) */ |
Definition at line 157 of file smsc-ircc2.h.
| #define IRCC_RX_SIZE_LO 0x06 /* Low byte */ |
Definition at line 158 of file smsc-ircc2.h.
| #define IRCC_SCE_CFGA 0x00 |
Definition at line 106 of file smsc-ircc2.h.
| #define IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK 0x87 |
Definition at line 113 of file smsc-ircc2.h.
| #define IRCC_SCE_CFGB 0x01 |
Definition at line 127 of file smsc-ircc2.h.
| #define IRCC_SCE_TX_DELAY_TIMER 0x02 |
Definition at line 173 of file smsc-ircc2.h.
| #define IRCC_TX_SIZE_HI 0x03 /* High nibble (bit 0-3) */ |
Definition at line 156 of file smsc-ircc2.h.
| #define IRCC_TX_SIZE_LO 0x04 /* Low byte */ |
Definition at line 155 of file smsc-ircc2.h.
| #define IRCC_VERSION 0x03 /* 0x01 */ |
Definition at line 144 of file smsc-ircc2.h.
| #define SMSC_IRCC2_ATC_PROGRAMMING_TIMEOUT_JIFFIES 1 |
Definition at line 192 of file smsc-ircc2.h.
| #define SMSC_IRCC2_FIFO_SIZE 16 |
Definition at line 182 of file smsc-ircc2.h.
| #define SMSC_IRCC2_FIFO_THRESHOLD 64 |
Definition at line 183 of file smsc-ircc2.h.
| #define SMSC_IRCC2_FIR_CHIP_IO_EXTENT 8 |
Definition at line 180 of file smsc-ircc2.h.
| #define SMSC_IRCC2_HW_TRANSMITTER_TIMEOUT_US 1000 /* 1 ms */ |
Definition at line 190 of file smsc-ircc2.h.
| #define SMSC_IRCC2_MAX_SIR_SPEED 115200 |
Definition at line 179 of file smsc-ircc2.h.
| #define SMSC_IRCC2_MIN_TURN_TIME 0x07 |
Definition at line 187 of file smsc-ircc2.h.
| #define SMSC_IRCC2_RX_BUFF_TRUESIZE 14384 |
Definition at line 185 of file smsc-ircc2.h.
| #define SMSC_IRCC2_SIR_CHIP_IO_EXTENT 8 |
Definition at line 181 of file smsc-ircc2.h.
| #define SMSC_IRCC2_TX_BUFF_TRUESIZE 14384 |
Definition at line 186 of file smsc-ircc2.h.
| #define SMSC_IRCC2_WINDOW_SIZE 0x07 |
Definition at line 188 of file smsc-ircc2.h.
1.8.2