#include <linux/kernel_stat.h>
#include <linux/seq_file.h>
#include <linux/export.h>
#include <asm/cacheflush.h>
#include <asm/cpudata.h>
#include <asm/pcic.h>
#include <asm/leon.h>
#include "kernel.h"
#include "irq.h"
Go to the source code of this file.
void arch_local_irq_restore |
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unsigned long |
old_psr | ) |
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unsigned long arch_local_irq_save |
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void |
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The hexagon core comes with a first-level interrupt controller with 32 total possible interrupts. When the core is embedded into different systems/platforms, it is typically wrapped by macro cells that provide one or more second-level interrupt controllers that are cascaded into one or more of the first-level interrupts handled here. The precise wiring of these other irqs varies from platform to platform, and are set up & configured in the platform-specific files.
The first-level interrupt controller is wrapped by the VM, which virtualizes the interrupt controller for us. It provides a very simple, fast & efficient API, and so the fasteoi handler is appropriate for this case.
Definition at line 337 of file irq_32.c.
unsigned int irq_alloc |
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unsigned int |
real_irq, |
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unsigned int |
pil |
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) |
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void irq_unlink |
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unsigned int |
irq | ) |
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