clk_pllv3 Struct Reference

Data Fields
struct clk_hw	hw
void __iomem *	base
bool	powerup_set
u32	gate_mask
u32	div_mask

Detailed Description

struct clk_pllv3 - IMX PLL clock version 3 : clock source : base address of PLL registers : set POWER bit to power up the PLL : mask of gate bits : mask of divider bits

IMX PLL clock version 3, found on i.MX6 series. Divider for pllv3 is actually a multiplier, and always sits at bit 0.

Definition at line 40 of file clk-pllv3.c.

Field Documentation

void __iomem* base

Definition at line 42 of file clk-pllv3.c.

u32 div_mask

Definition at line 45 of file clk-pllv3.c.

u32 gate_mask

Definition at line 44 of file clk-pllv3.c.

struct clk_hw hw

Definition at line 41 of file clk-pllv3.c.

bool powerup_set

Definition at line 43 of file clk-pllv3.c.

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The documentation for this struct was generated from the following file:

• arch/arm/mach-imx/clk-pllv3.c