Linux Kernel
3.7.1
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Data Fields | |
struct clk_hw | hw |
void __iomem * | reg |
u8 | idx |
struct clk_ref - mxs reference clock : clk_hw for the reference clock : register address : the index of the reference clock within the same register
The mxs reference clock sources from pll. Every 4 reference clocks share one register space, and is used to identify them. Each reference clock has a gate control and a fractional * divider. The rate is calculated as pll rate * (18 / FRAC), where FRAC = 18 ~ 35.