#include <dw_mmc.h>

Data Fields
spinlock_t	lock

void __iomem *	regs

struct scatterlist *	sg

struct sg_mapping_iter	sg_miter

struct dw_mci_slot *	cur_slot

struct mmc_request *	mrq

struct mmc_command *	cmd

struct mmc_data *	data

struct workqueue_struct *	card_workqueue

int	use_dma

int	using_dma

dma_addr_t	sg_dma

void *	sg_cpu

struct dw_mci_dma_ops *	dma_ops

struct dw_mci_dma_data *	dma_data

u32	cmd_status

u32	data_status

u32	stop_cmdr

u32	dir_status

struct tasklet_struct	tasklet

struct work_struct	card_work

unsigned long	pending_events

unsigned long	completed_events

enum dw_mci_state	state

struct list_head	queue

u32	bus_hz

u32	current_speed

u32	num_slots

u32	fifoth_val

u16	verid

u16	data_offset

struct device *	dev

struct dw_mci_board *	pdata

struct dw_mci_drv_data *	drv_data

void *	priv

struct clk *	biu_clk

struct clk *	ciu_clk

struct dw_mci_slot *	slot [MAX_MCI_SLOTS]

int	fifo_depth

int	data_shift

u8	part_buf_start

u8	part_buf_count

union {
u16 part_buf16

u32 part_buf32

u64 part_buf

};

void(*	push_data )(struct dw_mci host, void buf, int cnt)

void(*	pull_data )(struct dw_mci host, void buf, int cnt)

u32	quirks

struct regulator *	vmmc

unsigned long	irq_flags

int	irq

Detailed Description

struct dw_mci - MMC controller state shared between all slots : Spinlock protecting the queue and associated data. : Pointer to MMIO registers. : Scatterlist entry currently being processed by PIO code, if any. : PIO mapping scatterlist iterator. : The slot which is currently using the controller. : The request currently being processed on , or NULL if the controller is idle. : The command currently being sent to the card, or NULL. : The data currently being transferred, or NULL if no data transfer is in progress. : Whether DMA channel is initialized or not. : Whether DMA is in use for the current transfer. : Bus address of DMA buffer. : Virtual address of DMA buffer. : Pointer to platform-specific DMA callbacks. : Snapshot of SR taken upon completion of the current command. Only valid when EVENT_CMD_COMPLETE is pending. : Snapshot of SR taken upon completion of the current data transfer. Only valid when EVENT_DATA_COMPLETE or EVENT_DATA_ERROR is pending. : Value to be loaded into CMDR when the stop command is to be sent. : Direction of current transfer. : Tasklet running the request state machine. : Tasklet handling card detect. : Bitmask of events flagged by the interrupt handler to be processed by the tasklet. : Bitmask of events which the state machine has processed. : Tasklet state. : List of slots waiting for access to the controller. : The rate of in Hz. This forms the basis for MMC bus rate and timeout calculations. : Configured rate of the controller. : Number of slots available. : Denote Version ID. : Set the offset of DATA register according to VERID. : Device associated with the MMC controller. : Platform data associated with the MMC controller. : Driver specific data for identified variant of the controller : Implementation defined private data. : Pointer to bus interface unit clock instance. : Pointer to card interface unit clock instance. : Slots sharing this MMC controller. : depth of FIFO. : log2 of FIFO item size. : Start index in part_buf. : Bytes of partial data in part_buf. : Simple buffer for partial fifo reads/writes. : Pointer to FIFO push function. : Pointer to FIFO pull function. : Set of quirks that apply to specific versions of the IP. : The flags to be passed to request_irq. : The irq value to be passed to request_irq.

Locking

is a softirq-safe spinlock protecting as well as , and . These must always be updated at the same time while holding .

The field of struct dw_mci_slot is also protected by , and must always be written at the same time as the slot is added to .

and are accessed using atomic bit operations, so they don't need any locking.

None of the fields touched by the interrupt handler need any locking. However, ordering is important: Before EVENT_DATA_ERROR or EVENT_DATA_COMPLETE is set in , all data-related interrupts must be disabled and updated with a snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the CMDRDY interrupt must be disabled and updated with a snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the bytes_xfered field of must be written. This is ensured by using barriers.

Definition at line 121 of file dw_mmc.h.