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hypervisor.h
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1 /*
2  * Copyright 2010 Tilera Corporation. All Rights Reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation, version 2.
7  *
8  * This program is distributed in the hope that it will be useful, but
9  * WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11  * NON INFRINGEMENT. See the GNU General Public License for
12  * more details.
13  */
14 
20 #ifndef _HV_HV_H
21 #define _HV_HV_H
22 
23 #include <arch/chip.h>
24 
25 /* Linux builds want unsigned long constants, but assembler wants numbers */
26 #ifdef __ASSEMBLER__
27 
28 #define __HV_SIZE_ONE 1
29 #elif !defined(__tile__) && CHIP_VA_WIDTH() > 32
30 
31 #define __HV_SIZE_ONE 1ULL
32 #else
33 
34 #define __HV_SIZE_ONE 1UL
35 #endif
36 
39 #define HV_LOG2_L1_SPAN 32
40 
43 #define HV_L1_SPAN (__HV_SIZE_ONE << HV_LOG2_L1_SPAN)
44 
48 #define HV_LOG2_DEFAULT_PAGE_SIZE_SMALL 16
49 
54 #define HV_DEFAULT_PAGE_SIZE_SMALL \
55  (__HV_SIZE_ONE << HV_LOG2_DEFAULT_PAGE_SIZE_SMALL)
56 
60 #define HV_LOG2_DEFAULT_PAGE_SIZE_LARGE 24
61 
66 #define HV_DEFAULT_PAGE_SIZE_LARGE \
67  (__HV_SIZE_ONE << HV_LOG2_DEFAULT_PAGE_SIZE_LARGE)
68 
69 #if CHIP_VA_WIDTH() > 32
70 
74 #define HV_LOG2_DEFAULT_PAGE_SIZE_JUMBO 32
75 
80 #define HV_DEFAULT_PAGE_SIZE_JUMBO \
81  (__HV_SIZE_ONE << HV_LOG2_DEFAULT_PAGE_SIZE_JUMBO)
82 
83 #endif
84 
89 #define HV_LOG2_PAGE_TABLE_ALIGN 11
90 
93 #define HV_PAGE_TABLE_ALIGN (__HV_SIZE_ONE << HV_LOG2_PAGE_TABLE_ALIGN)
94 
96 #define HV_GLUE_START_CPA 0x10000
97 
104 #define HV_GLUE_RESERVED_SIZE 0x10000
105 
107 #define HV_DISPATCH_ENTRY_SIZE 32
108 
110 #define _HV_VERSION 11
111 
112 /* Index into hypervisor interface dispatch code blocks.
113  *
114  * Hypervisor calls are invoked from user space by calling code
115  * at an address HV_BASE_ADDRESS + (index) * HV_DISPATCH_ENTRY_SIZE,
116  * where index is one of these enum values.
117  *
118  * Normally a supervisor is expected to produce a set of symbols
119  * starting at HV_BASE_ADDRESS that obey this convention, but a user
120  * program could call directly through function pointers if desired.
121  *
122  * These numbers are part of the binary API and will not be changed
123  * without updating HV_VERSION, which should be a rare event.
124  */
125 
127 #define _HV_DISPATCH_RESERVED 0
128 
130 #define HV_DISPATCH_INIT 1
131 
133 #define HV_DISPATCH_INSTALL_CONTEXT 2
134 
136 #define HV_DISPATCH_SYSCONF 3
137 
139 #define HV_DISPATCH_GET_RTC 4
140 
142 #define HV_DISPATCH_SET_RTC 5
143 
145 #define HV_DISPATCH_FLUSH_ASID 6
146 
148 #define HV_DISPATCH_FLUSH_PAGE 7
149 
151 #define HV_DISPATCH_FLUSH_PAGES 8
152 
154 #define HV_DISPATCH_RESTART 9
155 
157 #define HV_DISPATCH_HALT 10
158 
160 #define HV_DISPATCH_POWER_OFF 11
161 
163 #define HV_DISPATCH_INQUIRE_PHYSICAL 12
164 
166 #define HV_DISPATCH_INQUIRE_MEMORY_CONTROLLER 13
167 
169 #define HV_DISPATCH_INQUIRE_VIRTUAL 14
170 
172 #define HV_DISPATCH_INQUIRE_ASID 15
173 
175 #define HV_DISPATCH_NANOSLEEP 16
176 
178 #define HV_DISPATCH_CONSOLE_READ_IF_READY 17
179 
181 #define HV_DISPATCH_CONSOLE_WRITE 18
182 
184 #define HV_DISPATCH_DOWNCALL_DISPATCH 19
185 
187 #define HV_DISPATCH_INQUIRE_TOPOLOGY 20
188 
190 #define HV_DISPATCH_FS_FINDFILE 21
191 
193 #define HV_DISPATCH_FS_FSTAT 22
194 
196 #define HV_DISPATCH_FS_PREAD 23
197 
199 #define HV_DISPATCH_PHYSADDR_READ64 24
200 
202 #define HV_DISPATCH_PHYSADDR_WRITE64 25
203 
205 #define HV_DISPATCH_GET_COMMAND_LINE 26
206 
208 #define HV_DISPATCH_SET_CACHING 27
209 
211 #define HV_DISPATCH_BZERO_PAGE 28
212 
214 #define HV_DISPATCH_REGISTER_MESSAGE_STATE 29
215 
217 #define HV_DISPATCH_SEND_MESSAGE 30
218 
220 #define HV_DISPATCH_RECEIVE_MESSAGE 31
221 
223 #define HV_DISPATCH_INQUIRE_CONTEXT 32
224 
226 #define HV_DISPATCH_START_ALL_TILES 33
227 
229 #define HV_DISPATCH_DEV_OPEN 34
230 
232 #define HV_DISPATCH_DEV_CLOSE 35
233 
235 #define HV_DISPATCH_DEV_PREAD 36
236 
238 #define HV_DISPATCH_DEV_PWRITE 37
239 
241 #define HV_DISPATCH_DEV_POLL 38
242 
244 #define HV_DISPATCH_DEV_POLL_CANCEL 39
245 
247 #define HV_DISPATCH_DEV_PREADA 40
248 
250 #define HV_DISPATCH_DEV_PWRITEA 41
251 
253 #define HV_DISPATCH_FLUSH_REMOTE 42
254 
256 #define HV_DISPATCH_CONSOLE_PUTC 43
257 
259 #define HV_DISPATCH_INQUIRE_TILES 44
260 
262 #define HV_DISPATCH_CONFSTR 45
263 
265 #define HV_DISPATCH_REEXEC 46
266 
268 #define HV_DISPATCH_SET_COMMAND_LINE 47
269 
270 #if !CHIP_HAS_IPI()
271 
273 #define HV_DISPATCH_CLEAR_INTR 48
274 
276 #define HV_DISPATCH_ENABLE_INTR 49
277 
279 #define HV_DISPATCH_DISABLE_INTR 50
280 
282 #define HV_DISPATCH_RAISE_INTR 51
283 
285 #define HV_DISPATCH_TRIGGER_IPI 52
286 
287 #endif /* !CHIP_HAS_IPI() */
288 
290 #define HV_DISPATCH_STORE_MAPPING 53
291 
293 #define HV_DISPATCH_INQUIRE_REALPA 54
294 
296 #define HV_DISPATCH_FLUSH_ALL 55
297 
298 #if CHIP_HAS_IPI()
299 
300 #define HV_DISPATCH_GET_IPI_PTE 56
301 #endif
302 
304 #define HV_DISPATCH_SET_PTE_SUPER_SHIFT 57
305 
307 #define _HV_DISPATCH_END 58
308 
309 
310 #ifndef __ASSEMBLER__
311 
312 #ifdef __KERNEL__
313 #include <asm/types.h>
314 typedef u32 __hv32;
315 typedef u64 __hv64;
316 #else
317 #include <stdint.h>
318 typedef uint32_t __hv32;
319 typedef uint64_t __hv64;
320 #endif
321 
322 
325 
326 #if CHIP_VA_WIDTH() > 32
327 
328 typedef __hv64 HV_VirtAddr;
329 #else
330 
332 #endif /* CHIP_VA_WIDTH() > 32 */
333 
335 typedef unsigned int HV_ASID;
336 
340 typedef unsigned int HV_LOTAR;
341 
343 typedef unsigned long HV_PageSize;
344 
347 typedef struct
348 {
350 } HV_PTE;
351 
353 typedef int HV_Errno;
354 
355 #endif /* !__ASSEMBLER__ */
356 
357 #define HV_OK 0
358 #define HV_EINVAL -801
359 #define HV_ENODEV -802
360 #define HV_ENOENT -803
361 #define HV_EBADF -804
362 #define HV_EFAULT -805
363 #define HV_ERECIP -806
364 #define HV_E2BIG -807
365 #define HV_ENOTSUP -808
366 #define HV_EBUSY -809
367 #define HV_ENOSYS -810
368 #define HV_EPERM -811
369 #define HV_ENOTREADY -812
370 #define HV_EIO -813
371 #define HV_ENOMEM -814
372 #define HV_EAGAIN -815
374 #define HV_ERR_MAX -801
375 #define HV_ERR_MIN -815
377 #ifndef __ASSEMBLER__
378 
381 
389 void hv_init(HV_VersionNumber interface_version_number,
390  int chip_num, int chip_rev_num);
391 
392 
397 typedef enum {
400 
403 
406 
409 
412 
420 
428 
434 
439 
441 
444 #define HV_SYSCONF_TEMP_KTOC 273
445 
449 #define HV_SYSCONF_OVERTEMP 999
450 
457 
458 
463 typedef enum {
466 
469 
472 
475 
478 
481 
484 
487 
490 
494 
497 
500 
503 
506 
509 
512 
515 
518 
521 
524 
526 
539 
541 typedef struct
542 {
543 #ifndef __BIG_ENDIAN__
544 
545  int x;
546 
548  int y;
549 #else
550  int y;
551  int x;
552 #endif
553 } HV_Coord;
554 
555 
556 #if CHIP_HAS_IPI()
557 
565 int hv_get_ipi_pte(HV_Coord tile, int pl, HV_PTE* pte);
566 
567 #else /* !CHIP_HAS_IPI() */
568 
571 
575 #define HV_MAX_IPI_INTERRUPT 7
576 
581 void hv_enable_intr(HV_IntrMask enab_mask);
582 
587 void hv_disable_intr(HV_IntrMask disab_mask);
588 
593 void hv_clear_intr(HV_IntrMask clear_mask);
594 
599 void hv_raise_intr(HV_IntrMask raise_mask);
600 
609 
610 #endif /* !CHIP_HAS_IPI() */
611 
620 int hv_store_mapping(HV_VirtAddr va, unsigned int len, HV_PhysAddr pa);
621 
628 HV_PhysAddr hv_inquire_realpa(HV_PhysAddr cpa, unsigned int len);
629 
632 #define HV_RTC_NO_CHIP 0x1
633 
637 #define HV_RTC_LOW_VOLTAGE 0x2
638 
640 typedef struct {
641 #if CHIP_WORD_SIZE() > 32
642  __hv64 tm_sec;
643  __hv64 tm_min;
644  __hv64 tm_hour;
645  __hv64 tm_mday;
646  __hv64 tm_mon;
647  __hv64 tm_year;
648  __hv64 flags;
649 #else
657 #endif
658 } HV_RTCTime;
659 
663 HV_RTCTime hv_get_rtc(void);
664 
665 
670 
720  __hv32 flags);
721 
722 #endif /* !__ASSEMBLER__ */
723 
724 #define HV_CTX_DIRECTIO 0x1
727 #define HV_CTX_PG_SM_4K 0x10
728 #define HV_CTX_PG_SM_16K 0x20
729 #define HV_CTX_PG_SM_64K 0x40
730 #define HV_CTX_PG_SM_MASK 0xf0
732 #ifndef __ASSEMBLER__
733 
734 
754 int hv_set_pte_super_shift(int level, int log2_count);
755 
756 
758 typedef struct
759 {
762 
765 
768 
771 } HV_Context;
772 
777 
778 
791 
792 
810 
811 
831  unsigned long size);
832 
833 
840 int hv_flush_all(int preserve_global);
841 
842 
848 
849 
851 void hv_halt(void);
852 
853 
855 void hv_power_off(void);
856 
857 
865 
866 
868 typedef struct
869 {
872 
874  int width;
875 
877  int height;
878 
879 } HV_Topology;
880 
895 
900 typedef enum {
903 
906 
909 
912 } HV_InqTileSet;
913 
926 
927 
932 
934 typedef struct
935 {
940 
963 
965 typedef enum
966 {
967  NO_DIMM = 0,
968  DDR2 = 1,
969  DDR3 = 2
970 } HV_DIMM_Type;
971 
972 #ifdef __tilegx__
973 
975 #define HV_MSH_MIN_DIMM_SIZE_SHIFT 29
976 
978 #define HV_MSH_MAX_DIMMS 8
979 
980 #else
981 
983 #define HV_MSH_MIN_DIMM_SIZE_SHIFT 26
984 
986 #define HV_MSH_MAX_DIMMS 2
987 
988 #endif
989 
991 #define HV_DIMM_TYPE_SHIFT 0
992 
994 #define HV_DIMM_TYPE_MASK 0xf
995 
997 #define HV_DIMM_SIZE_SHIFT 4
998 
1000 #define HV_DIMM_SIZE_MASK 0xf
1001 
1003 typedef struct
1004 {
1005  HV_Coord coord;
1009 
1032  int controller);
1033 
1034 
1036 typedef struct
1037 {
1041 
1069 
1070 
1072 typedef struct
1073 {
1074 #ifndef __BIG_ENDIAN__
1076  unsigned int size;
1077 #else
1078  unsigned int size;
1079  HV_ASID start;
1080 #endif
1081 } HV_ASIDRange;
1082 
1099 
1100 
1110 void hv_nanosleep(int nanosecs);
1111 
1112 
1118 int hv_console_read_if_ready(void);
1119 
1120 
1127 void hv_console_putc(int byte);
1128 
1129 
1135 int hv_console_write(HV_VirtAddr bytes, int len);
1136 
1137 
1187 void hv_downcall_dispatch(void);
1188 
1189 #endif /* !__ASSEMBLER__ */
1190 
1195 #define INT_MESSAGE_RCV_DWNCL INT_BOOT_ACCESS
1196 
1197 #define INT_DMATLB_MISS_DWNCL INT_DMA_ASID
1198 
1199 #define INT_SNITLB_MISS_DWNCL INT_SNI_ASID
1200 
1201 #define INT_DMATLB_ACCESS_DWNCL INT_DMA_CPL
1202 
1203 #define INT_DEV_INTR_DWNCL INT_WORLD_ACCESS
1204 
1205 #ifndef __ASSEMBLER__
1206 
1218 
1219 
1224 typedef struct
1225 {
1226  int size;
1227  unsigned int flags;
1228 } HV_FS_StatInfo;
1229 
1231 typedef enum
1232 {
1233  HV_FS_ISDIR = 0x0001
1235 
1257 
1258 
1270 int hv_fs_pread(int inode, HV_VirtAddr buf, int length, int offset);
1271 
1272 
1280 unsigned long long hv_physaddr_read64(HV_PhysAddr addr, HV_PTE access);
1281 
1282 
1291  unsigned long long val);
1292 
1293 
1305 
1306 
1316 
1320 #define HV_COMMAND_LINE_LEN 256
1321 
1338 void hv_set_caching(unsigned long bitmask);
1339 
1340 
1350 void hv_bzero_page(HV_VirtAddr va, unsigned int size);
1351 
1352 
1354 typedef struct
1355 {
1356 #if CHIP_VA_WIDTH() > 32
1357  __hv64 opaque[2];
1358 #else
1359  __hv32 opaque[2];
1360 #endif
1361 }
1362 HV_MsgState;
1363 
1392 
1394 typedef enum
1395 {
1399 } HV_Recip_State;
1400 
1402 typedef struct
1403 {
1404 #ifndef __BIG_ENDIAN__
1405 
1406  unsigned int x:11;
1407 
1409  unsigned int y:11;
1410 
1413 #else //__BIG_ENDIAN__
1414  HV_Recip_State state:10;
1415  unsigned int y:11;
1416  unsigned int x:11;
1417 #endif
1418 } HV_Recipient;
1419 
1485 int hv_send_message(HV_Recipient *recips, int nrecip,
1486  HV_VirtAddr buf, int buflen);
1487 
1489 #define HV_MAX_MESSAGE_SIZE 28
1490 
1491 
1493 typedef struct
1494 {
1495  int msglen;
1497 } HV_RcvMsgInfo;
1498 
1499 #define HV_MSG_TILE 0x0
1500 #define HV_MSG_INTR 0x1
1542 HV_RcvMsgInfo hv_receive_message(HV_MsgState msgstate, HV_VirtAddr buf,
1543  int buflen);
1544 
1545 
1552 void hv_start_all_tiles(void);
1553 
1554 
1573 
1574 
1585 int hv_dev_close(int devhdl);
1586 
1587 
1613 int hv_dev_pread(int devhdl, __hv32 flags, HV_VirtAddr va, __hv32 len,
1614  __hv64 offset);
1615 
1616 #define HV_DEV_NB_EMPTY 0x1
1618 #define HV_DEV_NB_PARTIAL 0x2
1621 #define HV_DEV_NOCACHE 0x4
1627 #define HV_DEV_ALLFLAGS (HV_DEV_NB_EMPTY | HV_DEV_NB_PARTIAL | \
1628  HV_DEV_NOCACHE)
1656 int hv_dev_pwrite(int devhdl, __hv32 flags, HV_VirtAddr va, __hv32 len,
1657  __hv64 offset);
1658 
1659 
1661 #if CHIP_VA_WIDTH() > 32
1662 typedef __hv64 HV_IntArg;
1663 #else
1665 #endif
1666 
1672 typedef struct
1673 {
1674  HV_IntArg intarg;
1677 } HV_IntrMsg;
1678 
1716 int hv_dev_poll(int devhdl, __hv32 events, HV_IntArg intarg);
1717 
1718 #define HV_DEVPOLL_READ 0x1
1719 #define HV_DEVPOLL_WRITE 0x2
1720 #define HV_DEVPOLL_FLUSH 0x4
1734 int hv_dev_poll_cancel(int devhdl);
1735 
1736 
1738 typedef struct
1739 #if CHIP_VA_WIDTH() <= 32
1740 __attribute__ ((packed, aligned(4)))
1741 #endif
1742 {
1743  HV_PhysAddr pa;
1744  HV_PTE pte;
1748  __hv32 len;
1750 
1751 #define HV_SGL_MAXLEN 16
1795 int hv_dev_preada(int devhdl, __hv32 flags, __hv32 sgl_len,
1796  HV_SGL sgl[/* sgl_len */], __hv64 offset, HV_IntArg intarg);
1797 
1798 
1841 int hv_dev_pwritea(int devhdl, __hv32 flags, __hv32 sgl_len,
1842  HV_SGL sgl[/* sgl_len */], __hv64 offset, HV_IntArg intarg);
1843 
1844 
1846 typedef struct
1847 {
1849  unsigned int x:11;
1850 
1852  unsigned int y:11;
1853 
1856 } HV_Remote_ASID;
1857 
1887 int hv_flush_remote(HV_PhysAddr cache_pa, unsigned long cache_control,
1888  unsigned long* cache_cpumask,
1889  HV_VirtAddr tlb_va, unsigned long tlb_length,
1890  unsigned long tlb_pgsize, unsigned long* tlb_cpumask,
1891  HV_Remote_ASID* asids, int asidcount);
1892 
1894 #define HV_FLUSH_EVICT_L2 (1UL << 31)
1895 
1897 #define HV_FLUSH_EVICT_L1I (1UL << 30)
1898 
1900 #define HV_FLUSH_MAX_CACHE_LEN ((1UL << 30) - 1)
1901 
1903 #define HV_FLUSH_ALL -1UL
1904 
1905 #else /* __ASSEMBLER__ */
1906 
1908 #define HV_FLUSH_EVICT_L2 (1 << 31)
1909 
1911 #define HV_FLUSH_EVICT_L1I (1 << 30)
1912 
1914 #define HV_FLUSH_MAX_CACHE_LEN ((1 << 30) - 1)
1915 
1917 #define HV_FLUSH_ALL -1
1918 
1919 #endif /* __ASSEMBLER__ */
1920 
1921 #ifndef __ASSEMBLER__
1922 
1924 #define hv_pte_val(pte) ((pte).val)
1925 
1927 #define hv_pte(val) ((HV_PTE) { val })
1928 
1929 #endif /* !__ASSEMBLER__ */
1930 
1931 
1933 #define HV_LOG2_PTE_SIZE 3
1934 
1936 #define HV_PTE_SIZE (1 << HV_LOG2_PTE_SIZE)
1937 
1938 
1939 /* Bits in HV_PTE's low word. */
1940 #define HV_PTE_INDEX_PRESENT 0
1941 #define HV_PTE_INDEX_MIGRATING 1
1942 #define HV_PTE_INDEX_CLIENT0 2
1943 #define HV_PTE_INDEX_CLIENT1 3
1944 #define HV_PTE_INDEX_NC 4
1945 #define HV_PTE_INDEX_NO_ALLOC_L1 5
1946 #define HV_PTE_INDEX_NO_ALLOC_L2 6
1947 #define HV_PTE_INDEX_CACHED_PRIORITY 7
1948 #define HV_PTE_INDEX_PAGE 8
1949 #define HV_PTE_INDEX_GLOBAL 9
1950 #define HV_PTE_INDEX_USER 10
1951 #define HV_PTE_INDEX_ACCESSED 11
1952 #define HV_PTE_INDEX_DIRTY 12
1953  /* Bits 13-14 are reserved for
1954  future use. */
1955 #define HV_PTE_INDEX_SUPER 15
1956 #define HV_PTE_INDEX_MODE 16
1957 #define HV_PTE_MODE_BITS 3
1958 #define HV_PTE_INDEX_CLIENT2 19
1959 #define HV_PTE_INDEX_LOTAR 20
1961 #define HV_PTE_LOTAR_BITS 12
1963 /* Bits in HV_PTE's high word. */
1964 #define HV_PTE_INDEX_READABLE 32
1965 #define HV_PTE_INDEX_WRITABLE 33
1966 #define HV_PTE_INDEX_EXECUTABLE 34
1967 #define HV_PTE_INDEX_PTFN 35
1969 #define HV_PTE_PTFN_BITS 29
1971 /*
1972  * Legal values for the PTE's mode field
1973  */
1974 
1977 #define HV_PTE_MODE_UNCACHED 1
1978 
1985 #define HV_PTE_MODE_CACHE_NO_L3 2
1986 
1999 #define HV_PTE_MODE_CACHE_TILE_L3 3
2000 
2016 #define HV_PTE_MODE_CACHE_HASH_L3 4
2017 
2023 #define HV_PTE_MODE_MMIO 5
2024 
2025 
2026 /* C wants 1ULL so it is typed as __hv64, but the assembler needs just numbers.
2027  * The assembler can't handle shifts greater than 31, but treats them
2028  * as shifts mod 32, so assembler code must be aware of which word
2029  * the bit belongs in when using these macros.
2030  */
2031 #ifdef __ASSEMBLER__
2032 #define __HV_PTE_ONE 1
2033 #else
2034 #define __HV_PTE_ONE 1ULL
2035 #endif
2036 
2046 #define HV_PTE_PRESENT (__HV_PTE_ONE << HV_PTE_INDEX_PRESENT)
2047 
2061 #define HV_PTE_PAGE (__HV_PTE_ONE << HV_PTE_INDEX_PAGE)
2062 
2073 #define HV_PTE_SUPER (__HV_PTE_ONE << HV_PTE_INDEX_SUPER)
2074 
2093 #define HV_PTE_GLOBAL (__HV_PTE_ONE << HV_PTE_INDEX_GLOBAL)
2094 
2106 #define HV_PTE_USER (__HV_PTE_ONE << HV_PTE_INDEX_USER)
2107 
2118 #define HV_PTE_ACCESSED (__HV_PTE_ONE << HV_PTE_INDEX_ACCESSED)
2119 
2130 #define HV_PTE_DIRTY (__HV_PTE_ONE << HV_PTE_INDEX_DIRTY)
2131 
2138 #define HV_PTE_MIGRATING (__HV_PTE_ONE << HV_PTE_INDEX_MIGRATING)
2139 
2145 #define HV_PTE_CLIENT0 (__HV_PTE_ONE << HV_PTE_INDEX_CLIENT0)
2146 
2152 #define HV_PTE_CLIENT1 (__HV_PTE_ONE << HV_PTE_INDEX_CLIENT1)
2153 
2159 #define HV_PTE_CLIENT2 (__HV_PTE_ONE << HV_PTE_INDEX_CLIENT2)
2160 
2171 #define HV_PTE_NC (__HV_PTE_ONE << HV_PTE_INDEX_NC)
2172 
2184 #define HV_PTE_NO_ALLOC_L1 (__HV_PTE_ONE << HV_PTE_INDEX_NO_ALLOC_L1)
2185 
2197 #define HV_PTE_NO_ALLOC_L2 (__HV_PTE_ONE << HV_PTE_INDEX_NO_ALLOC_L2)
2198 
2216 #define HV_PTE_CACHED_PRIORITY (__HV_PTE_ONE << \
2217  HV_PTE_INDEX_CACHED_PRIORITY)
2218 
2229 #define HV_PTE_READABLE (__HV_PTE_ONE << HV_PTE_INDEX_READABLE)
2230 
2239 #define HV_PTE_WRITABLE (__HV_PTE_ONE << HV_PTE_INDEX_WRITABLE)
2240 
2251 #define HV_PTE_EXECUTABLE (__HV_PTE_ONE << HV_PTE_INDEX_EXECUTABLE)
2252 
2254 #define HV_LOTAR_WIDTH 11
2255 
2257 #define HV_XY_TO_LOTAR(x, y) ((HV_LOTAR)(((x) << HV_LOTAR_WIDTH) | (y)))
2258 
2260 #define HV_LOTAR_X(lotar) ((lotar) >> HV_LOTAR_WIDTH)
2261 
2263 #define HV_LOTAR_Y(lotar) ((lotar) & ((1 << HV_LOTAR_WIDTH) - 1))
2264 
2265 #ifndef __ASSEMBLER__
2266 
2268 #define _HV_BIT(name, bit) \
2269 static __inline int \
2270 hv_pte_get_##name(HV_PTE pte) \
2271 { \
2272  return (pte.val >> HV_PTE_INDEX_##bit) & 1; \
2273 } \
2274  \
2275 static __inline HV_PTE \
2276 hv_pte_set_##name(HV_PTE pte) \
2277 { \
2278  pte.val |= 1ULL << HV_PTE_INDEX_##bit; \
2279  return pte; \
2280 } \
2281  \
2282 static __inline HV_PTE \
2283 hv_pte_clear_##name(HV_PTE pte) \
2284 { \
2285  pte.val &= ~(1ULL << HV_PTE_INDEX_##bit); \
2286  return pte; \
2287 }
2288 
2289 /* Generate accessors to get, set, and clear various PTE flags.
2290  */
2291 _HV_BIT(present, PRESENT)
2292 _HV_BIT(page, PAGE)
2293 _HV_BIT(super, SUPER)
2294 _HV_BIT(client0, CLIENT0)
2295 _HV_BIT(client1, CLIENT1)
2296 _HV_BIT(client2, CLIENT2)
2297 _HV_BIT(migrating, MIGRATING)
2298 _HV_BIT(nc, NC)
2299 _HV_BIT(readable, READABLE)
2300 _HV_BIT(writable, WRITABLE)
2301 _HV_BIT(executable, EXECUTABLE)
2302 _HV_BIT(accessed, ACCESSED)
2304 _HV_BIT(no_alloc_l1, NO_ALLOC_L1)
2305 _HV_BIT(no_alloc_l2, NO_ALLOC_L2)
2306 _HV_BIT(cached_priority, CACHED_PRIORITY)
2307 _HV_BIT(global, GLOBAL)
2308 _HV_BIT(user, USER)
2309 
2310 #undef _HV_BIT
2311 
2319 static __inline unsigned int
2320 hv_pte_get_mode(const HV_PTE pte)
2321 {
2322  return (((__hv32) pte.val) >> HV_PTE_INDEX_MODE) &
2323  ((1 << HV_PTE_MODE_BITS) - 1);
2324 }
2325 
2327 static __inline HV_PTE
2328 hv_pte_set_mode(HV_PTE pte, unsigned int val)
2329 {
2330  pte.val &= ~(((1ULL << HV_PTE_MODE_BITS) - 1) << HV_PTE_INDEX_MODE);
2331  pte.val |= val << HV_PTE_INDEX_MODE;
2332  return pte;
2333 }
2334 
2345 static __inline unsigned long
2346 hv_pte_get_ptfn(const HV_PTE pte)
2347 {
2348  return pte.val >> HV_PTE_INDEX_PTFN;
2349 }
2350 
2352 static __inline HV_PTE
2353 hv_pte_set_ptfn(HV_PTE pte, unsigned long val)
2354 {
2355  pte.val &= ~(((1ULL << HV_PTE_PTFN_BITS)-1) << HV_PTE_INDEX_PTFN);
2356  pte.val |= (__hv64) val << HV_PTE_INDEX_PTFN;
2357  return pte;
2358 }
2359 
2361 static __inline HV_PhysAddr
2362 hv_pte_get_pa(const HV_PTE pte)
2363 {
2364  return (__hv64) hv_pte_get_ptfn(pte) << HV_LOG2_PAGE_TABLE_ALIGN;
2365 }
2366 
2368 static __inline HV_PTE
2369 hv_pte_set_pa(HV_PTE pte, HV_PhysAddr pa)
2370 {
2371  return hv_pte_set_ptfn(pte, pa >> HV_LOG2_PAGE_TABLE_ALIGN);
2372 }
2373 
2374 
2384 static __inline unsigned int
2385 hv_pte_get_lotar(const HV_PTE pte)
2386 {
2387  unsigned int lotar = ((__hv32) pte.val) >> HV_PTE_INDEX_LOTAR;
2388 
2389  return HV_XY_TO_LOTAR( (lotar >> (HV_PTE_LOTAR_BITS / 2)),
2390  (lotar & ((1 << (HV_PTE_LOTAR_BITS / 2)) - 1)) );
2391 }
2392 
2393 
2395 static __inline HV_PTE
2396 hv_pte_set_lotar(HV_PTE pte, unsigned int val)
2397 {
2398  unsigned int x = HV_LOTAR_X(val);
2399  unsigned int y = HV_LOTAR_Y(val);
2400 
2401  pte.val &= ~(((1ULL << HV_PTE_LOTAR_BITS)-1) << HV_PTE_INDEX_LOTAR);
2402  pte.val |= (x << (HV_PTE_INDEX_LOTAR + HV_PTE_LOTAR_BITS / 2)) |
2403  (y << HV_PTE_INDEX_LOTAR);
2404  return pte;
2405 }
2406 
2407 #endif /* !__ASSEMBLER__ */
2408 
2410 #define HV_CPA_TO_PTFN(p) ((p) >> HV_LOG2_PAGE_TABLE_ALIGN)
2411 
2413 #define HV_PTFN_TO_CPA(p) (((HV_PhysAddr)(p)) << HV_LOG2_PAGE_TABLE_ALIGN)
2414 
2415 #if CHIP_VA_WIDTH() > 32
2416 
2417 /*
2418  * Note that we currently do not allow customizing the page size
2419  * of the L0 pages, but fix them at 4GB, so we do not use the
2420  * "_HV_xxx" nomenclature for the L0 macros.
2421  */
2422 
2424 #define HV_LOG2_L0_ENTRIES (CHIP_VA_WIDTH() - HV_LOG2_L1_SPAN)
2425 
2427 #define HV_L0_ENTRIES (1 << HV_LOG2_L0_ENTRIES)
2428 
2430 #define HV_LOG2_L0_SIZE (HV_LOG2_PTE_SIZE + HV_LOG2_L0_ENTRIES)
2431 
2433 #define HV_L0_SIZE (1 << HV_LOG2_L0_SIZE)
2434 
2435 #ifdef __ASSEMBLER__
2436 
2438 #define HV_L0_INDEX(va) \
2439  (((va) >> HV_LOG2_L1_SPAN) & (HV_L0_ENTRIES - 1))
2440 
2441 #else
2442 
2444 #define HV_L0_INDEX(va) \
2445  (((HV_VirtAddr)(va) >> HV_LOG2_L1_SPAN) & (HV_L0_ENTRIES - 1))
2446 
2447 #endif
2448 
2449 #endif /* CHIP_VA_WIDTH() > 32 */
2450 
2452 #define _HV_LOG2_L1_ENTRIES(log2_page_size_large) \
2453  (HV_LOG2_L1_SPAN - log2_page_size_large)
2454 
2456 #define _HV_L1_ENTRIES(log2_page_size_large) \
2457  (1 << _HV_LOG2_L1_ENTRIES(log2_page_size_large))
2458 
2460 #define _HV_LOG2_L1_SIZE(log2_page_size_large) \
2461  (HV_LOG2_PTE_SIZE + _HV_LOG2_L1_ENTRIES(log2_page_size_large))
2462 
2464 #define _HV_L1_SIZE(log2_page_size_large) \
2465  (1 << _HV_LOG2_L1_SIZE(log2_page_size_large))
2466 
2468 #define _HV_LOG2_L2_ENTRIES(log2_page_size_large, log2_page_size_small) \
2469  (log2_page_size_large - log2_page_size_small)
2470 
2472 #define _HV_L2_ENTRIES(log2_page_size_large, log2_page_size_small) \
2473  (1 << _HV_LOG2_L2_ENTRIES(log2_page_size_large, log2_page_size_small))
2474 
2476 #define _HV_LOG2_L2_SIZE(log2_page_size_large, log2_page_size_small) \
2477  (HV_LOG2_PTE_SIZE + \
2478  _HV_LOG2_L2_ENTRIES(log2_page_size_large, log2_page_size_small))
2479 
2481 #define _HV_L2_SIZE(log2_page_size_large, log2_page_size_small) \
2482  (1 << _HV_LOG2_L2_SIZE(log2_page_size_large, log2_page_size_small))
2483 
2484 #ifdef __ASSEMBLER__
2485 
2486 #if CHIP_VA_WIDTH() > 32
2487 
2489 #define _HV_L1_INDEX(va, log2_page_size_large) \
2490  (((va) >> log2_page_size_large) & (_HV_L1_ENTRIES(log2_page_size_large) - 1))
2491 
2492 #else /* CHIP_VA_WIDTH() > 32 */
2493 
2495 #define _HV_L1_INDEX(va, log2_page_size_large) \
2496  (((va) >> log2_page_size_large))
2497 
2498 #endif /* CHIP_VA_WIDTH() > 32 */
2499 
2501 #define _HV_L2_INDEX(va, log2_page_size_large, log2_page_size_small) \
2502  (((va) >> log2_page_size_small) & \
2503  (_HV_L2_ENTRIES(log2_page_size_large, log2_page_size_small) - 1))
2504 
2505 #else /* __ASSEMBLER __ */
2506 
2507 #if CHIP_VA_WIDTH() > 32
2508 
2510 #define _HV_L1_INDEX(va, log2_page_size_large) \
2511  (((HV_VirtAddr)(va) >> log2_page_size_large) & \
2512  (_HV_L1_ENTRIES(log2_page_size_large) - 1))
2513 
2514 #else /* CHIP_VA_WIDTH() > 32 */
2515 
2517 #define _HV_L1_INDEX(va, log2_page_size_large) \
2518  (((HV_VirtAddr)(va) >> log2_page_size_large))
2519 
2520 #endif /* CHIP_VA_WIDTH() > 32 */
2521 
2523 #define _HV_L2_INDEX(va, log2_page_size_large, log2_page_size_small) \
2524  (((HV_VirtAddr)(va) >> log2_page_size_small) & \
2525  (_HV_L2_ENTRIES(log2_page_size_large, log2_page_size_small) - 1))
2526 
2527 #endif /* __ASSEMBLER __ */
2528 
2530 #define _HV_PTE_INDEX_PFN(log2_page_size) \
2531  (HV_PTE_INDEX_PTFN + (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))
2532 
2534 #define _HV_PTE_INDEX_PFN_BITS(log2_page_size) \
2535  (HV_PTE_INDEX_PTFN_BITS - (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))
2536 
2538 #define _HV_CPA_TO_PFN(p, log2_page_size) ((p) >> log2_page_size)
2539 
2541 #define _HV_PFN_TO_CPA(p, log2_page_size) \
2542  (((HV_PhysAddr)(p)) << log2_page_size)
2543 
2545 #define _HV_PTFN_TO_PFN(p, log2_page_size) \
2546  ((p) >> (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))
2547 
2549 #define _HV_PFN_TO_PTFN(p, log2_page_size) \
2550  ((p) << (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))
2551 
2552 #endif /* _HV_HV_H */