#include <arch/chip.h>
#include <stdint.h>

Data Structures
struct	HV_PTE

struct	HV_Coord

struct	HV_RTCTime

struct	HV_Context

struct	HV_Topology

struct	HV_PhysAddrRange

struct	HV_MemoryControllerInfo

struct	HV_VirtAddrRange

struct	HV_ASIDRange

struct	HV_FS_StatInfo

struct	HV_MsgState

struct	HV_Recipient

struct	HV_RcvMsgInfo

struct	HV_IntrMsg

struct	HV_Remote_ASID

Macros
#define	__HV_SIZE_ONE 1UL

#define	HV_LOG2_L1_SPAN 32

#define	HV_L1_SPAN (__HV_SIZE_ONE << HV_LOG2_L1_SPAN)

#define	HV_LOG2_DEFAULT_PAGE_SIZE_SMALL 16

#define	HV_DEFAULT_PAGE_SIZE_SMALL (__HV_SIZE_ONE << HV_LOG2_DEFAULT_PAGE_SIZE_SMALL)

#define	HV_LOG2_DEFAULT_PAGE_SIZE_LARGE 24

#define	HV_DEFAULT_PAGE_SIZE_LARGE (__HV_SIZE_ONE << HV_LOG2_DEFAULT_PAGE_SIZE_LARGE)

#define	HV_LOG2_PAGE_TABLE_ALIGN 11

#define	HV_PAGE_TABLE_ALIGN (__HV_SIZE_ONE << HV_LOG2_PAGE_TABLE_ALIGN)

#define	HV_GLUE_START_CPA 0x10000

#define	HV_GLUE_RESERVED_SIZE 0x10000

#define	HV_DISPATCH_ENTRY_SIZE 32

#define	_HV_VERSION 11

#define	_HV_DISPATCH_RESERVED 0

#define	HV_DISPATCH_INIT 1

#define	HV_DISPATCH_INSTALL_CONTEXT 2

#define	HV_DISPATCH_SYSCONF 3

#define	HV_DISPATCH_GET_RTC 4

#define	HV_DISPATCH_SET_RTC 5

#define	HV_DISPATCH_FLUSH_ASID 6

#define	HV_DISPATCH_FLUSH_PAGE 7

#define	HV_DISPATCH_FLUSH_PAGES 8

#define	HV_DISPATCH_RESTART 9

#define	HV_DISPATCH_HALT 10

#define	HV_DISPATCH_POWER_OFF 11

#define	HV_DISPATCH_INQUIRE_PHYSICAL 12

#define	HV_DISPATCH_INQUIRE_MEMORY_CONTROLLER 13

#define	HV_DISPATCH_INQUIRE_VIRTUAL 14

#define	HV_DISPATCH_INQUIRE_ASID 15

#define	HV_DISPATCH_NANOSLEEP 16

#define	HV_DISPATCH_CONSOLE_READ_IF_READY 17

#define	HV_DISPATCH_CONSOLE_WRITE 18

#define	HV_DISPATCH_DOWNCALL_DISPATCH 19

#define	HV_DISPATCH_INQUIRE_TOPOLOGY 20

#define	HV_DISPATCH_FS_FINDFILE 21

#define	HV_DISPATCH_FS_FSTAT 22

#define	HV_DISPATCH_FS_PREAD 23

#define	HV_DISPATCH_PHYSADDR_READ64 24

#define	HV_DISPATCH_PHYSADDR_WRITE64 25

#define	HV_DISPATCH_GET_COMMAND_LINE 26

#define	HV_DISPATCH_SET_CACHING 27

#define	HV_DISPATCH_BZERO_PAGE 28

#define	HV_DISPATCH_REGISTER_MESSAGE_STATE 29

#define	HV_DISPATCH_SEND_MESSAGE 30

#define	HV_DISPATCH_RECEIVE_MESSAGE 31

#define	HV_DISPATCH_INQUIRE_CONTEXT 32

#define	HV_DISPATCH_START_ALL_TILES 33

#define	HV_DISPATCH_DEV_OPEN 34

#define	HV_DISPATCH_DEV_CLOSE 35

#define	HV_DISPATCH_DEV_PREAD 36

#define	HV_DISPATCH_DEV_PWRITE 37

#define	HV_DISPATCH_DEV_POLL 38

#define	HV_DISPATCH_DEV_POLL_CANCEL 39

#define	HV_DISPATCH_DEV_PREADA 40

#define	HV_DISPATCH_DEV_PWRITEA 41

#define	HV_DISPATCH_FLUSH_REMOTE 42

#define	HV_DISPATCH_CONSOLE_PUTC 43

#define	HV_DISPATCH_INQUIRE_TILES 44

#define	HV_DISPATCH_CONFSTR 45

#define	HV_DISPATCH_REEXEC 46

#define	HV_DISPATCH_SET_COMMAND_LINE 47

#define	HV_DISPATCH_CLEAR_INTR 48

#define	HV_DISPATCH_ENABLE_INTR 49

#define	HV_DISPATCH_DISABLE_INTR 50

#define	HV_DISPATCH_RAISE_INTR 51

#define	HV_DISPATCH_TRIGGER_IPI 52

#define	HV_DISPATCH_STORE_MAPPING 53

#define	HV_DISPATCH_INQUIRE_REALPA 54

#define	HV_DISPATCH_FLUSH_ALL 55

#define	HV_DISPATCH_SET_PTE_SUPER_SHIFT 57

#define	_HV_DISPATCH_END 58

#define	HV_OK 0

#define	HV_EINVAL -801

#define	HV_ENODEV -802

#define	HV_ENOENT -803

#define	HV_EBADF -804

#define	HV_EFAULT -805

#define	HV_ERECIP -806

#define	HV_E2BIG -807

#define	HV_ENOTSUP -808

#define	HV_EBUSY -809

#define	HV_ENOSYS -810

#define	HV_EPERM -811

#define	HV_ENOTREADY -812

#define	HV_EIO -813

#define	HV_ENOMEM -814

#define	HV_EAGAIN -815

#define	HV_ERR_MAX -801

#define	HV_ERR_MIN -815

#define	HV_SYSCONF_TEMP_KTOC 273

#define	HV_SYSCONF_OVERTEMP 999

#define	HV_MAX_IPI_INTERRUPT 7

#define	HV_RTC_NO_CHIP 0x1

#define	HV_RTC_LOW_VOLTAGE 0x2

#define	HV_CTX_DIRECTIO 0x1

#define	HV_CTX_PG_SM_4K 0x10

#define	HV_CTX_PG_SM_16K 0x20

#define	HV_CTX_PG_SM_64K 0x40

#define	HV_CTX_PG_SM_MASK 0xf0

#define	HV_MSH_MIN_DIMM_SIZE_SHIFT 26

#define	HV_MSH_MAX_DIMMS 2

#define	HV_DIMM_TYPE_SHIFT 0

#define	HV_DIMM_TYPE_MASK 0xf

#define	HV_DIMM_SIZE_SHIFT 4

#define	HV_DIMM_SIZE_MASK 0xf

#define	INT_MESSAGE_RCV_DWNCL INT_BOOT_ACCESS

#define	INT_DMATLB_MISS_DWNCL INT_DMA_ASID

#define	INT_SNITLB_MISS_DWNCL INT_SNI_ASID

#define	INT_DMATLB_ACCESS_DWNCL INT_DMA_CPL

#define	INT_DEV_INTR_DWNCL INT_WORLD_ACCESS

#define	HV_COMMAND_LINE_LEN 256

#define	HV_MAX_MESSAGE_SIZE 28

#define	HV_MSG_TILE 0x0

#define	HV_MSG_INTR 0x1

#define	HV_DEV_NB_EMPTY 0x1

#define	HV_DEV_NB_PARTIAL 0x2

#define	HV_DEV_NOCACHE 0x4

#define	HV_DEV_ALLFLAGS

#define	HV_DEVPOLL_READ 0x1

#define	HV_DEVPOLL_WRITE 0x2

#define	HV_DEVPOLL_FLUSH 0x4

#define	HV_SGL_MAXLEN 16

#define	HV_FLUSH_EVICT_L2 (1UL << 31)

#define	HV_FLUSH_EVICT_L1I (1UL << 30)

#define	HV_FLUSH_MAX_CACHE_LEN ((1UL << 30) - 1)

#define	HV_FLUSH_ALL -1UL

#define	hv_pte_val(pte) ((pte).val)

#define	hv_pte(val) ((HV_PTE) { val })

#define	HV_LOG2_PTE_SIZE 3

#define	HV_PTE_SIZE (1 << HV_LOG2_PTE_SIZE)

#define	HV_PTE_INDEX_PRESENT 0

#define	HV_PTE_INDEX_MIGRATING 1

#define	HV_PTE_INDEX_CLIENT0 2

#define	HV_PTE_INDEX_CLIENT1 3

#define	HV_PTE_INDEX_NC 4

#define	HV_PTE_INDEX_NO_ALLOC_L1 5

#define	HV_PTE_INDEX_NO_ALLOC_L2 6

#define	HV_PTE_INDEX_CACHED_PRIORITY 7

#define	HV_PTE_INDEX_PAGE 8

#define	HV_PTE_INDEX_GLOBAL 9

#define	HV_PTE_INDEX_USER 10

#define	HV_PTE_INDEX_ACCESSED 11

#define	HV_PTE_INDEX_DIRTY 12

#define	HV_PTE_INDEX_SUPER 15

#define	HV_PTE_INDEX_MODE 16

#define	HV_PTE_MODE_BITS 3

#define	HV_PTE_INDEX_CLIENT2 19

#define	HV_PTE_INDEX_LOTAR 20

#define	HV_PTE_LOTAR_BITS 12

#define	HV_PTE_INDEX_READABLE 32

#define	HV_PTE_INDEX_WRITABLE 33

#define	HV_PTE_INDEX_EXECUTABLE 34

#define	HV_PTE_INDEX_PTFN 35

#define	HV_PTE_PTFN_BITS 29

#define	HV_PTE_MODE_UNCACHED 1

#define	HV_PTE_MODE_CACHE_NO_L3 2

#define	HV_PTE_MODE_CACHE_TILE_L3 3

#define	HV_PTE_MODE_CACHE_HASH_L3 4

#define	HV_PTE_MODE_MMIO 5

#define	__HV_PTE_ONE 1ULL

#define	HV_PTE_PRESENT (__HV_PTE_ONE << HV_PTE_INDEX_PRESENT)

#define	HV_PTE_PAGE (__HV_PTE_ONE << HV_PTE_INDEX_PAGE)

#define	HV_PTE_SUPER (__HV_PTE_ONE << HV_PTE_INDEX_SUPER)

#define	HV_PTE_GLOBAL (__HV_PTE_ONE << HV_PTE_INDEX_GLOBAL)

#define	HV_PTE_USER (__HV_PTE_ONE << HV_PTE_INDEX_USER)

#define	HV_PTE_ACCESSED (__HV_PTE_ONE << HV_PTE_INDEX_ACCESSED)

#define	HV_PTE_DIRTY (__HV_PTE_ONE << HV_PTE_INDEX_DIRTY)

#define	HV_PTE_MIGRATING (__HV_PTE_ONE << HV_PTE_INDEX_MIGRATING)

#define	HV_PTE_CLIENT0 (__HV_PTE_ONE << HV_PTE_INDEX_CLIENT0)

#define	HV_PTE_CLIENT1 (__HV_PTE_ONE << HV_PTE_INDEX_CLIENT1)

#define	HV_PTE_CLIENT2 (__HV_PTE_ONE << HV_PTE_INDEX_CLIENT2)

#define	HV_PTE_NC (__HV_PTE_ONE << HV_PTE_INDEX_NC)

#define	HV_PTE_NO_ALLOC_L1 (__HV_PTE_ONE << HV_PTE_INDEX_NO_ALLOC_L1)

#define	HV_PTE_NO_ALLOC_L2 (__HV_PTE_ONE << HV_PTE_INDEX_NO_ALLOC_L2)

#define	HV_PTE_CACHED_PRIORITY

#define	HV_PTE_READABLE (__HV_PTE_ONE << HV_PTE_INDEX_READABLE)

#define	HV_PTE_WRITABLE (__HV_PTE_ONE << HV_PTE_INDEX_WRITABLE)

#define	HV_PTE_EXECUTABLE (__HV_PTE_ONE << HV_PTE_INDEX_EXECUTABLE)

#define	HV_LOTAR_WIDTH 11

#define	HV_XY_TO_LOTAR(x, y) ((HV_LOTAR)(((x) << HV_LOTAR_WIDTH) \| (y)))

#define	HV_LOTAR_X(lotar) ((lotar) >> HV_LOTAR_WIDTH)

#define	HV_LOTAR_Y(lotar) ((lotar) & ((1 << HV_LOTAR_WIDTH) - 1))

#define	_HV_BIT(name, bit)

#define	HV_CPA_TO_PTFN(p) ((p) >> HV_LOG2_PAGE_TABLE_ALIGN)

#define	HV_PTFN_TO_CPA(p) (((HV_PhysAddr)(p)) << HV_LOG2_PAGE_TABLE_ALIGN)

#define	_HV_LOG2_L1_ENTRIES(log2_page_size_large) (HV_LOG2_L1_SPAN - log2_page_size_large)

#define	_HV_L1_ENTRIES(log2_page_size_large) (1 << _HV_LOG2_L1_ENTRIES(log2_page_size_large))

#define	_HV_LOG2_L1_SIZE(log2_page_size_large) (HV_LOG2_PTE_SIZE + _HV_LOG2_L1_ENTRIES(log2_page_size_large))

#define	_HV_L1_SIZE(log2_page_size_large) (1 << _HV_LOG2_L1_SIZE(log2_page_size_large))

#define	_HV_LOG2_L2_ENTRIES(log2_page_size_large, log2_page_size_small) (log2_page_size_large - log2_page_size_small)

#define	_HV_L2_ENTRIES(log2_page_size_large, log2_page_size_small) (1 << _HV_LOG2_L2_ENTRIES(log2_page_size_large, log2_page_size_small))

#define	_HV_LOG2_L2_SIZE(log2_page_size_large, log2_page_size_small)

#define	_HV_L2_SIZE(log2_page_size_large, log2_page_size_small) (1 << _HV_LOG2_L2_SIZE(log2_page_size_large, log2_page_size_small))

#define	_HV_L1_INDEX(va, log2_page_size_large) (((HV_VirtAddr)(va) >> log2_page_size_large))

#define	_HV_L2_INDEX(va, log2_page_size_large, log2_page_size_small)

#define	_HV_PTE_INDEX_PFN(log2_page_size) (HV_PTE_INDEX_PTFN + (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))

#define	_HV_PTE_INDEX_PFN_BITS(log2_page_size) (HV_PTE_INDEX_PTFN_BITS - (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))

#define	_HV_CPA_TO_PFN(p, log2_page_size) ((p) >> log2_page_size)

#define	_HV_PFN_TO_CPA(p, log2_page_size) (((HV_PhysAddr)(p)) << log2_page_size)

#define	_HV_PTFN_TO_PFN(p, log2_page_size) ((p) >> (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))

#define	_HV_PFN_TO_PTFN(p, log2_page_size) ((p) << (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))

Typedefs
typedef uint32_t	__hv32

typedef uint64_t	__hv64

typedef __hv64	HV_PhysAddr

typedef __hv32	HV_VirtAddr

typedef unsigned int	HV_ASID

typedef unsigned int	HV_LOTAR

typedef unsigned long	HV_PageSize

typedef int	HV_Errno

typedef __hv32	HV_IntrMask

typedef int	HV_MemoryController

typedef __hv32	HV_IntArg

Enumerations
enum	HV_VersionNumber { HV_VERSION = _HV_VERSION }

enum	HV_SysconfQuery { _HV_SYSCONF_RESERVED = 0, HV_SYSCONF_GLUE_SIZE = 1, HV_SYSCONF_PAGE_SIZE_SMALL = 2, HV_SYSCONF_PAGE_SIZE_LARGE = 3, HV_SYSCONF_CPU_SPEED = 4, HV_SYSCONF_CPU_TEMP = 5, HV_SYSCONF_BOARD_TEMP = 6, HV_SYSCONF_VALID_PAGE_SIZES = 7, HV_SYSCONF_PAGE_SIZE_JUMBO = 8 }

enum	HV_ConfstrQuery { _HV_CONFSTR_RESERVED = 0, HV_CONFSTR_BOARD_PART_NUM = 1, HV_CONFSTR_BOARD_SERIAL_NUM = 2, HV_CONFSTR_CHIP_SERIAL_NUM = 3, HV_CONFSTR_BOARD_REV = 4, HV_CONFSTR_HV_SW_VER = 5, HV_CONFSTR_CHIP_MODEL = 6, HV_CONFSTR_BOARD_DESC = 7, HV_CONFSTR_HV_CONFIG = 8, HV_CONFSTR_HV_CONFIG_VER = 9, HV_CONFSTR_MEZZ_PART_NUM = 10, HV_CONFSTR_MEZZ_SERIAL_NUM = 11, HV_CONFSTR_MEZZ_REV = 12, HV_CONFSTR_MEZZ_DESC = 13, HV_CONFSTR_SWITCH_CONTROL = 14, HV_CONFSTR_CHIP_REV = 15, HV_CONFSTR_CPUMOD_PART_NUM = 16, HV_CONFSTR_CPUMOD_SERIAL_NUM = 17, HV_CONFSTR_CPUMOD_REV = 18, HV_CONFSTR_CPUMOD_DESC = 19 }

enum	HV_InqTileSet { _HV_INQ_TILES_RESERVED = 0, HV_INQ_TILES_AVAIL = 1, HV_INQ_TILES_HFH_CACHE = 2, HV_INQ_TILES_LOTAR = 3 }

enum	HV_DIMM_Type { NO_DIMM = 0, DDR2 = 1, DDR3 = 2 }

enum	HV_FS_FSTAT_FLAGS { HV_FS_ISDIR = 0x0001 }

enum	HV_Recip_State { HV_TO_BE_SENT, HV_SENT, HV_BAD_RECIP }

Functions
void	hv_init (HV_VersionNumber interface_version_number, int chip_num, int chip_rev_num)

long	hv_sysconf (HV_SysconfQuery query)

int	hv_confstr (HV_ConfstrQuery query, HV_VirtAddr buf, int len)

void	hv_enable_intr (HV_IntrMask enab_mask)

void	hv_disable_intr (HV_IntrMask disab_mask)

void	hv_clear_intr (HV_IntrMask clear_mask)

void	hv_raise_intr (HV_IntrMask raise_mask)

HV_Errno	hv_trigger_ipi (HV_Coord tile, int interrupt)

int	hv_store_mapping (HV_VirtAddr va, unsigned int len, HV_PhysAddr pa)

HV_PhysAddr	hv_inquire_realpa (HV_PhysAddr cpa, unsigned int len)

HV_RTCTime	hv_get_rtc (void)

void	hv_set_rtc (HV_RTCTime time)

int	hv_install_context (HV_PhysAddr page_table, HV_PTE access, HV_ASID asid, __hv32 flags)

int	hv_set_pte_super_shift (int level, int log2_count)

HV_Context	hv_inquire_context (void)

int	hv_flush_asid (HV_ASID asid)

int	hv_flush_page (HV_VirtAddr address, HV_PageSize page_size)

int	hv_flush_pages (HV_VirtAddr start, HV_PageSize page_size, unsigned long size)

int	hv_flush_all (int preserve_global)

void	hv_restart (HV_VirtAddr cmd, HV_VirtAddr args)

void	hv_halt (void)

void	hv_power_off (void)

int	hv_reexec (HV_PhysAddr entry)

HV_Topology	hv_inquire_topology (void)

HV_Errno	hv_inquire_tiles (HV_InqTileSet set, HV_VirtAddr cpumask, int length)

HV_PhysAddrRange	hv_inquire_physical (int idx)

HV_MemoryControllerInfo	hv_inquire_memory_controller (HV_Coord coord, int controller)

HV_VirtAddrRange	hv_inquire_virtual (int idx)

HV_ASIDRange	hv_inquire_asid (int idx)

void	hv_nanosleep (int nanosecs)

int	hv_console_read_if_ready (void)

void	hv_console_putc (int byte)

int	hv_console_write (HV_VirtAddr bytes, int len)

void	hv_downcall_dispatch (void)

int	hv_fs_findfile (HV_VirtAddr filename)

HV_FS_StatInfo	hv_fs_fstat (int inode)

int	hv_fs_pread (int inode, HV_VirtAddr buf, int length, int offset)

unsigned long long	hv_physaddr_read64 (HV_PhysAddr addr, HV_PTE access)

void	hv_physaddr_write64 (HV_PhysAddr addr, HV_PTE access, unsigned long long val)

int	hv_get_command_line (HV_VirtAddr buf, int length)

HV_Errno	hv_set_command_line (HV_VirtAddr buf, int length)

void	hv_set_caching (unsigned long bitmask)

void	hv_bzero_page (HV_VirtAddr va, unsigned int size)

HV_Errno	hv_register_message_state (HV_MsgState *msgstate)

int	hv_send_message (HV_Recipient *recips, int nrecip, HV_VirtAddr buf, int buflen)

HV_RcvMsgInfo	hv_receive_message (HV_MsgState msgstate, HV_VirtAddr buf, int buflen)

void	hv_start_all_tiles (void)

int	hv_dev_open (HV_VirtAddr name, __hv32 flags)

int	hv_dev_close (int devhdl)

int	hv_dev_pread (int devhdl, __hv32 flags, HV_VirtAddr va, __hv32 len, __hv64 offset)

int	hv_dev_pwrite (int devhdl, __hv32 flags, HV_VirtAddr va, __hv32 len, __hv64 offset)

int	hv_dev_poll (int devhdl, __hv32 events, HV_IntArg intarg)

int	hv_dev_poll_cancel (int devhdl)

struct	__attribute__ ((packed, aligned(4)))

int	hv_dev_preada (int devhdl, __hv32 flags, __hv32 sgl_len, HV_SGL sgl[], __hv64 offset, HV_IntArg intarg)

int	hv_dev_pwritea (int devhdl, __hv32 flags, __hv32 sgl_len, HV_SGL sgl[], __hv64 offset, HV_IntArg intarg)

int	hv_flush_remote (HV_PhysAddr cache_pa, unsigned long cache_control, unsigned long cache_cpumask, HV_VirtAddr tlb_va, unsigned long tlb_length, unsigned long tlb_pgsize, unsigned long tlb_cpumask, HV_Remote_ASID *asids, int asidcount)

Variables
	HV_SGL

Macro Definition Documentation

#define __HV_PTE_ONE 1ULL

One, for C

Definition at line 2034 of file hypervisor.h.

#define __HV_SIZE_ONE 1UL

One, for Linux

Definition at line 34 of file hypervisor.h.

#define _HV_BIT	(	name,
		bit
	)

Value:

static __inline int                                             \
hv_pte_get_##name(HV_PTE pte)                                   \
{                                                               \
  return (pte.val >> HV_PTE_INDEX_##bit) & 1;                   \
}                                                               \
                                                                \
static __inline HV_PTE                                          \
hv_pte_set_##name(HV_PTE pte)                                   \
{                                                               \
  pte.val |= 1ULL << HV_PTE_INDEX_##bit;                        \
  return pte;                                                   \
}                                                               \
                                                                \
static __inline HV_PTE                                          \
hv_pte_clear_##name(HV_PTE pte)                                 \
{                                                               \
  pte.val &= ~(1ULL << HV_PTE_INDEX_##bit);                     \
  return pte;                                                   \
}

Define accessor functions for a PTE bit.

Definition at line 2268 of file hypervisor.h.

#define _HV_CPA_TO_PFN	(	p,
		log2_page_size
	)	((p) >> log2_page_size)

Converts a client physical address to a pfn.

Definition at line 2538 of file hypervisor.h.

#define _HV_DISPATCH_END 58

One more than the largest dispatch value

Definition at line 307 of file hypervisor.h.

#define _HV_DISPATCH_RESERVED 0

reserved.

Definition at line 127 of file hypervisor.h.

#define _HV_L1_ENTRIES ( log2_page_size_large ) (1 << _HV_LOG2_L1_ENTRIES(log2_page_size_large))

Number of HV_PTE entries in L1 page table

Definition at line 2456 of file hypervisor.h.

#define _HV_L1_INDEX	(	va,
		log2_page_size_large
	)	(((HV_VirtAddr)(va) >> log2_page_size_large))

Index in L1 for a specific VA

Definition at line 2517 of file hypervisor.h.

#define _HV_L1_SIZE ( log2_page_size_large ) (1 << _HV_LOG2_L1_SIZE(log2_page_size_large))

Size of L1 page table in bytes

Definition at line 2464 of file hypervisor.h.

#define _HV_L2_ENTRIES	(	log2_page_size_large,
		log2_page_size_small
	)	(1 << _HV_LOG2_L2_ENTRIES(log2_page_size_large, log2_page_size_small))

Number of HV_PTE entries in level-2 page table

Definition at line 2472 of file hypervisor.h.

#define _HV_L2_INDEX	(	va,
		log2_page_size_large,
		log2_page_size_small
	)

Value:

(((HV_VirtAddr)(va) >> log2_page_size_small) & \

(_HV_L2_ENTRIES(log2_page_size_large, log2_page_size_small) - 1))

Index in level-2 page table for a specific VA

Definition at line 2523 of file hypervisor.h.

#define _HV_L2_SIZE	(	log2_page_size_large,
		log2_page_size_small
	)	(1 << _HV_LOG2_L2_SIZE(log2_page_size_large, log2_page_size_small))

Size of level-2 page table in bytes

Definition at line 2481 of file hypervisor.h.

#define _HV_LOG2_L1_ENTRIES ( log2_page_size_large ) (HV_LOG2_L1_SPAN - log2_page_size_large)

Log number of HV_PTE entries in L1 page table

Definition at line 2452 of file hypervisor.h.

#define _HV_LOG2_L1_SIZE ( log2_page_size_large ) (HV_LOG2_PTE_SIZE + _HV_LOG2_L1_ENTRIES(log2_page_size_large))

Log size of L1 page table in bytes

Definition at line 2460 of file hypervisor.h.

#define _HV_LOG2_L2_ENTRIES	(	log2_page_size_large,
		log2_page_size_small
	)	(log2_page_size_large - log2_page_size_small)

Log number of HV_PTE entries in level-2 page table

Definition at line 2468 of file hypervisor.h.

#define _HV_LOG2_L2_SIZE	(	log2_page_size_large,
		log2_page_size_small
	)

Value:

(HV_LOG2_PTE_SIZE + \

_HV_LOG2_L2_ENTRIES(log2_page_size_large, log2_page_size_small))

Log size of level-2 page table in bytes

Definition at line 2476 of file hypervisor.h.

#define _HV_PFN_TO_CPA	(	p,
		log2_page_size
	)	(((HV_PhysAddr)(p)) << log2_page_size)

Converts a pfn to a client physical address.

Definition at line 2541 of file hypervisor.h.

#define _HV_PFN_TO_PTFN	(	p,
		log2_page_size
	)	((p) << (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))

Converts a pfn to a ptfn.

Definition at line 2549 of file hypervisor.h.

#define _HV_PTE_INDEX_PFN ( log2_page_size ) (HV_PTE_INDEX_PTFN + (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))

Position of the PFN field within the PTE (subset of the PTFN).

Definition at line 2530 of file hypervisor.h.

#define _HV_PTE_INDEX_PFN_BITS ( log2_page_size ) (HV_PTE_INDEX_PTFN_BITS - (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))

Length of the PFN field within the PTE (subset of the PTFN).

Definition at line 2534 of file hypervisor.h.

#define _HV_PTFN_TO_PFN	(	p,
		log2_page_size
	)	((p) >> (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))

Converts a ptfn to a pfn.

Definition at line 2545 of file hypervisor.h.

#define _HV_VERSION 11

Version of the hypervisor interface defined by this file

Definition at line 110 of file hypervisor.h.

#define HV_COMMAND_LINE_LEN 256

Maximum size of a command line passed to hv_set_command_line(); note that a line returned from hv_get_command_line() could be larger than this.

Definition at line 1320 of file hypervisor.h.

#define HV_CPA_TO_PTFN ( p ) ((p) >> HV_LOG2_PAGE_TABLE_ALIGN)

Converts a client physical address to a ptfn.

Definition at line 2410 of file hypervisor.h.

#define HV_CTX_DIRECTIO 0x1

Direct I/O requests are accepted from PL0.

Definition at line 724 of file hypervisor.h.

#define HV_CTX_PG_SM_16K 0x20

Use 16K small pages, if available.

Definition at line 728 of file hypervisor.h.

#define HV_CTX_PG_SM_4K 0x10

Use 4K small pages, if available.

Definition at line 727 of file hypervisor.h.

#define HV_CTX_PG_SM_64K 0x40

Use 64K small pages, if available.

Definition at line 729 of file hypervisor.h.

#define HV_CTX_PG_SM_MASK 0xf0

Mask of all possible small pages.

Definition at line 730 of file hypervisor.h.

#define HV_DEFAULT_PAGE_SIZE_LARGE (__HV_SIZE_ONE << HV_LOG2_DEFAULT_PAGE_SIZE_LARGE)

The initial size of large pages, in bytes. This value should be verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE). It may also be modified when installing a new context.

Definition at line 66 of file hypervisor.h.

#define HV_DEFAULT_PAGE_SIZE_SMALL (__HV_SIZE_ONE << HV_LOG2_DEFAULT_PAGE_SIZE_SMALL)

The initial size of small pages, in bytes. This value should be verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL). It may also be modified when installing a new context.

Definition at line 54 of file hypervisor.h.

#define HV_DEV_ALLFLAGS

Value:

(HV_DEV_NB_EMPTY | HV_DEV_NB_PARTIAL | \

HV_DEV_NOCACHE)

All HV_DEV_xxx flags

Definition at line 1627 of file hypervisor.h.

#define HV_DEV_NB_EMPTY 0x1

Don't block when no bytes of data can be transferred.

Definition at line 1616 of file hypervisor.h.

#define HV_DEV_NB_PARTIAL 0x2

Don't block when some bytes, but not all of the requested bytes, can be transferred.

Definition at line 1618 of file hypervisor.h.

#define HV_DEV_NOCACHE 0x4

The caller warrants that none of the cache lines which might contain data from the requested buffer are valid. Useful with asynchronous operations only.

Definition at line 1621 of file hypervisor.h.

#define HV_DEVPOLL_FLUSH 0x4

Test device for output drained

Definition at line 1720 of file hypervisor.h.

#define HV_DEVPOLL_READ 0x1

Test device for readability

Definition at line 1718 of file hypervisor.h.

#define HV_DEVPOLL_WRITE 0x2

Test device for writability

Definition at line 1719 of file hypervisor.h.

#define HV_DIMM_SIZE_MASK 0xf

Bits to mask to get the DIMM size.

Definition at line 1000 of file hypervisor.h.

#define HV_DIMM_SIZE_SHIFT 4

Number of bits to right-shift to get the DIMM size.

Definition at line 997 of file hypervisor.h.

#define HV_DIMM_TYPE_MASK 0xf

Bits to mask to get the DIMM type.

Definition at line 994 of file hypervisor.h.

#define HV_DIMM_TYPE_SHIFT 0

Number of bits to right-shift to get the DIMM type.

Definition at line 991 of file hypervisor.h.

#define HV_DISPATCH_BZERO_PAGE 28

hv_bzero_page

Definition at line 211 of file hypervisor.h.

#define HV_DISPATCH_CLEAR_INTR 48

hv_clear_intr

Definition at line 273 of file hypervisor.h.

#define HV_DISPATCH_CONFSTR 45

hv_confstr

Definition at line 262 of file hypervisor.h.

#define HV_DISPATCH_CONSOLE_PUTC 43

hv_console_putc

Definition at line 256 of file hypervisor.h.

#define HV_DISPATCH_CONSOLE_READ_IF_READY 17

hv_console_read_if_ready

Definition at line 178 of file hypervisor.h.

#define HV_DISPATCH_CONSOLE_WRITE 18

hv_console_write

Definition at line 181 of file hypervisor.h.

#define HV_DISPATCH_DEV_CLOSE 35

hv_dev_close

Definition at line 232 of file hypervisor.h.

#define HV_DISPATCH_DEV_OPEN 34

hv_dev_open

Definition at line 229 of file hypervisor.h.

#define HV_DISPATCH_DEV_POLL 38

hv_dev_poll

Definition at line 241 of file hypervisor.h.

#define HV_DISPATCH_DEV_POLL_CANCEL 39

hv_dev_poll_cancel

Definition at line 244 of file hypervisor.h.

#define HV_DISPATCH_DEV_PREAD 36

hv_dev_pread

Definition at line 235 of file hypervisor.h.

#define HV_DISPATCH_DEV_PREADA 40

hv_dev_preada

Definition at line 247 of file hypervisor.h.

#define HV_DISPATCH_DEV_PWRITE 37

hv_dev_pwrite

Definition at line 238 of file hypervisor.h.

#define HV_DISPATCH_DEV_PWRITEA 41

hv_dev_pwritea

Definition at line 250 of file hypervisor.h.

#define HV_DISPATCH_DISABLE_INTR 50

hv_disable_intr

Definition at line 279 of file hypervisor.h.

#define HV_DISPATCH_DOWNCALL_DISPATCH 19

hv_downcall_dispatch

Definition at line 184 of file hypervisor.h.

#define HV_DISPATCH_ENABLE_INTR 49

hv_enable_intr

Definition at line 276 of file hypervisor.h.

#define HV_DISPATCH_ENTRY_SIZE 32

Each entry in the hv dispatch array takes this many bytes.

Definition at line 107 of file hypervisor.h.

#define HV_DISPATCH_FLUSH_ALL 55

hv_flush_all

Definition at line 296 of file hypervisor.h.

#define HV_DISPATCH_FLUSH_ASID 6

hv_flush_asid

Definition at line 145 of file hypervisor.h.

#define HV_DISPATCH_FLUSH_PAGE 7

hv_flush_page

Definition at line 148 of file hypervisor.h.

#define HV_DISPATCH_FLUSH_PAGES 8

hv_flush_pages

Definition at line 151 of file hypervisor.h.

#define HV_DISPATCH_FLUSH_REMOTE 42

hv_flush_remote

Definition at line 253 of file hypervisor.h.

#define HV_DISPATCH_FS_FINDFILE 21

hv_fs_findfile

Definition at line 190 of file hypervisor.h.

#define HV_DISPATCH_FS_FSTAT 22

hv_fs_fstat

Definition at line 193 of file hypervisor.h.

#define HV_DISPATCH_FS_PREAD 23

hv_fs_pread

Definition at line 196 of file hypervisor.h.

#define HV_DISPATCH_GET_COMMAND_LINE 26

hv_get_command_line

Definition at line 205 of file hypervisor.h.

#define HV_DISPATCH_GET_RTC 4

hv_get_rtc

Definition at line 139 of file hypervisor.h.

#define HV_DISPATCH_HALT 10

hv_halt

Definition at line 157 of file hypervisor.h.

#define HV_DISPATCH_INIT 1

hv_init

Definition at line 130 of file hypervisor.h.

#define HV_DISPATCH_INQUIRE_ASID 15

hv_inquire_asid

Definition at line 172 of file hypervisor.h.

#define HV_DISPATCH_INQUIRE_CONTEXT 32

hv_inquire_context

Definition at line 223 of file hypervisor.h.

#define HV_DISPATCH_INQUIRE_MEMORY_CONTROLLER 13

hv_inquire_memory_controller

Definition at line 166 of file hypervisor.h.

#define HV_DISPATCH_INQUIRE_PHYSICAL 12

hv_inquire_physical

Definition at line 163 of file hypervisor.h.

#define HV_DISPATCH_INQUIRE_REALPA 54

hv_inquire_realpa

Definition at line 293 of file hypervisor.h.

#define HV_DISPATCH_INQUIRE_TILES 44

hv_inquire_tiles

Definition at line 259 of file hypervisor.h.

#define HV_DISPATCH_INQUIRE_TOPOLOGY 20

hv_inquire_topology

Definition at line 187 of file hypervisor.h.

#define HV_DISPATCH_INQUIRE_VIRTUAL 14

hv_inquire_virtual

Definition at line 169 of file hypervisor.h.

#define HV_DISPATCH_INSTALL_CONTEXT 2

hv_install_context

Definition at line 133 of file hypervisor.h.

#define HV_DISPATCH_NANOSLEEP 16

hv_nanosleep

Definition at line 175 of file hypervisor.h.

#define HV_DISPATCH_PHYSADDR_READ64 24

hv_physaddr_read64

Definition at line 199 of file hypervisor.h.

#define HV_DISPATCH_PHYSADDR_WRITE64 25

hv_physaddr_write64

Definition at line 202 of file hypervisor.h.

#define HV_DISPATCH_POWER_OFF 11

hv_power_off

Definition at line 160 of file hypervisor.h.

#define HV_DISPATCH_RAISE_INTR 51

hv_raise_intr

Definition at line 282 of file hypervisor.h.

#define HV_DISPATCH_RECEIVE_MESSAGE 31

hv_receive_message

Definition at line 220 of file hypervisor.h.

#define HV_DISPATCH_REEXEC 46

hv_reexec

Definition at line 265 of file hypervisor.h.

#define HV_DISPATCH_REGISTER_MESSAGE_STATE 29

hv_register_message_state

Definition at line 214 of file hypervisor.h.

#define HV_DISPATCH_RESTART 9

hv_restart

Definition at line 154 of file hypervisor.h.

#define HV_DISPATCH_SEND_MESSAGE 30

hv_send_message

Definition at line 217 of file hypervisor.h.

#define HV_DISPATCH_SET_CACHING 27

hv_set_caching

Definition at line 208 of file hypervisor.h.

#define HV_DISPATCH_SET_COMMAND_LINE 47

hv_set_command_line

Definition at line 268 of file hypervisor.h.

#define HV_DISPATCH_SET_PTE_SUPER_SHIFT 57

hv_set_pte_super_shift

Definition at line 304 of file hypervisor.h.

#define HV_DISPATCH_SET_RTC 5

hv_set_rtc

Definition at line 142 of file hypervisor.h.

#define HV_DISPATCH_START_ALL_TILES 33

hv_start_all_tiles

Definition at line 226 of file hypervisor.h.

#define HV_DISPATCH_STORE_MAPPING 53

hv_store_mapping

Definition at line 290 of file hypervisor.h.

#define HV_DISPATCH_SYSCONF 3

hv_sysconf

Definition at line 136 of file hypervisor.h.

#define HV_DISPATCH_TRIGGER_IPI 52

hv_trigger_ipi

Definition at line 285 of file hypervisor.h.

#define HV_E2BIG -807

Message too big

Definition at line 364 of file hypervisor.h.

#define HV_EAGAIN -815

Try again

Definition at line 372 of file hypervisor.h.

#define HV_EBADF -804

Bad file number

Definition at line 361 of file hypervisor.h.

#define HV_EBUSY -809

Device busy

Definition at line 366 of file hypervisor.h.

#define HV_EFAULT -805

Bad address

Definition at line 362 of file hypervisor.h.

#define HV_EINVAL -801

Invalid argument

Definition at line 358 of file hypervisor.h.

#define HV_EIO -813

I/O error

Definition at line 370 of file hypervisor.h.

#define HV_ENODEV -802

No such device

Definition at line 359 of file hypervisor.h.

#define HV_ENOENT -803

No such file or directory

Definition at line 360 of file hypervisor.h.

#define HV_ENOMEM -814

Out of memory

Definition at line 371 of file hypervisor.h.

#define HV_ENOSYS -810

Invalid syscall

Definition at line 367 of file hypervisor.h.

#define HV_ENOTREADY -812

Device not ready

Definition at line 369 of file hypervisor.h.

#define HV_ENOTSUP -808

Service not supported

Definition at line 365 of file hypervisor.h.

#define HV_EPERM -811

No permission

Definition at line 368 of file hypervisor.h.

#define HV_ERECIP -806

Bad recipients

Definition at line 363 of file hypervisor.h.

#define HV_ERR_MAX -801

Largest HV error code

Definition at line 374 of file hypervisor.h.

#define HV_ERR_MIN -815

Smallest HV error code

Definition at line 375 of file hypervisor.h.

#define HV_FLUSH_ALL -1UL

Use for cache_control to ensure a flush of all caches.

Definition at line 1903 of file hypervisor.h.

#define HV_FLUSH_EVICT_L1I (1UL << 30)

Include in cache_control to ensure a flush of the entire L1I.

Definition at line 1897 of file hypervisor.h.

#define HV_FLUSH_EVICT_L2 (1UL << 31)

Include in cache_control to ensure a flush of the entire L2.

Definition at line 1894 of file hypervisor.h.

#define HV_FLUSH_MAX_CACHE_LEN ((1UL << 30) - 1)

Maximum legal size to use for the "length" component of cache_control.

Definition at line 1900 of file hypervisor.h.

#define HV_GLUE_RESERVED_SIZE 0x10000

This much space is reserved at HV_GLUE_START_CPA for the hypervisor glue. The client program must start at some address higher than this, and in particular the address of its text section should be equal to zero modulo HV_PAGE_SIZE_LARGE so that relative offsets to the HV glue are correct.

Definition at line 104 of file hypervisor.h.

#define HV_GLUE_START_CPA 0x10000

Normal start of hypervisor glue in client physical memory.

Definition at line 96 of file hypervisor.h.

#define HV_L1_SPAN (__HV_SIZE_ONE << HV_LOG2_L1_SPAN)

The span of a level-1 page table, in bytes.

Definition at line 43 of file hypervisor.h.

#define HV_LOG2_DEFAULT_PAGE_SIZE_LARGE 24

The log2 of the initial size of large pages, in bytes. See HV_DEFAULT_PAGE_SIZE_LARGE.

Definition at line 60 of file hypervisor.h.

#define HV_LOG2_DEFAULT_PAGE_SIZE_SMALL 16

The log2 of the initial size of small pages, in bytes. See HV_DEFAULT_PAGE_SIZE_SMALL.

Definition at line 48 of file hypervisor.h.

#define HV_LOG2_L1_SPAN 32

The log2 of the span of a level-1 page table, in bytes.

Definition at line 39 of file hypervisor.h.

#define HV_LOG2_PAGE_TABLE_ALIGN 11

The log2 of the granularity at which page tables must be aligned; in other words, the CPA for a page table must have this many zero bits at the bottom of the address.

Definition at line 89 of file hypervisor.h.

#define HV_LOG2_PTE_SIZE 3

Bits in the size of an HV_PTE

Definition at line 1933 of file hypervisor.h.

#define HV_LOTAR_WIDTH 11

The width of a LOTAR's x or y bitfield.

Definition at line 2254 of file hypervisor.h.

#define HV_LOTAR_X ( lotar ) ((lotar) >> HV_LOTAR_WIDTH)

Extracts the X component of a lotar.

Definition at line 2260 of file hypervisor.h.

#define HV_LOTAR_Y ( lotar ) ((lotar) & ((1 << HV_LOTAR_WIDTH) - 1))

Extracts the Y component of a lotar.

Definition at line 2263 of file hypervisor.h.

#define HV_MAX_IPI_INTERRUPT 7

The low interrupt numbers are reserved for use by the client in delivering IPIs. Any interrupt numbers higher than this value are reserved for use by HV device drivers.

Definition at line 575 of file hypervisor.h.

#define HV_MAX_MESSAGE_SIZE 28

Maximum hypervisor message size, in bytes

Definition at line 1489 of file hypervisor.h.

#define HV_MSG_INTR 0x1

Message source is a driver interrupt

Definition at line 1500 of file hypervisor.h.

#define HV_MSG_TILE 0x0

Message source is another tile

Definition at line 1499 of file hypervisor.h.

#define HV_MSH_MAX_DIMMS 2

Max number of DIMMs contained by one memory controller.

Definition at line 986 of file hypervisor.h.

#define HV_MSH_MIN_DIMM_SIZE_SHIFT 26

Log2 of minimum DIMM bytes supported by the memory controller.

Definition at line 983 of file hypervisor.h.

#define HV_OK 0

No error

Definition at line 357 of file hypervisor.h.

#define HV_PAGE_TABLE_ALIGN (__HV_SIZE_ONE << HV_LOG2_PAGE_TABLE_ALIGN)

The granularity at which page tables must be aligned.

Definition at line 93 of file hypervisor.h.

#define hv_pte ( val ) ((HV_PTE) { val })

Cast a 64-bit value to an HV_PTE

Definition at line 1927 of file hypervisor.h.

#define HV_PTE_ACCESSED (__HV_PTE_ONE << HV_PTE_INDEX_ACCESSED)

Has this mapping been accessed?

This bit is set by the hypervisor when the memory described by the translation is accessed for the first time. It is never cleared by the hypervisor, but may be cleared by the client. After the bit has been cleared, subsequent references are not guaranteed to set it again until the translation has been flushed from the TLB.

This bit is ignored in level-1 PTEs unless the Page bit is set.

Definition at line 2118 of file hypervisor.h.

#define HV_PTE_CACHED_PRIORITY

Value:

(__HV_PTE_ONE << \

HV_PTE_INDEX_CACHED_PRIORITY)

Is this a priority page?

If this bit is set, the page described by the PTE will be given priority in the cache. Normally this translates into allowing the page to use only the "red" half of the cache. The client may wish to then use the hv_set_caching service to specify that other pages which alias this page will use only the "black" half of the cache.

If the Cached Priority bit is clear, the hypervisor uses the current hv_set_caching() value to choose how to cache the page.

It is illegal to set the Cached Priority bit if the Non-Cached bit is set and the Cached Remotely bit is clear, i.e. if requests to the page map directly to memory.

This bit is ignored in level-1 PTEs unless the Page bit is set.

Definition at line 2216 of file hypervisor.h.

#define HV_PTE_CLIENT0 (__HV_PTE_ONE << HV_PTE_INDEX_CLIENT0)

Client-private bit in PTE.

This bit is guaranteed not to be inspected or modified by the hypervisor.

Definition at line 2145 of file hypervisor.h.

#define HV_PTE_CLIENT1 (__HV_PTE_ONE << HV_PTE_INDEX_CLIENT1)

Client-private bit in PTE.

This bit is guaranteed not to be inspected or modified by the hypervisor.

Definition at line 2152 of file hypervisor.h.

#define HV_PTE_CLIENT2 (__HV_PTE_ONE << HV_PTE_INDEX_CLIENT2)

Client-private bit in PTE.

This bit is guaranteed not to be inspected or modified by the hypervisor.

Definition at line 2159 of file hypervisor.h.

#define HV_PTE_DIRTY (__HV_PTE_ONE << HV_PTE_INDEX_DIRTY)

Is this mapping dirty?

This bit is set by the hypervisor when the memory described by the translation is written for the first time. It is never cleared by the hypervisor, but may be cleared by the client. After the bit has been cleared, subsequent references are not guaranteed to set it again until the translation has been flushed from the TLB.

This bit is ignored in level-1 PTEs unless the Page bit is set.

Definition at line 2130 of file hypervisor.h.

#define HV_PTE_EXECUTABLE (__HV_PTE_ONE << HV_PTE_INDEX_EXECUTABLE)

Is this an executable mapping?

If this bit is set, code will be permitted to execute from (e.g., jump to) the virtual addresses mapped by this PTE.

This bit applies to any processor on the tile, if there are more than one.

This bit is ignored in level-1 PTEs unless the Page bit is set.

Definition at line 2251 of file hypervisor.h.

#define HV_PTE_GLOBAL (__HV_PTE_ONE << HV_PTE_INDEX_GLOBAL)

Is this a global (non-ASID) mapping?

If this bit is set, the translations established by this PTE will not be flushed from the TLB by the hv_flush_asid() service; they will be flushed by the hv_flush_page() or hv_flush_pages() services.

Setting this bit for translations which are identical in all page tables (for instance, code and data belonging to a client OS) can be very beneficial, as it will reduce the number of TLB misses. Note that, while it is not an error which will be detected by the hypervisor, it is an extremely bad idea to set this bit for translations which are not identical in all page tables.

This bit should not be modified by the client while PRESENT is set, as doing so may race with the hypervisor's update of ACCESSED and DIRTY bits.

This bit is ignored in level-1 PTEs unless the Page bit is set.

Definition at line 2093 of file hypervisor.h.

#define HV_PTE_INDEX_ACCESSED 11

Page has been accessed

Definition at line 1951 of file hypervisor.h.

#define HV_PTE_INDEX_CACHED_PRIORITY 7

Page is priority cached

Definition at line 1947 of file hypervisor.h.

#define HV_PTE_INDEX_CLIENT0 2

Page client state 0

Definition at line 1942 of file hypervisor.h.

#define HV_PTE_INDEX_CLIENT1 3

Page client state 1

Definition at line 1943 of file hypervisor.h.

#define HV_PTE_INDEX_CLIENT2 19

Page client state 2

Definition at line 1958 of file hypervisor.h.

#define HV_PTE_INDEX_DIRTY 12

Page has been written

Definition at line 1952 of file hypervisor.h.

#define HV_PTE_INDEX_EXECUTABLE 34

Page is executable

Definition at line 1966 of file hypervisor.h.

#define HV_PTE_INDEX_GLOBAL 9

Page is global

Definition at line 1949 of file hypervisor.h.

#define HV_PTE_INDEX_LOTAR 20

Page's LOTAR; must be high bits of word

Definition at line 1959 of file hypervisor.h.

#define HV_PTE_INDEX_MIGRATING 1

Page is migrating

Definition at line 1941 of file hypervisor.h.

#define HV_PTE_INDEX_MODE 16

Page mode; see HV_PTE_MODE_xxx

Definition at line 1956 of file hypervisor.h.

#define HV_PTE_INDEX_NC 4

L1$/L2$ incoherent with L3$

Definition at line 1944 of file hypervisor.h.

#define HV_PTE_INDEX_NO_ALLOC_L1 5

Page is uncached in local L1$

Definition at line 1945 of file hypervisor.h.

#define HV_PTE_INDEX_NO_ALLOC_L2 6

Page is uncached in local L2$

Definition at line 1946 of file hypervisor.h.

#define HV_PTE_INDEX_PAGE 8

PTE describes a page

Definition at line 1948 of file hypervisor.h.

#define HV_PTE_INDEX_PRESENT 0

PTE is valid

Definition at line 1940 of file hypervisor.h.

#define HV_PTE_INDEX_PTFN 35

Page's PTFN; must be high bits of word

Definition at line 1967 of file hypervisor.h.

#define HV_PTE_INDEX_READABLE 32

Page is readable

Definition at line 1964 of file hypervisor.h.

#define HV_PTE_INDEX_SUPER 15

Pages ganged together for TLB

Definition at line 1955 of file hypervisor.h.

#define HV_PTE_INDEX_USER 10

Page is user-accessible

Definition at line 1950 of file hypervisor.h.

#define HV_PTE_INDEX_WRITABLE 33

Page is writable

Definition at line 1965 of file hypervisor.h.

#define HV_PTE_LOTAR_BITS 12

Number of bits in a LOTAR

Definition at line 1961 of file hypervisor.h.

#define HV_PTE_MIGRATING (__HV_PTE_ONE << HV_PTE_INDEX_MIGRATING)

Migrating bit in PTE.

This bit is guaranteed not to be inspected or modified by the hypervisor. The name is indicative of the suggested use by the client to tag pages whose L3 cache is being migrated from one cpu to another.

Definition at line 2138 of file hypervisor.h.

#define HV_PTE_MODE_BITS 3

Number of bits in mode

Definition at line 1957 of file hypervisor.h.

#define HV_PTE_MODE_CACHE_HASH_L3 4

Data is resident in the tile's local L1 and/or L2 caches. If a load or store misses there, it goes to an L3 cache in one of a set of designated tiles; if it misses there, it goes to memory. Which tile is chosen from the set depends upon a hash function applied to the physical address. This mode is not supported on chips for which CHIP_HAS_CBOX_HOME_MAP() is 0.

If the NC bit is not set, the copy in the local L1$/L2$ is invalidated when the copy in the remote L3$ is changed. Otherwise, such invalidation will not occur.

Chips for which CHIP_HAS_COHERENT_LOCAL_CACHE() is 0 do not support invalidation from an L3$ to another tile's L1$/L2$. If the NC bit is clear on such a chip, no copy is kept in the local L1$/L2$ in this mode.

Definition at line 2016 of file hypervisor.h.

#define HV_PTE_MODE_CACHE_NO_L3 2

Data is resident in the tile's local L1 and/or L2 caches; if a load or store misses there, it goes to memory.

The copy in the local L1$/L2$ is not invalidated when the copy in memory is changed.

Definition at line 1985 of file hypervisor.h.

#define HV_PTE_MODE_CACHE_TILE_L3 3

Data is resident in the tile's local L1 and/or L2 caches. If a load or store misses there, it goes to an L3 cache in a designated tile; if it misses there, it goes to memory.

If the NC bit is not set, the copy in the local L1$/L2$ is invalidated when the copy in the remote L3$ is changed. Otherwise, such invalidation will not occur.

Chips for which CHIP_HAS_COHERENT_LOCAL_CACHE() is 0 do not support invalidation from an L3$ to another tile's L1$/L2$. If the NC bit is clear on such a chip, no copy is kept in the local L1$/L2$ in this mode.

Definition at line 1999 of file hypervisor.h.

#define HV_PTE_MODE_MMIO 5

Data is not resident in memory; accesses are instead made to an I/O device, whose tile coordinates are given by the PTE's LOTAR field. This mode is only supported on chips for which CHIP_HAS_MMIO() is 1. The EXECUTABLE bit may not be set in an MMIO PTE.

Definition at line 2023 of file hypervisor.h.

#define HV_PTE_MODE_UNCACHED 1

Data is not resident in any caches; loads and stores access memory directly.

Definition at line 1977 of file hypervisor.h.

#define HV_PTE_NC (__HV_PTE_ONE << HV_PTE_INDEX_NC)

Non-coherent (NC) bit in PTE.

If this bit is set, the mapping that is set up will be non-coherent (also known as non-inclusive). This means that changes to the L3 cache will not cause a local copy to be invalidated. It is generally recommended only for read-only mappings.

In level-1 PTEs, if the Page bit is clear, this bit determines how the level-2 page table is accessed.

Definition at line 2171 of file hypervisor.h.

#define HV_PTE_NO_ALLOC_L1 (__HV_PTE_ONE << HV_PTE_INDEX_NO_ALLOC_L1)

Is this page prevented from filling the L1$?

If this bit is set, the page described by the PTE will not be cached the local cpu's L1 cache.

If CHIP_HAS_NC_AND_NOALLOC_BITS() is not true in <chip.h> for this chip, it is illegal to use this attribute, and may cause client termination.

In level-1 PTEs, if the Page bit is clear, this bit determines how the level-2 page table is accessed.

Definition at line 2184 of file hypervisor.h.

#define HV_PTE_NO_ALLOC_L2 (__HV_PTE_ONE << HV_PTE_INDEX_NO_ALLOC_L2)

Is this page prevented from filling the L2$?

If this bit is set, the page described by the PTE will not be cached the local cpu's L2 cache.

If CHIP_HAS_NC_AND_NOALLOC_BITS() is not true in <chip.h> for this chip, it is illegal to use this attribute, and may cause client termination.

In level-1 PTEs, if the Page bit is clear, this bit determines how the level-2 page table is accessed.

Definition at line 2197 of file hypervisor.h.

#define HV_PTE_PAGE (__HV_PTE_ONE << HV_PTE_INDEX_PAGE)

Does this PTE map a page?

If this bit is set in a level-0 page table, the entry should be interpreted as a level-2 page table entry mapping a jumbo page.

If this bit is set in a level-1 page table, the entry should be interpreted as a level-2 page table entry mapping a large page.

This bit should not be modified by the client while PRESENT is set, as doing so may race with the hypervisor's update of ACCESSED and DIRTY bits.

In a level-2 page table, this bit is ignored and must be zero.

Definition at line 2061 of file hypervisor.h.

#define HV_PTE_PRESENT (__HV_PTE_ONE << HV_PTE_INDEX_PRESENT)

Is this PTE present?

If this bit is set, this PTE represents a valid translation or level-2 page table pointer. Otherwise, the page table does not contain a translation for the subject virtual pages.

If this bit is not set, the other bits in the PTE are not interpreted by the hypervisor, and may contain any value.

Definition at line 2046 of file hypervisor.h.

#define HV_PTE_PTFN_BITS 29

Number of bits in a PTFN

Definition at line 1969 of file hypervisor.h.

#define HV_PTE_READABLE (__HV_PTE_ONE << HV_PTE_INDEX_READABLE)

Is this a readable mapping?

If this bit is set, code will be permitted to read from (e.g., issue load instructions against) the virtual addresses mapped by this PTE.

It is illegal for this bit to be clear if the Writable bit is set.

This bit is ignored in level-1 PTEs unless the Page bit is set.

Definition at line 2229 of file hypervisor.h.

#define HV_PTE_SIZE (1 << HV_LOG2_PTE_SIZE)

Size of an HV_PTE

Definition at line 1936 of file hypervisor.h.

#define HV_PTE_SUPER (__HV_PTE_ONE << HV_PTE_INDEX_SUPER)

Does this PTE implicitly reference multiple pages?

If this bit is set in the page table (either in the level-2 page table, or in a higher level page table in conjunction with the PAGE bit) then the PTE specifies a range of contiguous pages, not a single page. The hv_set_pte_super_shift() allows you to specify the count for each level of the page table.

Note: this bit is not supported on TILEPro systems.

Definition at line 2073 of file hypervisor.h.

#define HV_PTE_USER (__HV_PTE_ONE << HV_PTE_INDEX_USER)

Is this mapping accessible to users?

If this bit is set, code running at any PL will be permitted to access the virtual addresses mapped by this PTE. Otherwise, only code running at PL 1 or above will be allowed to do so.

This bit should not be modified by the client while PRESENT is set, as doing so may race with the hypervisor's update of ACCESSED and DIRTY bits.

This bit is ignored in level-1 PTEs unless the Page bit is set.

Definition at line 2106 of file hypervisor.h.

#define hv_pte_val ( pte ) ((pte).val)

Return a 64-bit value corresponding to the PTE if needed

Definition at line 1924 of file hypervisor.h.

#define HV_PTE_WRITABLE (__HV_PTE_ONE << HV_PTE_INDEX_WRITABLE)

Is this a writable mapping?

If this bit is set, code will be permitted to write to (e.g., issue store instructions against) the virtual addresses mapped by this PTE.

This bit is ignored in level-1 PTEs unless the Page bit is set.

Definition at line 2239 of file hypervisor.h.

#define HV_PTFN_TO_CPA ( p ) (((HV_PhysAddr)(p)) << HV_LOG2_PAGE_TABLE_ALIGN)

Converts a ptfn to a client physical address.

Definition at line 2413 of file hypervisor.h.

#define HV_RTC_LOW_VOLTAGE 0x2

RTC return flag for low-voltage condition, indicating that battery had died and time read is unreliable.

Definition at line 637 of file hypervisor.h.

#define HV_RTC_NO_CHIP 0x1

RTC return flag for no RTC chip present.

Definition at line 632 of file hypervisor.h.

#define HV_SGL_MAXLEN 16

Maximum number of entries in a scatter-gather list

Definition at line 1751 of file hypervisor.h.

#define HV_SYSCONF_OVERTEMP 999

Pseudo-temperature value indicating that the temperature has pegged at its upper limit and is no longer accurate; note that this is the value after subtracting HV_SYSCONF_TEMP_KTOC.

Definition at line 449 of file hypervisor.h.

#define HV_SYSCONF_TEMP_KTOC 273

Offset to subtract from returned Kelvin temperature to get degrees Celsius.

Definition at line 444 of file hypervisor.h.

#define HV_XY_TO_LOTAR	(	x,
		y
	)	((HV_LOTAR)(((x) << HV_LOTAR_WIDTH) \| (y)))

Converts an x,y pair to a LOTAR value.

Definition at line 2257 of file hypervisor.h.

#define INT_DEV_INTR_DWNCL INT_WORLD_ACCESS

Device interrupt downcall interrupt vector

Definition at line 1203 of file hypervisor.h.

#define INT_DMATLB_ACCESS_DWNCL INT_DMA_CPL

DMA TLB access violation downcall interrupt vector

Definition at line 1201 of file hypervisor.h.

#define INT_DMATLB_MISS_DWNCL INT_DMA_ASID

DMA TLB miss downcall interrupt vector

Definition at line 1197 of file hypervisor.h.

#define INT_MESSAGE_RCV_DWNCL INT_BOOT_ACCESS

We use actual interrupt vectors which never occur (they're only there to allow setting MPLs for related SPRs) for our downcall vectors.Message receive downcall interrupt vector

Definition at line 1195 of file hypervisor.h.

#define INT_SNITLB_MISS_DWNCL INT_SNI_ASID

Static nework processor instruction TLB miss interrupt vector

Definition at line 1199 of file hypervisor.h.

Typedef Documentation

typedef uint32_t __hv32

32-bit value

Definition at line 318 of file hypervisor.h.

typedef uint64_t __hv64

64-bit value

Definition at line 319 of file hypervisor.h.

typedef unsigned int HV_ASID

Hypervisor ASID.

Definition at line 335 of file hypervisor.h.

typedef int HV_Errno

Hypervisor error code.

Definition at line 353 of file hypervisor.h.

typedef __hv32 HV_IntArg

Interrupt arguments, used in the asynchronous I/O interfaces.

Definition at line 1664 of file hypervisor.h.

typedef __hv32 HV_IntrMask

A set of interrupts.

Definition at line 570 of file hypervisor.h.

typedef unsigned int HV_LOTAR

Hypervisor tile location for a memory access ("location overridden target").

Definition at line 340 of file hypervisor.h.

typedef int HV_MemoryController

An identifier for a memory controller. Multiple memory controllers may be connected to one chip, and this uniquely identifies each one.

Definition at line 931 of file hypervisor.h.

typedef unsigned long HV_PageSize

Hypervisor size of a page.

Definition at line 343 of file hypervisor.h.

typedef __hv64 HV_PhysAddr

Hypervisor physical address.

Definition at line 324 of file hypervisor.h.

typedef __hv32 HV_VirtAddr

Hypervisor virtual address.

Definition at line 331 of file hypervisor.h.

Enumeration Type Documentation

enum HV_ConfstrQuery

Queries we can make for hv_confstr().

These numbers are part of the binary API and guaranteed not to change.

Enumerator:

_HV_CONFSTR_RESERVED	An invalid value; do not use.
HV_CONFSTR_BOARD_PART_NUM	Board part number.
HV_CONFSTR_BOARD_SERIAL_NUM	Board serial number.
HV_CONFSTR_CHIP_SERIAL_NUM	Chip serial number.
HV_CONFSTR_BOARD_REV	Board revision level.
HV_CONFSTR_HV_SW_VER	Hypervisor software version.
HV_CONFSTR_CHIP_MODEL	The name for this chip model.
HV_CONFSTR_BOARD_DESC	Human-readable board description.
HV_CONFSTR_HV_CONFIG	Human-readable description of the hypervisor configuration.
HV_CONFSTR_HV_CONFIG_VER	Human-readable version string for the boot image (for instance, who built it and when, what configuration file was used).
HV_CONFSTR_MEZZ_PART_NUM	Mezzanine part number.
HV_CONFSTR_MEZZ_SERIAL_NUM	Mezzanine serial number.
HV_CONFSTR_MEZZ_REV	Mezzanine revision level.
HV_CONFSTR_MEZZ_DESC	Human-readable mezzanine description.
HV_CONFSTR_SWITCH_CONTROL	Control path for the onboard network switch.
HV_CONFSTR_CHIP_REV	Chip revision level.
HV_CONFSTR_CPUMOD_PART_NUM	CPU module part number.
HV_CONFSTR_CPUMOD_SERIAL_NUM	CPU module serial number.
HV_CONFSTR_CPUMOD_REV	CPU module revision level.
HV_CONFSTR_CPUMOD_DESC	Human-readable CPU module description.

Definition at line 463 of file hypervisor.h.

enum HV_DIMM_Type

Possible DIMM types.

Enumerator:

NO_DIMM	No DIMM
DDR2	DDR2
DDR3	DDR3

Definition at line 965 of file hypervisor.h.

enum HV_FS_FSTAT_FLAGS

Bitmask flags for fstat request

Enumerator:

HV_FS_ISDIR

Is the entry a directory?

Definition at line 1231 of file hypervisor.h.

enum HV_InqTileSet

Sets of tiles we can retrieve with hv_inquire_tiles().

These numbers are part of the binary API and guaranteed not to change.

Enumerator:

_HV_INQ_TILES_RESERVED	An invalid value; do not use.
HV_INQ_TILES_AVAIL	All available tiles within the supervisor's tile rectangle.
HV_INQ_TILES_HFH_CACHE	The set of tiles used for hash-for-home caching.
HV_INQ_TILES_LOTAR	The set of tiles that can be legally used as a LOTAR for a PTE.

Definition at line 900 of file hypervisor.h.

enum HV_Recip_State

Possible message recipient states.

Enumerator:

HV_TO_BE_SENT	Not sent (not attempted, or recipient not ready)
HV_SENT	Successfully sent
HV_BAD_RECIP	Bad recipient coordinates (permanent error)

Definition at line 1394 of file hypervisor.h.

enum HV_SysconfQuery

Queries we can make for hv_sysconf().

These numbers are part of the binary API and guaranteed not to change.

Enumerator:

_HV_SYSCONF_RESERVED	An invalid value; do not use.
HV_SYSCONF_GLUE_SIZE	The length of the glue section containing the hv_ procs, in bytes.
HV_SYSCONF_PAGE_SIZE_SMALL	The size of small pages, in bytes.
HV_SYSCONF_PAGE_SIZE_LARGE	The size of large pages, in bytes.
HV_SYSCONF_CPU_SPEED	Processor clock speed, in hertz.
HV_SYSCONF_CPU_TEMP	Processor temperature, in degrees Kelvin. The value HV_SYSCONF_TEMP_KTOC may be subtracted from this to get degrees Celsius. If that Celsius value is HV_SYSCONF_OVERTEMP, this indicates that the temperature has hit an upper limit and is no longer being accurately tracked.
HV_SYSCONF_BOARD_TEMP	Board temperature, in degrees Kelvin. The value HV_SYSCONF_TEMP_KTOC may be subtracted from this to get degrees Celsius. If that Celsius value is HV_SYSCONF_OVERTEMP, this indicates that the temperature has hit an upper limit and is no longer being accurately tracked.
HV_SYSCONF_VALID_PAGE_SIZES	Legal page size bitmask for hv_install_context(). For example, if 16KB and 64KB small pages are supported, it would return "HV_CTX_PG_SM_16K \| HV_CTX_PG_SM_64K".
HV_SYSCONF_PAGE_SIZE_JUMBO	The size of jumbo pages, in bytes. If no jumbo pages are available, zero will be returned.

Definition at line 397 of file hypervisor.h.

enum HV_VersionNumber

Pass HV_VERSION to hv_init to request this version of the interface.

Enumerator:

HV_VERSION

Definition at line 380 of file hypervisor.h.

Function Documentation

struct __attribute__ ( (packed, aligned(4)) )

read

Scatter-gather list for preada/pwritea calls.

< Client physical address of the buffer segment.

< Page table entry describing the caching and location override characteristics of the buffer segment. Some drivers ignore this element and will require that the NOCACHE flag be set on their requests.

< Length of the buffer segment.

Definition at line 1740 of file hypervisor.h.

void hv_bzero_page	(	HV_VirtAddr	va,
		unsigned int	size
	)

Zero out a specified number of pages. The va and size must both be multiples of 4096. Caches are bypassed and memory is directly set to zero. This API is implemented only in the magic hypervisor and is intended to provide a performance boost to the minimal supervisor by giving it a fast way to zero memory pages when allocating them.

Parameters

va	Virtual address where the page has been mapped
size	Number of bytes (must be a page size multiple)

void hv_clear_intr ( HV_IntrMask clear_mask )

Clear a set of device interrupts.

Parameters

clear_mask Bitmap of interrupts to clear.

int hv_confstr	(	HV_ConfstrQuery	query,
		HV_VirtAddr	buf,
		int	len
	)

Query a configuration string from the hypervisor.

Parameters

query	Identifier for the specific string to be retrieved (HV_CONFSTR_xxx).
buf	Buffer in which to place the string.
len	Length of the buffer.

Returns: If query is valid, then the length of the corresponding string, including the trailing null; if this is greater than len, the string was truncated. If query is invalid, HV_EINVAL. If the specified buffer is not writable by the client, HV_EFAULT.

void hv_console_putc ( int byte )

Writes a character to the console, blocking if the console is busy.

This call cannot fail. If the console is broken for some reason, output will simply vanish.

Parameters

byte	Character to write.

int hv_console_read_if_ready ( void )

Reads a character from the console without blocking.

Returns: A value from 0-255 indicates the value successfully read. A negative value means no value was ready.

int hv_console_write	(	HV_VirtAddr	bytes,
		int	len
	)

Writes a string to the console, blocking if the console is busy.

Parameters

bytes	Pointer to characters to write.
len	Number of characters to write.

Returns: Number of characters written, or HV_EFAULT if the buffer is invalid.

int hv_dev_close ( int devhdl )

Close a hypervisor device.

This service uninitializes an I/O device and its hypervisor driver software, and makes it unavailable for use. The close operation is per-device per-chip; once it has been performed, the device is no longer available. Normally there is no need to ever call the close service.

Parameters

devhdl Device handle of the device to be closed.

Returns: Zero if the close is successful, otherwise, a negative error code.

int hv_dev_open	(	HV_VirtAddr	name,
		__hv32	flags
	)

Open a hypervisor device.

This service initializes an I/O device and its hypervisor driver software, and makes it available for use. The open operation is per-device per-chip; once it has been performed, the device handle returned may be used in other device services calls made by any tile.

Parameters

name Name of the device. A base device name is just a text string (say, "pcie"). If there is more than one instance of a device, the base name is followed by a slash and a device number (say, "pcie/0"). Some devices may support further structure beneath those components; most notably, devices which require control operations do so by supporting reads and/or writes to a control device whose name includes a trailing "/ctl" (say, "pcie/0/ctl").

flags Flags (HV_DEV_xxx).

Returns: A positive integer device handle, or a negative error code.

int hv_dev_poll	(	int	devhdl,
		__hv32	events,
		HV_IntArg	intarg
	)

Request an interrupt message when a device condition is satisfied.

This service requests that an interrupt message be delivered to the requesting tile when a device becomes readable or writable, or when any data queued to the device via previous write operations from this tile has been actually sent out on the hardware I/O interface. Devices may choose to support any, all, or none of the available conditions.

If multiple conditions are specified, only one message will be delivered. If the event mask delivered to that interrupt handler indicates that some of the conditions have not yet occurred, the client must issue another poll() call if it wishes to wait for those conditions.

Only one poll may be outstanding per device handle per tile. If more than one tile is polling on the same device and condition, they will all be notified when it happens. Because of this, clients may not assume that the condition signaled is necessarily still true when they request a subsequent service; for instance, the readable data which caused the poll call to interrupt may have been read by another tile in the interim.

The notification interrupt message could come directly, or via the downcall (intctrl1) method, depending on what the tile is doing when the condition is satisfied. Note that it is possible for the requested interrupt to be delivered after this service is called but before it returns.

Parameters

devhdl	Device handle of the device to be polled.
events	Flags denoting the events which will cause the interrupt to be delivered (HV_DEVPOLL_xxx).
intarg	Value which will be delivered as the intarg member of the eventual interrupt message; the intdata member will be set to a mask of HV_DEVPOLL_xxx values indicating which conditions have been satisifed.

Returns: Zero if the interrupt was successfully scheduled; otherwise, a negative error code.

int hv_dev_poll_cancel ( int devhdl )

Cancel a request for an interrupt when a device event occurs.

This service requests that no interrupt be delivered when the events noted in the last-issued poll() call happen. Once this service returns, the interrupt has been canceled; however, it is possible for the interrupt to be delivered after this service is called but before it returns.

Parameters

devhdl Device handle of the device on which to cancel polling.

Returns: Zero if the poll was successfully canceled; otherwise, a negative error code.

int hv_dev_pread	(	int	devhdl,
		__hv32	flags,
		HV_VirtAddr	va,
		__hv32	len,
		__hv64	offset
	)

Read data from a hypervisor device synchronously.

This service transfers data from a hypervisor device to a memory buffer. When the service returns, the data has been written from the memory buffer, and the buffer will not be further modified by the driver.

No ordering is guaranteed between requests issued from different tiles.

Devices may choose to support both the synchronous and asynchronous read operations, only one of them, or neither of them.

Parameters

devhdl	Device handle of the device to be read from.
flags	Flags (HV_DEV_xxx).
va	Virtual address of the target data buffer. This buffer must be mapped in the currently installed page table; if not, HV_EFAULT may be returned.
len	Number of bytes to be transferred.
offset	Driver-dependent offset. For a random-access device, this is often a byte offset from the beginning of the device; in other cases, like on a control device, it may have a different meaning.

Returns: A non-negative value if the read was at least partially successful; otherwise, a negative error code. The precise interpretation of the return value is driver-dependent, but many drivers will return the number of bytes successfully transferred.

int hv_dev_preada	(	int	devhdl,
		__hv32	flags,
		__hv32	sgl_len,
		HV_SGL	sgl[],
		__hv64	offset,
		HV_IntArg	intarg
	)

Read data from a hypervisor device asynchronously.

This service transfers data from a hypervisor device to a memory buffer. When the service returns, the read has been scheduled. When the read completes, an interrupt message will be delivered, and the buffer will not be further modified by the driver.

The number of possible outstanding asynchronous requests is defined by each driver, but it is recommended that it be at least two requests per tile per device.

No ordering is guaranteed between synchronous and asynchronous requests, even those issued on the same tile.

The completion interrupt message could come directly, or via the downcall (intctrl1) method, depending on what the tile is doing when the read completes. Interrupts do not coalesce; one is delivered for each asynchronous I/O request. Note that it is possible for the requested interrupt to be delivered after this service is called but before it returns.

Devices may choose to support both the synchronous and asynchronous read operations, only one of them, or neither of them.

Parameters

devhdl	Device handle of the device to be read from.
flags	Flags (HV_DEV_xxx).
sgl_len	Number of elements in the scatter-gather list.
sgl	Scatter-gather list describing the memory to which data will be written.
offset	Driver-dependent offset. For a random-access device, this is often a byte offset from the beginning of the device; in other cases, like on a control device, it may have a different meaning.
intarg	Value which will be delivered as the intarg member of the eventual interrupt message; the intdata member will be set to the normal return value from the read request.

Returns: Zero if the read was successfully scheduled; otherwise, a negative error code. Note that some drivers may choose to pre-validate their arguments, and may thus detect certain device error conditions at this time rather than when the completion notification occurs, but this is not required.

int hv_dev_pwrite	(	int	devhdl,
		__hv32	flags,
		HV_VirtAddr	va,
		__hv32	len,
		__hv64	offset
	)

Write data to a hypervisor device synchronously.

This service transfers data from a memory buffer to a hypervisor device. When the service returns, the data has been read from the memory buffer, and the buffer may be overwritten by the client; the data may not necessarily have been conveyed to the actual hardware I/O interface.

No ordering is guaranteed between requests issued from different tiles.

Devices may choose to support both the synchronous and asynchronous write operations, only one of them, or neither of them.

Parameters

devhdl	Device handle of the device to be written to.
flags	Flags (HV_DEV_xxx).
va	Virtual address of the source data buffer. This buffer must be mapped in the currently installed page table; if not, HV_EFAULT may be returned.
len	Number of bytes to be transferred.
offset	Driver-dependent offset. For a random-access device, this is often a byte offset from the beginning of the device; in other cases, like on a control device, it may have a different meaning.

Returns: A non-negative value if the write was at least partially successful; otherwise, a negative error code. The precise interpretation of the return value is driver-dependent, but many drivers will return the number of bytes successfully transferred.

int hv_dev_pwritea	(	int	devhdl,
		__hv32	flags,
		__hv32	sgl_len,
		HV_SGL	sgl[],
		__hv64	offset,
		HV_IntArg	intarg
	)

Write data to a hypervisor device asynchronously.

This service transfers data from a memory buffer to a hypervisor device. When the service returns, the write has been scheduled. When the write completes, an interrupt message will be delivered, and the buffer may be overwritten by the client; the data may not necessarily have been conveyed to the actual hardware I/O interface.

The number of possible outstanding asynchronous requests is defined by each driver, but it is recommended that it be at least two requests per tile per device.

No ordering is guaranteed between synchronous and asynchronous requests, even those issued on the same tile.

The completion interrupt message could come directly, or via the downcall (intctrl1) method, depending on what the tile is doing when the read completes. Interrupts do not coalesce; one is delivered for each asynchronous I/O request. Note that it is possible for the requested interrupt to be delivered after this service is called but before it returns.

Devices may choose to support both the synchronous and asynchronous write operations, only one of them, or neither of them.

Parameters

devhdl	Device handle of the device to be read from.
flags	Flags (HV_DEV_xxx).
sgl_len	Number of elements in the scatter-gather list.
sgl	Scatter-gather list describing the memory from which data will be read.
offset	Driver-dependent offset. For a random-access device, this is often a byte offset from the beginning of the device; in other cases, like on a control device, it may have a different meaning.
intarg	Value which will be delivered as the intarg member of the eventual interrupt message; the intdata member will be set to the normal return value from the write request.

Returns: Zero if the write was successfully scheduled; otherwise, a negative error code. Note that some drivers may choose to pre-validate their arguments, and may thus detect certain device error conditions at this time rather than when the completion notification occurs, but this is not required.

void hv_disable_intr ( HV_IntrMask disab_mask )

Disable a set of device interrupts.

Parameters

disab_mask Bitmap of interrupts to disable.

void hv_downcall_dispatch ( void )

Dispatch the next interrupt from the client downcall mechanism.

The hypervisor uses downcalls to notify the client of asynchronous events. Some of these events are hypervisor-created (like incoming messages). Some are regular interrupts which initially occur in the hypervisor, and are normally handled directly by the client; when these occur in a client's interrupt critical section, they must be delivered through the downcall mechanism.

A downcall is initially delivered to the client as an INTCTRL_CL interrupt, where CL is the client's PL. Upon entry to the INTCTRL_CL vector, the client must immediately invoke the hv_downcall_dispatch service. This service will not return; instead it will cause one of the client's actual downcall-handling interrupt vectors to be entered. The EX_CONTEXT registers in the client will be set so that when the client irets, it will return to the code which was interrupted by the INTCTRL_CL interrupt.

Under some circumstances, the firing of INTCTRL_CL can race with the lowering of a device interrupt. In such a case, the hv_downcall_dispatch service may issue an iret instruction instead of entering one of the client's actual downcall-handling interrupt vectors. This will return execution to the location that was interrupted by INTCTRL_CL.

Any saving of registers should be done by the actual handling vectors; no registers should be changed by the INTCTRL_CL handler. In particular, the client should not use a jal instruction to invoke the hv_downcall_dispatch service, as that would overwrite the client's lr register. Note that the hv_downcall_dispatch service may overwrite one or more of the client's system save registers.

The client must not modify the INTCTRL_CL_STATUS SPR. The hypervisor will set this register to cause a downcall to happen, and will clear it when no further downcalls are pending.

When a downcall vector is entered, the INTCTRL_CL interrupt will be masked. When the client is done processing a downcall, and is ready to accept another, it must unmask this interrupt; if more downcalls are pending, this will cause the INTCTRL_CL vector to be reentered. Currently the following interrupt vectors can be entered through a downcall:

INT_MESSAGE_RCV_DWNCL (hypervisor message available) INT_DEV_INTR_DWNCL (device interrupt) INT_DMATLB_MISS_DWNCL (DMA TLB miss) INT_SNITLB_MISS_DWNCL (SNI TLB miss) INT_DMATLB_ACCESS_DWNCL (DMA TLB access violation)

void hv_enable_intr ( HV_IntrMask enab_mask )

Enable a set of device interrupts.

Parameters

enab_mask Bitmap of interrupts to enable.

int hv_flush_all ( int preserve_global )

Flushes all non-global translations (if preserve_global is true), or absolutely all translations (if preserve_global is false).

Parameters

preserve_global Non-zero if we want to preserve "global" mappings.

Returns: Zero on success, or a hypervisor error code on failure.

int hv_flush_asid ( HV_ASID asid )

Flushes all translations associated with the named address space identifier from the TLB and any other hypervisor data structures. Translations installed with the "global" bit are not flushed.

Specifying an invalid ASID may lead to client termination. "Invalid" in this context means a value which was not provided to the client via hv_inquire_asid().

Parameters

asid	HV_ASID whose entries are to be flushed.

Returns: Zero on success, or a hypervisor error code on failure.

int hv_flush_page	(	HV_VirtAddr	address,
		HV_PageSize	page_size
	)

Flushes all translations associated with the named virtual address and page size from the TLB and other hypervisor data structures. Only pages visible to the current ASID are affected; note that this includes global pages in addition to pages specific to the current ASID.

The supplied VA need not be aligned; it may be anywhere in the subject page.

Specifying an invalid virtual address may lead to client termination, or may silently succeed. "Invalid" in this context means a value which was not provided to the client via hv_inquire_virtual.

Parameters

address	Address of the page to flush.
page_size	Size of pages to assume.

Returns: Zero on success, or a hypervisor error code on failure.

int hv_flush_pages	(	HV_VirtAddr	start,
		HV_PageSize	page_size,
		unsigned long	size
	)

Flushes all translations associated with the named virtual address range and page size from the TLB and other hypervisor data structures. Only pages visible to the current ASID are affected; note that this includes global pages in addition to pages specific to the current ASID.

The supplied VA need not be aligned; it may be anywhere in the subject page.

Specifying an invalid virtual address may lead to client termination, or may silently succeed. "Invalid" in this context means a value which was not provided to the client via hv_inquire_virtual.

Parameters

start	Address to flush.
page_size	Size of pages to assume.
size	The number of bytes to flush. Any page in the range [start, start + size) will be flushed from the TLB.

Returns: Zero on success, or a hypervisor error code on failure.

int hv_flush_remote	(	HV_PhysAddr	cache_pa,
		unsigned long	cache_control,
		unsigned long *	cache_cpumask,
		HV_VirtAddr	tlb_va,
		unsigned long	tlb_length,
		unsigned long	tlb_pgsize,
		unsigned long *	tlb_cpumask,
		HV_Remote_ASID *	asids,
		int	asidcount
	)

Flush cache and/or TLB state on remote tiles.

Parameters

cache_pa	Client physical address to flush from cache (ignored if the length encoded in cache_control is zero, or if HV_FLUSH_EVICT_L2 is set, or if cache_cpumask is NULL).
cache_control	This argument allows you to specify a length of physical address space to flush (maximum HV_FLUSH_MAX_CACHE_LEN). You can "or" in HV_FLUSH_EVICT_L2 to flush the whole L2 cache. You can "or" in HV_FLUSH_EVICT_L1I to flush the whole L1I cache. HV_FLUSH_ALL flushes all caches.
cache_cpumask	Bitmask (in row-major order, supervisor-relative) of tile indices to perform cache flush on. The low bit of the first word corresponds to the tile at the upper left-hand corner of the supervisor's rectangle. If passed as a NULL pointer, equivalent to an empty bitmask. On chips which support hash-for-home caching, if passed as -1, equivalent to a mask containing tiles which could be doing hash-for-home caching.
tlb_va	Virtual address to flush from TLB (ignored if tlb_length is zero or tlb_cpumask is NULL).
tlb_length	Number of bytes of data to flush from the TLB.
tlb_pgsize	Page size to use for TLB flushes. tlb_va and tlb_length need not be aligned to this size.
tlb_cpumask	Bitmask for tlb flush, like cache_cpumask. If passed as a NULL pointer, equivalent to an empty bitmask.
asids	Pointer to an HV_Remote_ASID array of tile/ASID pairs to flush.
asidcount	Number of HV_Remote_ASID entries in asids[].

Returns: Zero for success, or else HV_EINVAL or HV_EFAULT for errors that are detected while parsing the arguments.

int hv_fs_findfile ( HV_VirtAddr filename )

Requests the inode for a specific full pathname.

Performs a lookup in the hypervisor filesystem for a given filename. Multiple calls with the same filename will always return the same inode. If there is no such filename, HV_ENOENT is returned. A bad filename pointer may result in HV_EFAULT instead.

Parameters

filename Constant pointer to name of requested file

Returns: Inode of requested file

HV_FS_StatInfo hv_fs_fstat ( int inode )

Get stat information on a given file inode.

Return information on the file with the given inode.

IF the HV_FS_ISDIR bit is set, the "file" is a directory. Reading it will return NUL-separated filenames (no directory part) relative to the path to the inode of the directory "file". These can be appended to the path to the directory "file" after a forward slash to create additional filenames. Note that it is not required that all valid paths be decomposable into valid parent directories; a filesystem may validly have just a few files, none of which have HV_FS_ISDIR set. However, if clients may wish to enumerate the files in the filesystem, it is recommended to include all the appropriate parent directory "files" to give a consistent view.

An invalid file inode will cause an HV_EBADF error to be returned.

Parameters

inode The inode number of the query

Returns: An HV_FS_StatInfo structure

int hv_fs_pread	(	int	inode,
		HV_VirtAddr	buf,
		int	length,
		int	offset
	)

Read data from a specific hypervisor file. On error, may return HV_EBADF for a bad inode or HV_EFAULT for a bad buf. Reads near the end of the file will return fewer bytes than requested. Reads at or beyond the end of a file will return zero.

Parameters

inode	the hypervisor file to read
buf	the buffer to read data into
length	the number of bytes of data to read
offset	the offset into the file to read the data from

Returns: number of bytes successfully read, or an HV_Errno code

int hv_get_command_line	(	HV_VirtAddr	buf,
		int	length
	)

Get the value of the command-line for the supervisor, if any. This will not include the filename of the booted supervisor, but may include configured-in boot arguments or the hv_restart() arguments. If the buffer is not long enough the hypervisor will NUL the first character of the buffer but not write any other data.

Parameters

buf	The virtual address to write the command-line string to.
length	The length of buf, in characters.

Returns: The actual length of the command line, including the trailing NUL (may be larger than "length").

HV_RTCTime hv_get_rtc ( void )

Read the current time-of-day clock.

Returns: HV_RTCTime of current time (GMT).

void hv_halt ( void )

Halt machine.

void hv_init	(	HV_VersionNumber	interface_version_number,
		int	chip_num,
		int	chip_rev_num
	)

Initializes the hypervisor.

Parameters

interface_version_number	The version of the hypervisor interface that this program expects, typically HV_VERSION.
chip_num	Architecture number of the chip the client was built for.
chip_rev_num	Revision number of the chip the client was built for.

HV_ASIDRange hv_inquire_asid ( int idx )

Returns information about a range of ASIDs.

hv_inquire_asid() returns one of the ranges of address space identifiers which are available to this client.

The first range is retrieved by specifying an idx of 0, and successive ranges are returned with subsequent idx values. Ranges are ordered by increasing start value (i.e., as idx increases, so does start), do not overlap, and do not touch (i.e., the available ASIDs are described with the fewest possible ranges).

If an out-of-range idx value is specified, the returned size will be zero. A client can count the number of ranges by increasing idx until the returned size is zero. There will always be at least one valid range.

HV_Context hv_inquire_context ( void )

Retrieve information about the currently installed context.

Returns: The data passed to the last successful hv_install_context call.

HV_MemoryControllerInfo hv_inquire_memory_controller	(	HV_Coord	coord,
		int	controller
	)

Returns information about a particular memory controller.

hv_inquire_memory_controller(coord,idx) returns information about a particular controller. Two pieces of information are returned:

The relative coordinates of the port on the controller that the specified tile would use to contact it. The relative coordinates may lie outside the supervisor's rectangle, i.e. the controller may not be attached to a node managed by the querying node's supervisor. In particular note that x or y may be negative.
The speed of the memory controller. (This is a not-to-exceed value based on the raw hardware data rate, and may not be achievable in practice; it is provided to give clients information on the relative performance of the available controllers.)

Clients should avoid calling this interface with invalid values. A client who does may be terminated.

Parameters

coord	Tile for which to calculate the relative port position.
controller	Index of the controller; identical to value returned from other routines like hv_inquire_physical.

Returns: Information about the controller.

HV_PhysAddrRange hv_inquire_physical ( int idx )

Returns information about a range of physical memory.

hv_inquire_physical() returns one of the ranges of client physical addresses which are available to this client.

The first range is retrieved by specifying an idx of 0, and successive ranges are returned with subsequent idx values. Ranges are ordered by increasing start address (i.e., as idx increases, so does start), do not overlap, and do not touch (i.e., the available memory is described with the fewest possible ranges).

If an out-of-range idx value is specified, the returned size will be zero. A client can count the number of ranges by increasing idx until the returned size is zero. There will always be at least one valid range.

Some clients might not be prepared to deal with more than one physical address range; they still ought to call this routine and issue a warning message if they're given more than one range, on the theory that whoever configured the hypervisor to provide that memory should know that it's being wasted.

HV_PhysAddr hv_inquire_realpa	(	HV_PhysAddr	cpa,
		unsigned int	len
	)

Given a client PA and a length, return its real (HV) PA.

Parameters

cpa	Client physical address.
len	Length of mapped memory.

Returns: physical address, or -1 if cpa or len is not valid.

HV_Errno hv_inquire_tiles	(	HV_InqTileSet	set,
		HV_VirtAddr	cpumask,
		int	length
	)

Returns specific information about various sets of tiles within the supervisor's tile rectangle.

Parameters

set	Which set of tiles to retrieve.
cpumask	Pointer to a returned bitmask (in row-major order, supervisor-relative) of tiles. The low bit of the first word corresponds to the tile at the upper left-hand corner of the supervisor's rectangle. In order for the supervisor to know the buffer length to supply, it should first call hv_inquire_topology.
length	Number of bytes available for the returned bitmask.

HV_Topology hv_inquire_topology ( void )

Returns information about the tile coordinate system.

Each supervisor is given a rectangle of tiles it potentially controls. These tiles are labeled using a relative coordinate system with (0,0) as the upper left tile regardless of their physical location on the chip.

This call returns both the size of that rectangle and the position within that rectangle of the querying tile.

Not all tiles within that rectangle may be available to the supervisor; to get the precise set of available tiles, you must also call hv_inquire_tiles(HV_INQ_TILES_AVAIL, ...).

HV_VirtAddrRange hv_inquire_virtual ( int idx )

Returns information about a range of virtual memory.

hv_inquire_virtual() returns one of the ranges of client virtual addresses which are available to this client.

The first range is retrieved by specifying an idx of 0, and successive ranges are returned with subsequent idx values. Ranges are ordered by increasing start address (i.e., as idx increases, so does start), do not overlap, and do not touch (i.e., the available memory is described with the fewest possible ranges).

If an out-of-range idx value is specified, the returned size will be zero. A client can count the number of ranges by increasing idx until the returned size is zero. There will always be at least one valid range.

Some clients may well have various virtual addresses hardwired into themselves; for instance, their instruction stream may have been compiled expecting to live at a particular address. Such clients should use this interface to verify they've been given the virtual address space they expect, and issue a (potentially fatal) warning message otherwise.

Note that the returned size is a __hv64, not a __hv32, so it is possible to express a single range spanning the entire 32-bit address space.

int hv_install_context	(	HV_PhysAddr	page_table,
		HV_PTE	access,
		HV_ASID	asid,
		__hv32	flags
	)

Installs a context, comprising a page table and other attributes.

Once this service completes, page_table will be used to translate subsequent virtual address references to physical memory.

Installing a context does not cause an implicit TLB flush. Before reusing an ASID value for a different address space, the client is expected to flush old references from the TLB with hv_flush_asid(). (Alternately, hv_flush_all() may be used to flush many ASIDs at once.) After invalidating a page table entry, changing its attributes, or changing its target CPA, the client is expected to flush old references from the TLB with hv_flush_page() or hv_flush_pages(). Making a previously invalid page valid does not require a flush.

Specifying an invalid ASID, or an invalid CPA (client physical address) (either as page_table_pointer, or within the referenced table), or another page table data item documented as above as illegal may lead to client termination; since the validation of the table is done as needed, this may happen before the service returns, or at some later time, or never, depending upon the client's pattern of memory references. Page table entries which supply translations for invalid virtual addresses may result in client termination, or may be silently ignored. "Invalid" in this context means a value which was not provided to the client via the appropriate hv_inquire_* routine.

To support changing the instruction VAs at the same time as installing the new page table, this call explicitly supports setting the "lr" register to a different address and then jumping directly to the hv_install_context() routine. In this case, the new page table does not need to contain any mapping for the hv_install_context address itself.

At most one HV_CTX_PG_SM_* flag may be specified in "flags"; if multiple flags are specified, HV_EINVAL is returned. Specifying none of the flags results in using the default page size. All cores participating in a given client must request the same page size, or the results are undefined.

Parameters

page_table	Root of the page table.
access	PTE providing info on how to read the page table. This value must be consistent between multiple tiles sharing a page table, and must also be consistent with any virtual mappings the client may be using to access the page table.
asid	HV_ASID the page table is to be used for.
flags	Context flags, denoting attributes or privileges of the current context (HV_CTX_xxx).

Returns: Zero on success, or a hypervisor error code on failure.

void hv_nanosleep ( int nanosecs )

Waits for at least the specified number of nanoseconds then returns.

NOTE: this deprecated function currently assumes a 750 MHz clock, and is thus not generally suitable for use. New code should call hv_sysconf(HV_SYSCONF_CPU_SPEED), compute a cycle count to wait for, and delay by looping while checking the cycle counter SPR.

Parameters

nanosecs The number of nanoseconds to sleep.

unsigned long long hv_physaddr_read64	(	HV_PhysAddr	addr,
		HV_PTE	access
	)

Read a 64-bit word from the specified physical address. The address must be 8-byte aligned. Specifying an invalid physical address will lead to client termination.

Parameters

addr	The physical address to read
access	The PTE describing how to read the memory

Returns: The 64-bit value read from the given address

void hv_physaddr_write64	(	HV_PhysAddr	addr,
		HV_PTE	access,
		unsigned long long	val
	)

Write a 64-bit word to the specified physical address. The address must be 8-byte aligned. Specifying an invalid physical address will lead to client termination.

Parameters

addr	The physical address to write
access	The PTE that says how to write the memory
val	The 64-bit value to write to the given address

void hv_power_off ( void )

Power off machine.

void hv_raise_intr ( HV_IntrMask raise_mask )

Raise a set of device interrupts.

Parameters

raise_mask Bitmap of interrupts to raise.

HV_RcvMsgInfo hv_receive_message	(	HV_MsgState	msgstate,
		HV_VirtAddr	buf,
		int	buflen
	)

Receive a message.

This routine retrieves a message from the client's incoming message buffer.

Multiple messages sent from a particular sending tile to a particular receiving tile are received in the order that they were sent; however, no ordering is guaranteed between messages sent by different tiles.

Whenever the a client's message buffer is empty, the first message subsequently received will cause the client's MESSAGE_RCV_DWNCL interrupt vector to be invoked through the interrupt downcall mechanism (see the description of the hv_downcall_dispatch() routine for details on downcalls).

Another message-available downcall will not occur until a call to this routine is made when the message buffer is empty, and a message subsequently arrives. Note that such a downcall could occur while this routine is executing. If the calling code does not wish this to happen, it is recommended that this routine be called with the INTCTRL_1 interrupt masked, or inside an interrupt critical section.

msgstate is the value previously passed to hv_register_message_state(). buf is the virtual address of the buffer into which the message will be written; buflen is the length of the buffer.

This routine returns an HV_RcvMsgInfo structure. The msglen member of that structure is the length of the message received, zero if no message is available, or HV_E2BIG if the message is too large for the specified buffer. If the message is too large, it is not consumed, and may be retrieved by a subsequent call to this routine specifying a sufficiently large buffer. A buffer which is HV_MAX_MESSAGE_SIZE bytes long is guaranteed to be able to receive any possible message.

The source member of the HV_RcvMsgInfo structure describes the sender of the message. For messages sent by another client tile via an hv_send_message() call, this value is HV_MSG_TILE; for messages sent as a result of a device interrupt, this value is HV_MSG_INTR.

int hv_reexec ( HV_PhysAddr entry )

Re-enter virtual-is-physical memory translation mode and restart execution at a given address.

Parameters

entry Client physical address at which to begin execution.

Returns: A hypervisor error code on failure; if the operation is successful the call does not return.

HV_Errno hv_register_message_state ( HV_MsgState * msgstate )

Register to receive incoming messages.

This routine configures the current tile so that it can receive incoming messages. It must be called before the client can receive messages with the hv_receive_message routine, and must be called on each tile which will receive messages.

msgstate is the virtual address of a state object of type HV_MsgState. Once the state is registered, the client must not read or write the state object; doing so will cause undefined results.

If this routine is called with msgstate set to 0, the client's message state will be freed and it will no longer be able to receive messages. Note that this may cause the loss of any as-yet-undelivered messages for the client.

If another client attempts to send a message to a client which has not yet called hv_register_message_state, or which has freed its message state, the message will not be delivered, as if the client had insufficient buffering.

This routine returns HV_OK if the registration was successful, and HV_EINVAL if the supplied state object is unsuitable. Note that some errors may not be detected during this routine, but might be detected during a subsequent message delivery.

Parameters

msgstate State object.

void hv_restart	(	HV_VirtAddr	cmd,
		HV_VirtAddr	args
	)

Restart machine with optional restart command and optional args.

Parameters

cmd	Const pointer to command to restart with, or NULL
args	Const pointer to argument string to restart with, or NULL

int hv_send_message	(	HV_Recipient *	recips,
		int	nrecip,
		HV_VirtAddr	buf,
		int	buflen
	)

Send a message to a set of recipients.

This routine sends a message to a set of recipients.

recips is an array of HV_Recipient structures. Each specifies a tile, and a message state; initially, it is expected that the state will be set to HV_TO_BE_SENT. nrecip specifies the number of recipients in the recips array.

For each recipient whose state is HV_TO_BE_SENT, the hypervisor attempts to send that tile the specified message. In order to successfully receive the message, the receiver must be a valid tile to which the sender has access, must not be the sending tile itself, and must have sufficient free buffer space. (The hypervisor guarantees that each tile which has called hv_register_message_state() will be able to buffer one message from every other tile which can legally send to it; more space may be provided but is not guaranteed.) If an invalid tile is specified, the recipient's state is set to HV_BAD_RECIP; this is a permanent delivery error. If the message is successfully delivered to the recipient's buffer, the recipient's state is set to HV_SENT. Otherwise, the recipient's state is unchanged. Message delivery is synchronous; all attempts to send messages are completed before this routine returns.

If no permanent delivery errors were encountered, the routine returns the number of messages successfully sent: that is, the number of recipients whose states changed from HV_TO_BE_SENT to HV_SENT during this operation. If any permanent delivery errors were encountered, the routine returns HV_ERECIP. In the event of permanent delivery errors, it may be the case that delivery was not attempted to all recipients; if any messages were successfully delivered, however, recipients' state values will be updated appropriately.

It is explicitly legal to specify a recipient structure whose state is not HV_TO_BE_SENT; such a recipient is ignored. One suggested way of using hv_send_message to send a message to multiple tiles is to set up a list of recipients, and then call the routine repeatedly with the same list, each time accumulating the number of messages successfully sent, until all messages are sent, a permanent error is encountered, or the desired number of attempts have been made. When used in this way, the routine will deliver each message no more than once to each recipient.

Note that a message being successfully delivered to the recipient's buffer space does not guarantee that it is received by the recipient, either immediately or at any time in the future; the recipient might never call hv_receive_message, or could register a different state buffer, losing the message.

Specifying the same recipient more than once in the recipient list is an error, which will not result in an error return but which may or may not result in more than one message being delivered to the recipient tile.

buf and buflen specify the message to be sent. buf is a virtual address which must be currently mapped in the client's page table; if not, the routine returns HV_EFAULT. buflen must be greater than zero and less than or equal to HV_MAX_MESSAGE_SIZE, and nrecip must be less than the number of tiles to which the sender has access; if not, the routine returns HV_EINVAL.

Parameters

recips	List of recipients.
nrecip	Number of recipients.
buf	Address of message data.
buflen	Length of message data.

void hv_set_caching ( unsigned long bitmask )

Tell the hypervisor how to cache non-priority pages (its own as well as pages explicitly represented in page tables). Normally these will be represented as red/black pages, but when the supervisor starts to allocate "priority" pages in the PTE the hypervisor will need to start marking those pages as (e.g.) "red" and non-priority pages as either "black" (if they cache-alias with the existing priority pages) or "red/black" (if they don't). The bitmask provides information on which parts of the cache have been used for pinned pages so far on this tile; if (1 << N) appears in the bitmask, that indicates that a 4KB region of the cache starting at (N * 4KB) is in use by a "priority" page. The portion of cache used by a particular page can be computed by taking the page's PA, modulo CHIP_L2_CACHE_SIZE(), and setting all the "4KB" bits corresponding to the actual page size.

Parameters

bitmask A bitmap of priority page set values

HV_Errno hv_set_command_line	(	HV_VirtAddr	buf,
		int	length
	)

Set a new value for the command-line for the supervisor, which will be returned from subsequent invocations of hv_get_command_line() on this tile.

Parameters

buf	The virtual address to read the command-line string from.
length	The length of buf, in characters; must be no more than HV_COMMAND_LINE_LEN.

Returns: Zero if successful, or a hypervisor error code.

int hv_set_pte_super_shift	(	int	level,
		int	log2_count
	)

Set the number of pages ganged together by HV_PTE_SUPER at a particular level of the page table.

The current TILE-Gx hardware only supports powers of four (i.e. log2_count must be a multiple of two), and the requested "super" page size must be less than the span of the next level in the page table. The largest size that can be requested is 64GB.

The shift value is initially "0" for all page table levels, indicating that the HV_PTE_SUPER bit is effectively ignored.

If you change the count from one non-zero value to another, the hypervisor will flush the entire TLB and TSB to avoid confusion.

Parameters

level	Page table level (0, 1, or 2)
log2_count	Base-2 log of the number of pages to gang together, i.e. how much to shift left the base page size for the super page size.

Returns: Zero on success, or a hypervisor error code on failure.

void hv_set_rtc ( HV_RTCTime time )

Set the current time-of-day clock.

Parameters

time	time to reset time-of-day to (GMT).

void hv_start_all_tiles ( void )

Start remaining tiles owned by this supervisor. Initially, only one tile executes the client program; after it calls this service, the other tiles are started. This allows the initial tile to do one-time configuration of shared data structures without having to lock them against simultaneous access.

int hv_store_mapping	(	HV_VirtAddr	va,
		unsigned int	len,
		HV_PhysAddr	pa
	)

Store memory mapping in debug memory so that external debugger can read it. A maximum of 16 entries can be stored.

Parameters

va	VA of memory that is mapped.
len	Length of mapped memory.
pa	PA of memory that is mapped.

Returns: 0 on success, -1 if the maximum number of mappings is exceeded.

long hv_sysconf ( HV_SysconfQuery query )

Query a configuration value from the hypervisor.

Parameters

query Which value is requested (HV_SYSCONF_xxx).

Returns: The requested value, or -1 the requested value is illegal or unavailable.

HV_Errno hv_trigger_ipi	(	HV_Coord	tile,
		int	interrupt
	)

Trigger a one-shot interrupt on some tile

Parameters

tile	Which tile to interrupt.
interrupt	Interrupt number to trigger; must be between 0 and HV_MAX_IPI_INTERRUPT.

Returns: HV_OK on success, or a hypervisor error code.

Variable Documentation

HV_SGL

Definition at line 1749 of file hypervisor.h.

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