#include <mpipe_shm.h>

Data Fields
struct {
uint_reg_t notif_ring: 8

uint_reg_t channel: 5

uint_reg_t __reserved_0: 1

uint_reg_t me: 1

uint_reg_t tr: 1

uint_reg_t l2_size: 14

uint_reg_t ce: 1

uint_reg_t ct: 1

uint_reg_t bucket_id: 13

uint_reg_t __reserved_1: 3

uint_reg_t cs: 1

uint_reg_t nr: 1

uint_reg_t dest: 2

uint_reg_t sq: 1

uint_reg_t ts: 1

uint_reg_t ps: 1

uint_reg_t be: 1

uint_reg_t ctr0: 5

uint_reg_t __reserved_2: 3

uint_reg_t ctr1: 5

uint_reg_t __reserved_3: 3

uint_reg_t csum_start: 8

uint_reg_t csum_seed_val: 16

uint_reg_t custom0: 32

uint_reg_t custom1: 64

uint_reg_t custom2: 64

uint_reg_t custom3: 64

uint_reg_t gp_sqn: 16

uint_reg_t packet_sqn: 48

uint_reg_t time_stamp_ns: 32

uint_reg_t time_stamp_sec: 32

int_reg_t va: 42

uint_reg_t __reserved_4: 6

uint_reg_t stack_idx: 5

uint_reg_t __reserved_5: 3

uint_reg_t inst: 1

uint_reg_t __reserved_6: 1

uint_reg_t hwb: 1

uint_reg_t size: 3

uint_reg_t c: 2

};

uint_reg_t	words [8]

Detailed Description

MPIPE Packet Descriptor. The packet descriptor is filled by the mPIPE's classification, load-balancing, and buffer management services. Some fields are consumed by mPIPE hardware, and others are consumed by Tile software.

Definition at line 191 of file mpipe_shm.h.

Field Documentation

struct { ... }

uint_reg_t __reserved_0

Reserved.

Definition at line 207 of file mpipe_shm.h.

uint_reg_t __reserved_1

Reserved.

Definition at line 249 of file mpipe_shm.h.

uint_reg_t __reserved_2

Reserved.

Definition at line 305 of file mpipe_shm.h.

uint_reg_t __reserved_3

Reserved.

Definition at line 337 of file mpipe_shm.h.

uint_reg_t __reserved_4

Reserved.

Definition at line 448 of file mpipe_shm.h.

uint_reg_t __reserved_5

Reserved.

Definition at line 452 of file mpipe_shm.h.

uint_reg_t __reserved_6

Reserved.

Definition at line 461 of file mpipe_shm.h.

uint_reg_t be

Buffer Error. Written by the iDMA hardware. Asserted if iDMA ran out of buffers while writing the packet. Software must still return any buffer descriptors whose C field indicates a valid descriptor was consumed.

Definition at line 298 of file mpipe_shm.h.

uint_reg_t bucket_id

Written by the classification program. Used by the load balancer to select the ring into which this packet descriptor is written.

Definition at line 247 of file mpipe_shm.h.

uint_reg_t c

Chaining configuration for the buffer. Indicates that an ingress packet or egress command is chained across multiple buffers, with each buffer's size indicated by the .size field.

Definition at line 489 of file mpipe_shm.h.

uint_reg_t ce

CRC Error. Generated by the MAC. Asserted if MAC indicated an L2 CRC error or other L2 error (bad length etc.) on the packet.

Definition at line 235 of file mpipe_shm.h.

uint_reg_t channel

Source channel for this packet. Written by mPIPE DMA hardware.

Definition at line 205 of file mpipe_shm.h.

uint_reg_t cs

Checksum. Written by classification program. When 1, the checksum engine will perform checksum based on the CSUM_SEED, CSUM_START, and CSUM_BYTES fields. The result will be placed in CSUM_VAL.

Definition at line 256 of file mpipe_shm.h.

uint_reg_t csum_seed_val

Checksum seed written by classification program. Overwritten with resultant checksum if CS bit is asserted. The endianness of the CSUM value bits when viewed by Tile software match the packet byte order. That is, bits[7:0] of the resulting checksum value correspond to earlier (more significant) bytes in the packet. To avoid classifier software from having to byte swap the CSUM_SEED, the iDMA checksum engine byte swaps the classifier's result before seeding the checksum calculation. Thus, the CSUM_START byte of packet data is added to bits[15:8] of the CSUM_SEED field generated by the classifier. This byte swap will be visible to Tile software if the CS bit is clear.

Definition at line 355 of file mpipe_shm.h.

uint_reg_t csum_start

Written by classification program. Indicates the start byte for checksum. Relative to 1st byte received from MAC.

Definition at line 342 of file mpipe_shm.h.

uint_reg_t ct

Cut Through. Written by the iDMA hardware. Asserted if packet was not completely received before being sent to classifier. L2_Size will indicate number of bytes received so far.

Definition at line 242 of file mpipe_shm.h.

uint_reg_t ctr0

Written by the classification program. The associated counter is incremented when the packet is sent.

Definition at line 303 of file mpipe_shm.h.

uint_reg_t ctr1

Written by the classification program. The associated counter is incremented when the packet is sent.

Definition at line 335 of file mpipe_shm.h.

uint_reg_t custom0

Written by the classification program. Not interpreted by mPIPE hardware.

Definition at line 360 of file mpipe_shm.h.

uint_reg_t custom1

Written by the classification program. Not interpreted by mPIPE hardware.

Definition at line 376 of file mpipe_shm.h.

uint_reg_t custom2

Written by the classification program. Not interpreted by mPIPE hardware.

Definition at line 388 of file mpipe_shm.h.

uint_reg_t custom3

Written by the classification program. Not interpreted by mPIPE hardware.

Definition at line 400 of file mpipe_shm.h.

uint_reg_t dest

Written by classification program. Indicates whether packet and descriptor should both be dropped, both be delivered, or only the descriptor should be delivered.

Definition at line 268 of file mpipe_shm.h.

uint_reg_t gp_sqn

Sequence number applied when packet is distributed. Classifier selects which sequence number is to be applied by writing the 13-bit SQN-selector into this field.

Definition at line 413 of file mpipe_shm.h.

uint_reg_t hwb

Always set to one by hardware in iDMA packet descriptors. For eDMA, indicates whether the buffer will be released to the buffer stack manager. When 0, software is responsible for releasing the buffer.

Definition at line 467 of file mpipe_shm.h.

uint_reg_t inst

Instance ID. For devices that support more than one mPIPE instance, this field indicates the buffer owner. If the INST field does not match the mPIPE's instance number when a packet is egressed, buffers with HWB set will be returned to the other mPIPE instance.

Definition at line 459 of file mpipe_shm.h.

uint_reg_t l2_size

Written by the iDMA hardware. Indicates the number of bytes written to Tile memory. In general, this is the actual size of the packet as received from the MAC. But if the packet is truncated due to running out of buffers or due to the iPkt buffer filling up, then the L2_SIZE will be reduced to reflect the actual number of valid bytes written to Tile memory.

Definition at line 229 of file mpipe_shm.h.

uint_reg_t me

MAC Error. Generated by the MAC interface. Asserted if there was an overrun of the MAC's receive FIFO. This condition generally only occurs if the mPIPE clock is running too slowly.

Definition at line 214 of file mpipe_shm.h.

uint_reg_t notif_ring

Notification ring into which this packet descriptor is written. Typically written by load balancer, but can be overridden by classification program if NR is asserted.

Definition at line 203 of file mpipe_shm.h.

uint_reg_t nr

Notification Ring Select. Written by the classification program. When 1, the NotifRingIDX is set by classification program rather than being set by load balancer.

Definition at line 262 of file mpipe_shm.h.

uint_reg_t packet_sqn

Written by notification hardware. The packet sequence number is incremented for each packet that wasn't dropped.

Definition at line 418 of file mpipe_shm.h.

uint_reg_t ps

Packet Sequence Number Enable. Enable PacketSQN insertion. When clear, PacketSQN field may be filled with custom data by classifier. When set, hardware inserts the packet sequence number when the packet descriptor is written to a notification ring.

Definition at line 291 of file mpipe_shm.h.

uint_reg_t size

Encoded size of buffer. Set by the ingress hardware for iDMA packet descriptors. For eDMA descriptors, indicates the buffer size if .c indicates a chained packet. If an eDMA descriptor is not chained and the .hwb bit is not set, this field is ignored and the size is specified by the .xfer_size field. 0 = 128 bytes 1 = 256 bytes 2 = 512 bytes 3 = 1024 bytes 4 = 1664 bytes 5 = 4096 bytes 6 = 10368 bytes 7 = 16384 bytes

Definition at line 483 of file mpipe_shm.h.

uint_reg_t sq

General Purpose Sequence Number Enable. Written by the classification program. When 1, the GP_SQN_SEL field contains the sequence number selector and the GP_SQN field will be replaced with the associated sequence number. When clear, the GP_SQN field is left intact and be used as "Custom" bytes.

Definition at line 276 of file mpipe_shm.h.

uint_reg_t stack_idx

Index of the buffer stack to which this buffer belongs.

Definition at line 450 of file mpipe_shm.h.

uint_reg_t time_stamp_ns

Written by hardware when the start-of-packet is received by the mPIPE from the MAC. This is the nanoseconds part of the packet timestamp.

Definition at line 431 of file mpipe_shm.h.

uint_reg_t time_stamp_sec

Written by hardware when the start-of-packet is received by the mPIPE from the MAC. This is the seconds part of the packet timestamp.

Definition at line 436 of file mpipe_shm.h.

uint_reg_t tr

Truncation Error. Written by the iDMA hardware. Asserted if packet was truncated due to insufficient space in iPkt buffer

Definition at line 220 of file mpipe_shm.h.

uint_reg_t ts

TimeStamp Enable. Enable TimeStamp insertion. When clear, timestamp field may be filled with custom data by classifier. When set, hardware inserts the timestamp when the start of packet is received from the MAC.

Definition at line 283 of file mpipe_shm.h.

int_reg_t va

Virtual address. Must be sign extended by consumer.

Definition at line 446 of file mpipe_shm.h.

uint_reg_t words[8]

Word access

Definition at line 505 of file mpipe_shm.h.

The documentation for this union was generated from the following file:

arch/tile/include/arch/mpipe_shm.h

Data Fields

Detailed Description

Field Documentation