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ohci.h File Reference

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Data Structures

struct  ed
 
struct  td
 
struct  ohci_hcca
 
struct  ohci_regs
 
struct  ohci_regs::ohci_roothub_regs
 
struct  ohci_roothub_regs
 
struct  urb_priv
 
struct  ohci_hcd
 

Macros

#define ED_DEQUEUE   (1 << 27)
 
#define ED_ISO   (1 << 15)
 
#define ED_SKIP   (1 << 14)
 
#define ED_LOWSPEED   (1 << 13)
 
#define ED_OUT   (0x01 << 11)
 
#define ED_IN   (0x02 << 11)
 
#define ED_C   (0x02) /* toggle carry */
 
#define ED_H   (0x01) /* halted */
 
#define ED_IDLE   0x00 /* NOT linked to HC */
 
#define ED_UNLINK   0x01 /* being unlinked from hc */
 
#define ED_OPER   0x02 /* IS linked to hc */
 
#define ED_MASK   ((u32)~0x0f) /* strip hw status in low addr bits */
 
#define TD_CC   0xf0000000 /* condition code */
 
#define TD_CC_GET(td_p)   ((td_p >>28) & 0x0f)
 
#define TD_DI   0x00E00000 /* frames before interrupt */
 
#define TD_DI_SET(X)   (((X) & 0x07)<< 21)
 
#define TD_DONE   0x00020000 /* retired to donelist */
 
#define TD_ISO   0x00010000 /* copy of ED_ISO */
 
#define TD_EC   0x0C000000 /* error count */
 
#define TD_T   0x03000000 /* data toggle state */
 
#define TD_T_DATA0   0x02000000 /* DATA0 */
 
#define TD_T_DATA1   0x03000000 /* DATA1 */
 
#define TD_T_TOGGLE   0x00000000 /* uses ED_C */
 
#define TD_DP   0x00180000 /* direction/pid */
 
#define TD_DP_SETUP   0x00000000 /* SETUP pid */
 
#define TD_DP_IN   0x00100000 /* IN pid */
 
#define TD_DP_OUT   0x00080000 /* OUT pid */
 
#define TD_R   0x00040000 /* round: short packets OK? */
 
#define MAXPSW   2
 
#define TD_MASK   ((u32)~0x1f) /* strip hw status in low addr bits */
 
#define TD_CC_NOERROR   0x00
 
#define TD_CC_CRC   0x01
 
#define TD_CC_BITSTUFFING   0x02
 
#define TD_CC_DATATOGGLEM   0x03
 
#define TD_CC_STALL   0x04
 
#define TD_DEVNOTRESP   0x05
 
#define TD_PIDCHECKFAIL   0x06
 
#define TD_UNEXPECTEDPID   0x07
 
#define TD_DATAOVERRUN   0x08
 
#define TD_DATAUNDERRUN   0x09
 
#define TD_BUFFEROVERRUN   0x0C
 
#define TD_BUFFERUNDERRUN   0x0D
 
#define TD_NOTACCESSED   0x0F
 
#define NUM_INTS   32
 
#define MAX_ROOT_PORTS   15 /* maximum OHCI root hub ports (RH_A_NDP) */
 
#define OHCI_CTRL_CBSR   (3 << 0) /* control/bulk service ratio */
 
#define OHCI_CTRL_PLE   (1 << 2) /* periodic list enable */
 
#define OHCI_CTRL_IE   (1 << 3) /* isochronous enable */
 
#define OHCI_CTRL_CLE   (1 << 4) /* control list enable */
 
#define OHCI_CTRL_BLE   (1 << 5) /* bulk list enable */
 
#define OHCI_CTRL_HCFS   (3 << 6) /* host controller functional state */
 
#define OHCI_CTRL_IR   (1 << 8) /* interrupt routing */
 
#define OHCI_CTRL_RWC   (1 << 9) /* remote wakeup connected */
 
#define OHCI_CTRL_RWE   (1 << 10) /* remote wakeup enable */
 
#define OHCI_USB_RESET   (0 << 6)
 
#define OHCI_USB_RESUME   (1 << 6)
 
#define OHCI_USB_OPER   (2 << 6)
 
#define OHCI_USB_SUSPEND   (3 << 6)
 
#define OHCI_HCR   (1 << 0) /* host controller reset */
 
#define OHCI_CLF   (1 << 1) /* control list filled */
 
#define OHCI_BLF   (1 << 2) /* bulk list filled */
 
#define OHCI_OCR   (1 << 3) /* ownership change request */
 
#define OHCI_SOC   (3 << 16) /* scheduling overrun count */
 
#define OHCI_INTR_SO   (1 << 0) /* scheduling overrun */
 
#define OHCI_INTR_WDH   (1 << 1) /* writeback of done_head */
 
#define OHCI_INTR_SF   (1 << 2) /* start frame */
 
#define OHCI_INTR_RD   (1 << 3) /* resume detect */
 
#define OHCI_INTR_UE   (1 << 4) /* unrecoverable error */
 
#define OHCI_INTR_FNO   (1 << 5) /* frame number overflow */
 
#define OHCI_INTR_RHSC   (1 << 6) /* root hub status change */
 
#define OHCI_INTR_OC   (1 << 30) /* ownership change */
 
#define OHCI_INTR_MIE   (1 << 31) /* master interrupt enable */
 
#define RH_PS_CCS   0x00000001 /* current connect status */
 
#define RH_PS_PES   0x00000002 /* port enable status*/
 
#define RH_PS_PSS   0x00000004 /* port suspend status */
 
#define RH_PS_POCI   0x00000008 /* port over current indicator */
 
#define RH_PS_PRS   0x00000010 /* port reset status */
 
#define RH_PS_PPS   0x00000100 /* port power status */
 
#define RH_PS_LSDA   0x00000200 /* low speed device attached */
 
#define RH_PS_CSC   0x00010000 /* connect status change */
 
#define RH_PS_PESC   0x00020000 /* port enable status change */
 
#define RH_PS_PSSC   0x00040000 /* port suspend status change */
 
#define RH_PS_OCIC   0x00080000 /* over current indicator change */
 
#define RH_PS_PRSC   0x00100000 /* port reset status change */
 
#define RH_HS_LPS   0x00000001 /* local power status */
 
#define RH_HS_OCI   0x00000002 /* over current indicator */
 
#define RH_HS_DRWE   0x00008000 /* device remote wakeup enable */
 
#define RH_HS_LPSC   0x00010000 /* local power status change */
 
#define RH_HS_OCIC   0x00020000 /* over current indicator change */
 
#define RH_HS_CRWE   0x80000000 /* clear remote wakeup enable */
 
#define RH_B_DR   0x0000ffff /* device removable flags */
 
#define RH_B_PPCM   0xffff0000 /* port power control mask */
 
#define RH_A_NDP   (0xff << 0) /* number of downstream ports */
 
#define RH_A_PSM   (1 << 8) /* power switching mode */
 
#define RH_A_NPS   (1 << 9) /* no power switching */
 
#define RH_A_DT   (1 << 10) /* device type (mbz) */
 
#define RH_A_OCPM   (1 << 11) /* over current protection mode */
 
#define RH_A_NOCP   (1 << 12) /* no over current protection */
 
#define RH_A_POTPGT   (0xff << 24) /* power on to power good time */
 
#define TD_HASH_SIZE   64 /* power'o'two */
 
#define TD_HASH_FUNC(td_dma)   ((td_dma ^ (td_dma >> 6)) % TD_HASH_SIZE)
 
#define OHCI_QUIRK_AMD756   0x01 /* erratum #4 */
 
#define OHCI_QUIRK_SUPERIO   0x02 /* natsemi */
 
#define OHCI_QUIRK_INITRESET   0x04 /* SiS, OPTi, ... */
 
#define OHCI_QUIRK_BE_DESC   0x08 /* BE descriptors */
 
#define OHCI_QUIRK_BE_MMIO   0x10 /* BE registers */
 
#define OHCI_QUIRK_ZFMICRO   0x20 /* Compaq ZFMicro chipset*/
 
#define OHCI_QUIRK_NEC   0x40 /* lost interrupts */
 
#define OHCI_QUIRK_FRAME_NO   0x80 /* no big endian frame_no shift */
 
#define OHCI_QUIRK_HUB_POWER   0x100 /* distrust firmware power/oc setup */
 
#define OHCI_QUIRK_AMD_PLL   0x200 /* AMD PLL quirk*/
 
#define OHCI_QUIRK_AMD_PREFETCH   0x400 /* pre-fetch for ISO transfer */
 
#define STUB_DEBUG_FILES
 
#define ohci_dbg(ohci, fmt, args...)   dev_dbg (ohci_to_hcd(ohci)->self.controller , fmt , ## args )
 
#define ohci_err(ohci, fmt, args...)   dev_err (ohci_to_hcd(ohci)->self.controller , fmt , ## args )
 
#define ohci_info(ohci, fmt, args...)   dev_info (ohci_to_hcd(ohci)->self.controller , fmt , ## args )
 
#define ohci_warn(ohci, fmt, args...)   dev_warn (ohci_to_hcd(ohci)->self.controller , fmt , ## args )
 
#define ohci_vdbg(ohci, fmt, args...)   do { } while (0)
 
#define big_endian_desc(ohci)   0 /* only little endian */
 
#define big_endian_mmio(ohci)   0 /* only little endian */
 
#define ohci_readl(o, r)   _ohci_readl(o,r)
 
#define ohci_writel(o, v, r)   _ohci_writel(o,v,r)
 
#define big_endian_frame_no_quirk(ohci)   0
 
#define FI   0x2edf /* 12000 bits per frame (-1) */
 
#define FSMP(fi)   (0x7fff & ((6 * ((fi) - 210)) / 7))
 
#define FIT   (1 << 31)
 
#define LSTHRESH   0x628 /* lowspeed bit threshold */
 
#define read_roothub(hc, register, mask)
 

Typedefs

typedef __u32 __bitwise __hc32
 
typedef __u16 __bitwise __hc16
 
typedef struct urb_priv urb_priv_t
 

Enumerations

enum  ohci_rh_state { OHCI_RH_HALTED, OHCI_RH_SUSPENDED, OHCI_RH_RUNNING }
 

Functions

struct ed __attribute__ ((aligned(16)))
 
struct td __attribute__ ((aligned(32)))
 
struct ohci_hcca __attribute__ ((aligned(256)))
 

Variables

__hc32 hwINFO
 
__hc32 hwTailP
 
__hc32 hwHeadP
 
__hc32 hwNextED
 
dma_addr_t dma
 
struct tddummy
 
struct eded_next
 
struct eded_prev
 
struct list_head td_list
 
u8 state
 
u8 type
 
u8 branch
 
u16 interval
 
u16 load
 
u16 last_iso
 
u16 tick
 
__hc32 hwCBP
 
__hc32 hwNextTD
 
__hc32 hwBE
 
__hc16 hwPSW [MAXPSW]
 
__u8 index
 
struct eded
 
struct tdtd_hash
 
struct tdnext_dl_td
 
struct urb * urb
 
dma_addr_t td_dma
 
dma_addr_t data_dma
 
__hc32 int_table [NUM_INTS]
 
__hc32 frame_no
 
__hc32 done_head
 
u8 reserved_for_hc [116]
 
u8 what [4]
 
__hc32 revision
 
__hc32 control
 
__hc32 cmdstatus
 
__hc32 intrstatus
 
__hc32 intrenable
 
__hc32 intrdisable
 
__hc32 hcca
 
__hc32 ed_periodcurrent
 
__hc32 ed_controlhead
 
__hc32 ed_controlcurrent
 
__hc32 ed_bulkhead
 
__hc32 ed_bulkcurrent
 
__hc32 donehead
 
__hc32 fminterval
 
__hc32 fmremaining
 
__hc32 fmnumber
 
__hc32 periodicstart
 
__hc32 lsthresh
 
struct ohci_roothub_regs roothub
 

Macro Definition Documentation

#define big_endian_desc (   ohci)    0 /* only little endian */

Definition at line 537 of file ohci.h.

#define big_endian_frame_no_quirk (   ohci)    0

Definition at line 653 of file ohci.h.

#define big_endian_mmio (   ohci)    0 /* only little endian */

Definition at line 547 of file ohci.h.

#define ED_C   (0x02) /* toggle carry */

Definition at line 82 of file ohci.h.

#define ED_DEQUEUE   (1 << 27)

Definition at line 73 of file ohci.h.

#define ED_H   (0x01) /* halted */

Definition at line 83 of file ohci.h.

#define ED_IDLE   0x00 /* NOT linked to HC */

Definition at line 99 of file ohci.h.

#define ED_IN   (0x02 << 11)

Definition at line 79 of file ohci.h.

#define ED_ISO   (1 << 15)

Definition at line 75 of file ohci.h.

#define ED_LOWSPEED   (1 << 13)

Definition at line 77 of file ohci.h.

#define ED_MASK   ((u32)~0x0f) /* strip hw status in low addr bits */

Definition at line 71 of file ohci.h.

#define ED_OPER   0x02 /* IS linked to hc */

Definition at line 101 of file ohci.h.

#define ED_OUT   (0x01 << 11)

Definition at line 78 of file ohci.h.

#define ED_SKIP   (1 << 14)

Definition at line 76 of file ohci.h.

#define ED_UNLINK   0x01 /* being unlinked from hc */

Definition at line 100 of file ohci.h.

#define FI   0x2edf /* 12000 bits per frame (-1) */

Definition at line 684 of file ohci.h.

#define FIT   (1 << 31)

Definition at line 686 of file ohci.h.

#define FSMP (   fi)    (0x7fff & ((6 * ((fi) - 210)) / 7))

Definition at line 685 of file ohci.h.

#define LSTHRESH   0x628 /* lowspeed bit threshold */

Definition at line 687 of file ohci.h.

#define MAX_ROOT_PORTS   15 /* maximum OHCI root hub ports (RH_A_NDP) */

Definition at line 267 of file ohci.h.

#define MAXPSW   2

Definition at line 169 of file ohci.h.

#define NUM_INTS   32

Definition at line 195 of file ohci.h.

#define OHCI_BLF   (1 << 2) /* bulk list filled */

Definition at line 266 of file ohci.h.

#define OHCI_CLF   (1 << 1) /* control list filled */

Definition at line 265 of file ohci.h.

#define OHCI_CTRL_BLE   (1 << 5) /* bulk list enable */

Definition at line 249 of file ohci.h.

#define OHCI_CTRL_CBSR   (3 << 0) /* control/bulk service ratio */

Definition at line 245 of file ohci.h.

#define OHCI_CTRL_CLE   (1 << 4) /* control list enable */

Definition at line 248 of file ohci.h.

#define OHCI_CTRL_HCFS   (3 << 6) /* host controller functional state */

Definition at line 250 of file ohci.h.

#define OHCI_CTRL_IE   (1 << 3) /* isochronous enable */

Definition at line 247 of file ohci.h.

#define OHCI_CTRL_IR   (1 << 8) /* interrupt routing */

Definition at line 251 of file ohci.h.

#define OHCI_CTRL_PLE   (1 << 2) /* periodic list enable */

Definition at line 246 of file ohci.h.

#define OHCI_CTRL_RWC   (1 << 9) /* remote wakeup connected */

Definition at line 252 of file ohci.h.

#define OHCI_CTRL_RWE   (1 << 10) /* remote wakeup enable */

Definition at line 253 of file ohci.h.

#define ohci_dbg (   ohci,
  fmt,
  args... 
)    dev_dbg (ohci_to_hcd(ohci)->self.controller , fmt , ## args )

Definition at line 478 of file ohci.h.

#define ohci_err (   ohci,
  fmt,
  args... 
)    dev_err (ohci_to_hcd(ohci)->self.controller , fmt , ## args )

Definition at line 480 of file ohci.h.

#define OHCI_HCR   (1 << 0) /* host controller reset */

Definition at line 264 of file ohci.h.

#define ohci_info (   ohci,
  fmt,
  args... 
)    dev_info (ohci_to_hcd(ohci)->self.controller , fmt , ## args )

Definition at line 482 of file ohci.h.

#define OHCI_INTR_FNO   (1 << 5) /* frame number overflow */

Definition at line 281 of file ohci.h.

#define OHCI_INTR_MIE   (1 << 31) /* master interrupt enable */

Definition at line 284 of file ohci.h.

#define OHCI_INTR_OC   (1 << 30) /* ownership change */

Definition at line 283 of file ohci.h.

#define OHCI_INTR_RD   (1 << 3) /* resume detect */

Definition at line 279 of file ohci.h.

#define OHCI_INTR_RHSC   (1 << 6) /* root hub status change */

Definition at line 282 of file ohci.h.

#define OHCI_INTR_SF   (1 << 2) /* start frame */

Definition at line 278 of file ohci.h.

#define OHCI_INTR_SO   (1 << 0) /* scheduling overrun */

Definition at line 276 of file ohci.h.

#define OHCI_INTR_UE   (1 << 4) /* unrecoverable error */

Definition at line 280 of file ohci.h.

#define OHCI_INTR_WDH   (1 << 1) /* writeback of done_head */

Definition at line 277 of file ohci.h.

#define OHCI_OCR   (1 << 3) /* ownership change request */

Definition at line 267 of file ohci.h.

#define OHCI_QUIRK_AMD756   0x01 /* erratum #4 */

Definition at line 397 of file ohci.h.

#define OHCI_QUIRK_AMD_PLL   0x200 /* AMD PLL quirk*/

Definition at line 406 of file ohci.h.

#define OHCI_QUIRK_AMD_PREFETCH   0x400 /* pre-fetch for ISO transfer */

Definition at line 407 of file ohci.h.

#define OHCI_QUIRK_BE_DESC   0x08 /* BE descriptors */

Definition at line 400 of file ohci.h.

#define OHCI_QUIRK_BE_MMIO   0x10 /* BE registers */

Definition at line 401 of file ohci.h.

#define OHCI_QUIRK_FRAME_NO   0x80 /* no big endian frame_no shift */

Definition at line 404 of file ohci.h.

#define OHCI_QUIRK_HUB_POWER   0x100 /* distrust firmware power/oc setup */

Definition at line 405 of file ohci.h.

#define OHCI_QUIRK_INITRESET   0x04 /* SiS, OPTi, ... */

Definition at line 399 of file ohci.h.

#define OHCI_QUIRK_NEC   0x40 /* lost interrupts */

Definition at line 403 of file ohci.h.

#define OHCI_QUIRK_SUPERIO   0x02 /* natsemi */

Definition at line 398 of file ohci.h.

#define OHCI_QUIRK_ZFMICRO   0x20 /* Compaq ZFMicro chipset*/

Definition at line 402 of file ohci.h.

#define ohci_readl (   o,
  r 
)    _ohci_readl(o,r)

Definition at line 579 of file ohci.h.

#define OHCI_SOC   (3 << 16) /* scheduling overrun count */

Definition at line 268 of file ohci.h.

#define OHCI_USB_OPER   (2 << 6)

Definition at line 258 of file ohci.h.

#define OHCI_USB_RESET   (0 << 6)

Definition at line 256 of file ohci.h.

#define OHCI_USB_RESUME   (1 << 6)

Definition at line 257 of file ohci.h.

#define OHCI_USB_SUSPEND   (3 << 6)

Definition at line 259 of file ohci.h.

#define ohci_vdbg (   ohci,
  fmt,
  args... 
)    do { } while (0)

Definition at line 490 of file ohci.h.

#define ohci_warn (   ohci,
  fmt,
  args... 
)    dev_warn (ohci_to_hcd(ohci)->self.controller , fmt , ## args )

Definition at line 484 of file ohci.h.

#define ohci_writel (   o,
  v,
  r 
)    _ohci_writel(o,v,r)

Definition at line 580 of file ohci.h.

#define read_roothub (   hc,
  register,
  mask 
)
Value:
({ \
u32 temp = ohci_readl (hc, &hc->regs->roothub.register); \
if (temp == -1) \
hc->rh_state = OHCI_RH_HALTED; \
else if (hc->flags & OHCI_QUIRK_AMD756) \
while (temp & mask) \
temp = ohci_readl (hc, &hc->regs->roothub.register); \
temp; })

Definition at line 704 of file ohci.h.

#define RH_A_DT   (1 << 10) /* device type (mbz) */

Definition at line 319 of file ohci.h.

#define RH_A_NDP   (0xff << 0) /* number of downstream ports */

Definition at line 316 of file ohci.h.

#define RH_A_NOCP   (1 << 12) /* no over current protection */

Definition at line 321 of file ohci.h.

#define RH_A_NPS   (1 << 9) /* no power switching */

Definition at line 318 of file ohci.h.

#define RH_A_OCPM   (1 << 11) /* over current protection mode */

Definition at line 320 of file ohci.h.

#define RH_A_POTPGT   (0xff << 24) /* power on to power good time */

Definition at line 322 of file ohci.h.

#define RH_A_PSM   (1 << 8) /* power switching mode */

Definition at line 317 of file ohci.h.

#define RH_B_DR   0x0000ffff /* device removable flags */

Definition at line 312 of file ohci.h.

#define RH_B_PPCM   0xffff0000 /* port power control mask */

Definition at line 313 of file ohci.h.

#define RH_HS_CRWE   0x80000000 /* clear remote wakeup enable */

Definition at line 309 of file ohci.h.

#define RH_HS_DRWE   0x00008000 /* device remote wakeup enable */

Definition at line 306 of file ohci.h.

#define RH_HS_LPS   0x00000001 /* local power status */

Definition at line 304 of file ohci.h.

#define RH_HS_LPSC   0x00010000 /* local power status change */

Definition at line 307 of file ohci.h.

#define RH_HS_OCI   0x00000002 /* over current indicator */

Definition at line 305 of file ohci.h.

#define RH_HS_OCIC   0x00020000 /* over current indicator change */

Definition at line 308 of file ohci.h.

#define RH_PS_CCS   0x00000001 /* current connect status */

Definition at line 290 of file ohci.h.

#define RH_PS_CSC   0x00010000 /* connect status change */

Definition at line 297 of file ohci.h.

#define RH_PS_LSDA   0x00000200 /* low speed device attached */

Definition at line 296 of file ohci.h.

#define RH_PS_OCIC   0x00080000 /* over current indicator change */

Definition at line 300 of file ohci.h.

#define RH_PS_PES   0x00000002 /* port enable status*/

Definition at line 291 of file ohci.h.

#define RH_PS_PESC   0x00020000 /* port enable status change */

Definition at line 298 of file ohci.h.

#define RH_PS_POCI   0x00000008 /* port over current indicator */

Definition at line 293 of file ohci.h.

#define RH_PS_PPS   0x00000100 /* port power status */

Definition at line 295 of file ohci.h.

#define RH_PS_PRS   0x00000010 /* port reset status */

Definition at line 294 of file ohci.h.

#define RH_PS_PRSC   0x00100000 /* port reset status change */

Definition at line 301 of file ohci.h.

#define RH_PS_PSS   0x00000004 /* port suspend status */

Definition at line 292 of file ohci.h.

#define RH_PS_PSSC   0x00040000 /* port suspend status change */

Definition at line 299 of file ohci.h.

#define STUB_DEBUG_FILES

Definition at line 475 of file ohci.h.

#define TD_BUFFEROVERRUN   0x0C

Definition at line 149 of file ohci.h.

#define TD_BUFFERUNDERRUN   0x0D

Definition at line 150 of file ohci.h.

#define TD_CC   0xf0000000 /* condition code */

Definition at line 136 of file ohci.h.

#define TD_CC_BITSTUFFING   0x02

Definition at line 140 of file ohci.h.

#define TD_CC_CRC   0x01

Definition at line 139 of file ohci.h.

#define TD_CC_DATATOGGLEM   0x03

Definition at line 141 of file ohci.h.

#define TD_CC_GET (   td_p)    ((td_p >>28) & 0x0f)

Definition at line 137 of file ohci.h.

#define TD_CC_NOERROR   0x00

Definition at line 138 of file ohci.h.

#define TD_CC_STALL   0x04

Definition at line 142 of file ohci.h.

#define TD_DATAOVERRUN   0x08

Definition at line 146 of file ohci.h.

#define TD_DATAUNDERRUN   0x09

Definition at line 147 of file ohci.h.

#define TD_DEVNOTRESP   0x05

Definition at line 143 of file ohci.h.

#define TD_DI   0x00E00000 /* frames before interrupt */

Definition at line 139 of file ohci.h.

#define TD_DI_SET (   X)    (((X) & 0x07)<< 21)

Definition at line 140 of file ohci.h.

#define TD_DONE   0x00020000 /* retired to donelist */

Definition at line 144 of file ohci.h.

#define TD_DP   0x00180000 /* direction/pid */

Definition at line 153 of file ohci.h.

#define TD_DP_IN   0x00100000 /* IN pid */

Definition at line 155 of file ohci.h.

#define TD_DP_OUT   0x00080000 /* OUT pid */

Definition at line 156 of file ohci.h.

#define TD_DP_SETUP   0x00000000 /* SETUP pid */

Definition at line 154 of file ohci.h.

#define TD_EC   0x0C000000 /* error count */

Definition at line 148 of file ohci.h.

#define TD_HASH_FUNC (   td_dma)    ((td_dma ^ (td_dma >> 6)) % TD_HASH_SIZE)

Definition at line 337 of file ohci.h.

#define TD_HASH_SIZE   64 /* power'o'two */

Definition at line 335 of file ohci.h.

#define TD_ISO   0x00010000 /* copy of ED_ISO */

Definition at line 145 of file ohci.h.

#define TD_MASK   ((u32)~0x1f) /* strip hw status in low addr bits */

Definition at line 133 of file ohci.h.

#define TD_NOTACCESSED   0x0F

Definition at line 152 of file ohci.h.

#define TD_PIDCHECKFAIL   0x06

Definition at line 144 of file ohci.h.

#define TD_R   0x00040000 /* round: short packets OK? */

Definition at line 158 of file ohci.h.

#define TD_T   0x03000000 /* data toggle state */

Definition at line 149 of file ohci.h.

#define TD_T_DATA0   0x02000000 /* DATA0 */

Definition at line 150 of file ohci.h.

#define TD_T_DATA1   0x03000000 /* DATA1 */

Definition at line 151 of file ohci.h.

#define TD_T_TOGGLE   0x00000000 /* uses ED_C */

Definition at line 152 of file ohci.h.

#define TD_UNEXPECTEDPID   0x07

Definition at line 145 of file ohci.h.

Typedef Documentation

Definition at line 16 of file ohci.h.

Definition at line 15 of file ohci.h.

Enumeration Type Documentation

Enumerator:
OHCI_RH_HALTED 
OHCI_RH_SUSPENDED 
OHCI_RH_RUNNING 

Definition at line 347 of file ohci.h.

Function Documentation

Variable Documentation

Definition at line 106 of file ohci.h.

__hc32 cmdstatus

Definition at line 241 of file ohci.h.

__hc32 control

Definition at line 240 of file ohci.h.

dma_addr_t data_dma

Definition at line 180 of file ohci.h.

Definition at line 87 of file ohci.h.

__hc32 done_head

Definition at line 204 of file ohci.h.

__hc32 donehead

Definition at line 253 of file ohci.h.

Definition at line 88 of file ohci.h.

Definition at line 174 of file ohci.h.

__hc32 ed_bulkcurrent

Definition at line 252 of file ohci.h.

__hc32 ed_bulkhead

Definition at line 251 of file ohci.h.

__hc32 ed_controlcurrent

Definition at line 250 of file ohci.h.

__hc32 ed_controlhead

Definition at line 249 of file ohci.h.

struct ed* ed_next

Definition at line 91 of file ohci.h.

__hc32 ed_periodcurrent

Definition at line 248 of file ohci.h.

struct ed* ed_prev

Definition at line 92 of file ohci.h.

__hc32 fminterval

Definition at line 256 of file ohci.h.

__hc32 fmnumber

Definition at line 258 of file ohci.h.

__hc32 fmremaining

Definition at line 257 of file ohci.h.

__hc32 frame_no

Definition at line 203 of file ohci.h.

__hc32 hcca

Definition at line 247 of file ohci.h.

__hc32 hwBE

Definition at line 164 of file ohci.h.

__hc32 hwCBP

Definition at line 162 of file ohci.h.

__hc32 hwHeadP

Definition at line 81 of file ohci.h.

__hc32 hwINFO

Definition at line 71 of file ohci.h.

__hc32 hwNextED

Definition at line 84 of file ohci.h.

__hc32 hwNextTD

Definition at line 163 of file ohci.h.

__hc16 hwPSW[MAXPSW]

Definition at line 170 of file ohci.h.

__hc32 hwTailP

Definition at line 80 of file ohci.h.

__u8 index

Definition at line 173 of file ohci.h.

__hc32 int_table[NUM_INTS]

Definition at line 196 of file ohci.h.

Definition at line 107 of file ohci.h.

__hc32 intrdisable

Definition at line 244 of file ohci.h.

__hc32 intrenable

Definition at line 243 of file ohci.h.

__hc32 intrstatus

Definition at line 242 of file ohci.h.

u16 last_iso

Definition at line 109 of file ohci.h.

u16 load

Definition at line 108 of file ohci.h.

__hc32 lsthresh

Definition at line 260 of file ohci.h.

struct td* next_dl_td

Definition at line 176 of file ohci.h.

__hc32 periodicstart

Definition at line 259 of file ohci.h.

u8 reserved_for_hc[116]

Definition at line 205 of file ohci.h.

Definition at line 239 of file ohci.h.

Definition at line 98 of file ohci.h.

dma_addr_t td_dma

Definition at line 179 of file ohci.h.

struct td* td_hash

Definition at line 175 of file ohci.h.

struct list_head td_list

Definition at line 93 of file ohci.h.

u16 tick

Definition at line 112 of file ohci.h.

Definition at line 103 of file ohci.h.

struct urb* urb

Definition at line 177 of file ohci.h.

u8 what[4]

Definition at line 206 of file ohci.h.