via_dma.c File Reference

#include <drm/drmP.h>
#include <drm/via_drm.h>
#include "via_drv.h"
#include "via_3d_reg.h"

Go to the source code of this file.

Macros
#define	CMDBUF_ALIGNMENT_SIZE   (0x100)
#define	CMDBUF_ALIGNMENT_MASK   (0x0ff)
#define	VIA_REG_STATUS   0x400
#define	VIA_REG_TRANSET   0x43C
#define	VIA_REG_TRANSPACE   0x440
#define	VIA_CMD_RGTR_BUSY   0x00000080 /* Command Regulator is busy */
#define	VIA_2D_ENG_BUSY   0x00000001 /* 2D Engine is busy */
#define	VIA_3D_ENG_BUSY   0x00000002 /* 3D Engine is busy */
#define	VIA_VR_QUEUE_BUSY   0x00020000 /* Virtual Queue is busy */
#define	SetReg2DAGP(nReg, nData)
#define	via_flush_write_combine()   DRM_MEMORYBARRIER()
#define	VIA_OUT_RING_QW(w1, w2)

Functions
int	via_dma_cleanup (struct drm_device *dev)
int	via_driver_dma_quiescent (struct drm_device *dev)

Variables
struct drm_ioctl_desc	via_ioctls []
int	via_max_ioctl = DRM_ARRAY_SIZE(via_ioctls)

Macro Definition Documentation

#define CMDBUF_ALIGNMENT_MASK   (0x0ff)

Definition at line 43 of file via_dma.c.

#define CMDBUF_ALIGNMENT_SIZE   (0x100)

Definition at line 42 of file via_dma.c.

#define SetReg2DAGP	(		nReg,
			nData
	)

Value:

{               \
    *((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1;  \
    *((uint32_t *)(vb) + 1) = (nData);          \
    vb = ((uint32_t *)vb) + 2;              \
	dev_priv->dma_low += 8;                    \
}

Definition at line 56 of file via_dma.c.

#define VIA_2D_ENG_BUSY   0x00000001 /* 2D Engine is busy */

Definition at line 52 of file via_dma.c.

#define VIA_3D_ENG_BUSY   0x00000002 /* 3D Engine is busy */

Definition at line 53 of file via_dma.c.

#define VIA_CMD_RGTR_BUSY   0x00000080 /* Command Regulator is busy */

Definition at line 51 of file via_dma.c.

#define via_flush_write_combine

(

)

DRM_MEMORYBARRIER()

Definition at line 63 of file via_dma.c.

#define VIA_OUT_RING_QW	(		w1,
			w2
	)

Value:

do {        \
    *vb++ = (w1);               \
    *vb++ = (w2);               \
	dev_priv->dma_low += 8;            \
} while (0)

Definition at line 65 of file via_dma.c.

#define VIA_REG_STATUS   0x400

Definition at line 46 of file via_dma.c.

#define VIA_REG_TRANSET   0x43C

Definition at line 47 of file via_dma.c.

#define VIA_REG_TRANSPACE   0x440

Definition at line 48 of file via_dma.c.

#define VIA_VR_QUEUE_BUSY   0x00020000 /* Virtual Queue is busy */

Definition at line 54 of file via_dma.c.

Function Documentation

int via_dma_cleanup

(

struct drm_device *

dev

)

Definition at line 155 of file via_dma.c.

int via_driver_dma_quiescent

(

struct drm_device *

dev

)

Definition at line 311 of file via_dma.c.

Variable Documentation

struct drm_ioctl_desc via_ioctls[]

Initial value:

= {
    DRM_IOCTL_DEF_DRV(VIA_ALLOCMEM, via_mem_alloc, DRM_AUTH),
    DRM_IOCTL_DEF_DRV(VIA_FREEMEM, via_mem_free, DRM_AUTH),
    DRM_IOCTL_DEF_DRV(VIA_AGP_INIT, via_agp_init, DRM_AUTH|DRM_MASTER),
    DRM_IOCTL_DEF_DRV(VIA_FB_INIT, via_fb_init, DRM_AUTH|DRM_MASTER),
    DRM_IOCTL_DEF_DRV(VIA_MAP_INIT, via_map_init, DRM_AUTH|DRM_MASTER),
    DRM_IOCTL_DEF_DRV(VIA_DEC_FUTEX, via_decoder_futex, DRM_AUTH),
    DRM_IOCTL_DEF_DRV(VIA_DMA_INIT, via_dma_init, DRM_AUTH),
    DRM_IOCTL_DEF_DRV(VIA_CMDBUFFER, via_cmdbuffer, DRM_AUTH),
    DRM_IOCTL_DEF_DRV(VIA_FLUSH, via_flush_ioctl, DRM_AUTH),
    DRM_IOCTL_DEF_DRV(VIA_PCICMD, via_pci_cmdbuffer, DRM_AUTH),
    DRM_IOCTL_DEF_DRV(VIA_CMDBUF_SIZE, via_cmdbuf_size, DRM_AUTH),
    DRM_IOCTL_DEF_DRV(VIA_WAIT_IRQ, via_wait_irq, DRM_AUTH),
    DRM_IOCTL_DEF_DRV(VIA_DMA_BLIT, via_dma_blit, DRM_AUTH),

}

Definition at line 723 of file via_dma.c.

int via_max_ioctl = DRM_ARRAY_SIZE(via_ioctls)

Definition at line 740 of file via_dma.c.