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wm5102-tables.c
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1 /*
2  * wm5102-tables.c -- WM5102 data tables
3  *
4  * Copyright 2012 Wolfson Microelectronics plc
5  *
6  * Author: Mark Brown <[email protected]>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #include <linux/module.h>
14 
15 #include <linux/mfd/arizona/core.h>
17 
18 #include "arizona.h"
19 
20 #define WM5102_NUM_AOD_ISR 2
21 #define WM5102_NUM_ISR 5
22 
23 static const struct reg_default wm5102_reva_patch[] = {
24  { 0x80, 0x0003 },
25  { 0x221, 0x0090 },
26  { 0x211, 0x0014 },
27  { 0x212, 0x0000 },
28  { 0x214, 0x000C },
29  { 0x171, 0x0002 },
30  { 0x171, 0x0000 },
31  { 0x461, 0x8000 },
32  { 0x463, 0x50F0 },
33  { 0x465, 0x4820 },
34  { 0x467, 0x4040 },
35  { 0x469, 0x3940 },
36  { 0x46B, 0x3310 },
37  { 0x46D, 0x2D80 },
38  { 0x46F, 0x2890 },
39  { 0x471, 0x1990 },
40  { 0x473, 0x1450 },
41  { 0x475, 0x1020 },
42  { 0x477, 0x0CD0 },
43  { 0x479, 0x0A30 },
44  { 0x47B, 0x0810 },
45  { 0x47D, 0x0510 },
46  { 0x4D1, 0x017F },
47  { 0x500, 0x000D },
48  { 0x507, 0x1820 },
49  { 0x508, 0x1820 },
50  { 0x540, 0x000D },
51  { 0x547, 0x1820 },
52  { 0x548, 0x1820 },
53  { 0x580, 0x000D },
54  { 0x587, 0x1820 },
55  { 0x588, 0x1820 },
56  { 0x80, 0x0000 },
57 };
58 
59 /* We use a function so we can use ARRAY_SIZE() */
61 {
62  switch (arizona->rev) {
63  case 0:
64  return regmap_register_patch(arizona->regmap,
65  wm5102_reva_patch,
66  ARRAY_SIZE(wm5102_reva_patch));
67  default:
68  return 0;
69  }
70 }
71 
72 static const struct regmap_irq wm5102_aod_irqs[ARIZONA_NUM_IRQ] = {
77 };
78 
79 const struct regmap_irq_chip wm5102_aod = {
80  .name = "wm5102 AOD",
81  .status_base = ARIZONA_AOD_IRQ1,
82  .mask_base = ARIZONA_AOD_IRQ_MASK_IRQ1,
83  .ack_base = ARIZONA_AOD_IRQ1,
84  .wake_base = ARIZONA_WAKE_CONTROL,
85  .num_regs = 1,
86  .irqs = wm5102_aod_irqs,
87  .num_irqs = ARRAY_SIZE(wm5102_aod_irqs),
88 };
89 
90 static const struct regmap_irq wm5102_irqs[ARIZONA_NUM_IRQ] = {
91  [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 },
92  [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 },
93  [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 },
94  [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 },
95 
97  .reg_offset = 1, .mask = ARIZONA_DSP1_RAM_RDY_EINT1
98  },
100  .reg_offset = 1, .mask = ARIZONA_DSP_IRQ2_EINT1
101  },
103  .reg_offset = 1, .mask = ARIZONA_DSP_IRQ1_EINT1
104  },
105 
107  .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_WARN_EINT1
108  },
110  .reg_offset = 2, .mask = ARIZONA_SPK_SHUTDOWN_EINT1
111  },
112  [ARIZONA_IRQ_HPDET] = {
113  .reg_offset = 2, .mask = ARIZONA_HPDET_EINT1
114  },
115  [ARIZONA_IRQ_MICDET] = {
116  .reg_offset = 2, .mask = ARIZONA_MICDET_EINT1
117  },
119  .reg_offset = 2, .mask = ARIZONA_WSEQ_DONE_EINT1
120  },
122  .reg_offset = 2, .mask = ARIZONA_DRC2_SIG_DET_EINT1
123  },
125  .reg_offset = 2, .mask = ARIZONA_DRC1_SIG_DET_EINT1
126  },
128  .reg_offset = 2, .mask = ARIZONA_ASRC2_LOCK_EINT1
129  },
131  .reg_offset = 2, .mask = ARIZONA_ASRC1_LOCK_EINT1
132  },
134  .reg_offset = 2, .mask = ARIZONA_UNDERCLOCKED_EINT1
135  },
137  .reg_offset = 2, .mask = ARIZONA_OVERCLOCKED_EINT1
138  },
140  .reg_offset = 2, .mask = ARIZONA_FLL2_LOCK_EINT1
141  },
143  .reg_offset = 2, .mask = ARIZONA_FLL1_LOCK_EINT1
144  },
146  .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_EINT1
147  },
149  .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_ASYNC_EINT1
150  },
151 
153  .reg_offset = 3, .mask = ARIZONA_ASRC_CFG_ERR_EINT1
154  },
156  .reg_offset = 3, .mask = ARIZONA_AIF3_ERR_EINT1
157  },
159  .reg_offset = 3, .mask = ARIZONA_AIF2_ERR_EINT1
160  },
162  .reg_offset = 3, .mask = ARIZONA_AIF1_ERR_EINT1
163  },
165  .reg_offset = 3, .mask = ARIZONA_CTRLIF_ERR_EINT1
166  },
168  .reg_offset = 3, .mask = ARIZONA_MIXER_DROPPED_SAMPLE_EINT1
169  },
171  .reg_offset = 3, .mask = ARIZONA_ASYNC_CLK_ENA_LOW_EINT1
172  },
174  .reg_offset = 3, .mask = ARIZONA_SYSCLK_ENA_LOW_EINT1
175  },
177  .reg_offset = 3, .mask = ARIZONA_ISRC1_CFG_ERR_EINT1
178  },
180  .reg_offset = 3, .mask = ARIZONA_ISRC2_CFG_ERR_EINT1
181  },
182 
184  .reg_offset = 4, .mask = ARIZONA_BOOT_DONE_EINT1
185  },
187  .reg_offset = 4, .mask = ARIZONA_DCS_DAC_DONE_EINT1
188  },
190  .reg_offset = 4, .mask = ARIZONA_DCS_HP_DONE_EINT1
191  },
193  .reg_offset = 4, .mask = ARIZONA_FLL2_CLOCK_OK_EINT1
194  },
196  .reg_offset = 4, .mask = ARIZONA_FLL1_CLOCK_OK_EINT1
197  },
198 };
199 
200 const struct regmap_irq_chip wm5102_irq = {
201  .name = "wm5102 IRQ",
202  .status_base = ARIZONA_INTERRUPT_STATUS_1,
203  .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK,
204  .ack_base = ARIZONA_INTERRUPT_STATUS_1,
205  .num_regs = 5,
206  .irqs = wm5102_irqs,
207  .num_irqs = ARRAY_SIZE(wm5102_irqs),
208 };
209 
210 static const struct reg_default wm5102_reg_default[] = {
211  { 0x00000008, 0x0019 }, /* R8 - Ctrl IF SPI CFG 1 */
212  { 0x00000009, 0x0001 }, /* R9 - Ctrl IF I2C1 CFG 1 */
213  { 0x0000000D, 0x0000 }, /* R13 - Ctrl IF Status 1 */
214  { 0x00000016, 0x0000 }, /* R22 - Write Sequencer Ctrl 0 */
215  { 0x00000017, 0x0000 }, /* R23 - Write Sequencer Ctrl 1 */
216  { 0x00000018, 0x0000 }, /* R24 - Write Sequencer Ctrl 2 */
217  { 0x0000001A, 0x0000 }, /* R26 - Write Sequencer PROM */
218  { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */
219  { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */
220  { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */
221  { 0x00000023, 0x1000 }, /* R35 - Tone Generator 4 */
222  { 0x00000024, 0x0000 }, /* R36 - Tone Generator 5 */
223  { 0x00000030, 0x0000 }, /* R48 - PWM Drive 1 */
224  { 0x00000031, 0x0100 }, /* R49 - PWM Drive 2 */
225  { 0x00000032, 0x0100 }, /* R50 - PWM Drive 3 */
226  { 0x00000040, 0x0000 }, /* R64 - Wake control */
227  { 0x00000041, 0x0000 }, /* R65 - Sequence control */
228  { 0x00000061, 0x01FF }, /* R97 - Sample Rate Sequence Select 1 */
229  { 0x00000062, 0x01FF }, /* R98 - Sample Rate Sequence Select 2 */
230  { 0x00000063, 0x01FF }, /* R99 - Sample Rate Sequence Select 3 */
231  { 0x00000064, 0x01FF }, /* R100 - Sample Rate Sequence Select 4 */
232  { 0x00000068, 0x01FF }, /* R104 - Always On Triggers Sequence Select 1 */
233  { 0x00000069, 0x01FF }, /* R105 - Always On Triggers Sequence Select 2 */
234  { 0x0000006A, 0x01FF }, /* R106 - Always On Triggers Sequence Select 3 */
235  { 0x0000006B, 0x01FF }, /* R107 - Always On Triggers Sequence Select 4 */
236  { 0x0000006C, 0x01FF }, /* R108 - Always On Triggers Sequence Select 5 */
237  { 0x0000006D, 0x01FF }, /* R109 - Always On Triggers Sequence Select 6 */
238  { 0x00000070, 0x0000 }, /* R112 - Comfort Noise Generator */
239  { 0x00000090, 0x0000 }, /* R144 - Haptics Control 1 */
240  { 0x00000091, 0x7FFF }, /* R145 - Haptics Control 2 */
241  { 0x00000092, 0x0000 }, /* R146 - Haptics phase 1 intensity */
242  { 0x00000093, 0x0000 }, /* R147 - Haptics phase 1 duration */
243  { 0x00000094, 0x0000 }, /* R148 - Haptics phase 2 intensity */
244  { 0x00000095, 0x0000 }, /* R149 - Haptics phase 2 duration */
245  { 0x00000096, 0x0000 }, /* R150 - Haptics phase 3 intensity */
246  { 0x00000097, 0x0000 }, /* R151 - Haptics phase 3 duration */
247  { 0x00000100, 0x0001 }, /* R256 - Clock 32k 1 */
248  { 0x00000101, 0x0304 }, /* R257 - System Clock 1 */
249  { 0x00000102, 0x0011 }, /* R258 - Sample rate 1 */
250  { 0x00000103, 0x0011 }, /* R259 - Sample rate 2 */
251  { 0x00000104, 0x0011 }, /* R260 - Sample rate 3 */
252  { 0x00000112, 0x0305 }, /* R274 - Async clock 1 */
253  { 0x00000113, 0x0011 }, /* R275 - Async sample rate 1 */
254  { 0x00000149, 0x0000 }, /* R329 - Output system clock */
255  { 0x0000014A, 0x0000 }, /* R330 - Output async clock */
256  { 0x00000152, 0x0000 }, /* R338 - Rate Estimator 1 */
257  { 0x00000153, 0x0000 }, /* R339 - Rate Estimator 2 */
258  { 0x00000154, 0x0000 }, /* R340 - Rate Estimator 3 */
259  { 0x00000155, 0x0000 }, /* R341 - Rate Estimator 4 */
260  { 0x00000156, 0x0000 }, /* R342 - Rate Estimator 5 */
261  { 0x00000171, 0x0000 }, /* R369 - FLL1 Control 1 */
262  { 0x00000172, 0x0008 }, /* R370 - FLL1 Control 2 */
263  { 0x00000173, 0x0018 }, /* R371 - FLL1 Control 3 */
264  { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */
265  { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */
266  { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */
267  { 0x00000177, 0x0181 }, /* R375 - FLL1 Loop Filter Test 1 */
268  { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */
269  { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */
270  { 0x00000183, 0x0000 }, /* R387 - FLL1 Synchroniser 3 */
271  { 0x00000184, 0x0000 }, /* R388 - FLL1 Synchroniser 4 */
272  { 0x00000185, 0x0000 }, /* R389 - FLL1 Synchroniser 5 */
273  { 0x00000186, 0x0000 }, /* R390 - FLL1 Synchroniser 6 */
274  { 0x00000189, 0x0000 }, /* R393 - FLL1 Spread Spectrum */
275  { 0x0000018A, 0x0004 }, /* R394 - FLL1 GPIO Clock */
276  { 0x00000191, 0x0000 }, /* R401 - FLL2 Control 1 */
277  { 0x00000192, 0x0008 }, /* R402 - FLL2 Control 2 */
278  { 0x00000193, 0x0018 }, /* R403 - FLL2 Control 3 */
279  { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */
280  { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */
281  { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */
282  { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */
283  { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */
284  { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */
285  { 0x000001A3, 0x0000 }, /* R419 - FLL2 Synchroniser 3 */
286  { 0x000001A4, 0x0000 }, /* R420 - FLL2 Synchroniser 4 */
287  { 0x000001A5, 0x0000 }, /* R421 - FLL2 Synchroniser 5 */
288  { 0x000001A6, 0x0000 }, /* R422 - FLL2 Synchroniser 6 */
289  { 0x000001A9, 0x0000 }, /* R425 - FLL2 Spread Spectrum */
290  { 0x000001AA, 0x0004 }, /* R426 - FLL2 GPIO Clock */
291  { 0x00000200, 0x0006 }, /* R512 - Mic Charge Pump 1 */
292  { 0x00000210, 0x00D4 }, /* R528 - LDO1 Control 1 */
293  { 0x00000213, 0x0344 }, /* R531 - LDO2 Control 1 */
294  { 0x00000218, 0x01A6 }, /* R536 - Mic Bias Ctrl 1 */
295  { 0x00000219, 0x01A6 }, /* R537 - Mic Bias Ctrl 2 */
296  { 0x0000021A, 0x01A6 }, /* R538 - Mic Bias Ctrl 3 */
297  { 0x00000293, 0x0000 }, /* R659 - Accessory Detect Mode 1 */
298  { 0x0000029B, 0x0020 }, /* R667 - Headphone Detect 1 */
299  { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */
300  { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */
301  { 0x000002A5, 0x0000 }, /* R677 - Mic Detect 3 */
302  { 0x000002C3, 0x0000 }, /* R707 - Mic noise mix control 1 */
303  { 0x000002CB, 0x0000 }, /* R715 - Isolation control */
304  { 0x000002D3, 0x0000 }, /* R723 - Jack detect analogue */
305  { 0x00000300, 0x0000 }, /* R768 - Input Enables */
306  { 0x00000308, 0x0000 }, /* R776 - Input Rate */
307  { 0x00000309, 0x0022 }, /* R777 - Input Volume Ramp */
308  { 0x00000310, 0x2080 }, /* R784 - IN1L Control */
309  { 0x00000311, 0x0180 }, /* R785 - ADC Digital Volume 1L */
310  { 0x00000312, 0x0000 }, /* R786 - DMIC1L Control */
311  { 0x00000314, 0x0080 }, /* R788 - IN1R Control */
312  { 0x00000315, 0x0180 }, /* R789 - ADC Digital Volume 1R */
313  { 0x00000316, 0x0000 }, /* R790 - DMIC1R Control */
314  { 0x00000318, 0x2080 }, /* R792 - IN2L Control */
315  { 0x00000319, 0x0180 }, /* R793 - ADC Digital Volume 2L */
316  { 0x0000031A, 0x0000 }, /* R794 - DMIC2L Control */
317  { 0x0000031C, 0x0080 }, /* R796 - IN2R Control */
318  { 0x0000031D, 0x0180 }, /* R797 - ADC Digital Volume 2R */
319  { 0x0000031E, 0x0000 }, /* R798 - DMIC2R Control */
320  { 0x00000320, 0x2080 }, /* R800 - IN3L Control */
321  { 0x00000321, 0x0180 }, /* R801 - ADC Digital Volume 3L */
322  { 0x00000322, 0x0000 }, /* R802 - DMIC3L Control */
323  { 0x00000324, 0x0080 }, /* R804 - IN3R Control */
324  { 0x00000325, 0x0180 }, /* R805 - ADC Digital Volume 3R */
325  { 0x00000326, 0x0000 }, /* R806 - DMIC3R Control */
326  { 0x00000400, 0x0000 }, /* R1024 - Output Enables 1 */
327  { 0x00000408, 0x0000 }, /* R1032 - Output Rate 1 */
328  { 0x00000409, 0x0022 }, /* R1033 - Output Volume Ramp */
329  { 0x00000410, 0x0080 }, /* R1040 - Output Path Config 1L */
330  { 0x00000411, 0x0180 }, /* R1041 - DAC Digital Volume 1L */
331  { 0x00000412, 0x0080 }, /* R1042 - DAC Volume Limit 1L */
332  { 0x00000413, 0x0001 }, /* R1043 - Noise Gate Select 1L */
333  { 0x00000414, 0x0080 }, /* R1044 - Output Path Config 1R */
334  { 0x00000415, 0x0180 }, /* R1045 - DAC Digital Volume 1R */
335  { 0x00000416, 0x0080 }, /* R1046 - DAC Volume Limit 1R */
336  { 0x00000417, 0x0002 }, /* R1047 - Noise Gate Select 1R */
337  { 0x00000418, 0x0080 }, /* R1048 - Output Path Config 2L */
338  { 0x00000419, 0x0180 }, /* R1049 - DAC Digital Volume 2L */
339  { 0x0000041A, 0x0080 }, /* R1050 - DAC Volume Limit 2L */
340  { 0x0000041B, 0x0004 }, /* R1051 - Noise Gate Select 2L */
341  { 0x0000041C, 0x0080 }, /* R1052 - Output Path Config 2R */
342  { 0x0000041D, 0x0180 }, /* R1053 - DAC Digital Volume 2R */
343  { 0x0000041E, 0x0080 }, /* R1054 - DAC Volume Limit 2R */
344  { 0x0000041F, 0x0008 }, /* R1055 - Noise Gate Select 2R */
345  { 0x00000420, 0x0080 }, /* R1056 - Output Path Config 3L */
346  { 0x00000421, 0x0180 }, /* R1057 - DAC Digital Volume 3L */
347  { 0x00000422, 0x0080 }, /* R1058 - DAC Volume Limit 3L */
348  { 0x00000423, 0x0010 }, /* R1059 - Noise Gate Select 3L */
349  { 0x00000424, 0x0080 }, /* R1060 - Output Path Config 3R */
350  { 0x00000425, 0x0180 }, /* R1061 - DAC Digital Volume 3R */
351  { 0x00000426, 0x0080 }, /* R1062 - DAC Volume Limit 3R */
352  { 0x00000428, 0x0000 }, /* R1064 - Output Path Config 4L */
353  { 0x00000429, 0x0180 }, /* R1065 - DAC Digital Volume 4L */
354  { 0x0000042A, 0x0080 }, /* R1066 - Out Volume 4L */
355  { 0x0000042B, 0x0040 }, /* R1067 - Noise Gate Select 4L */
356  { 0x0000042C, 0x0000 }, /* R1068 - Output Path Config 4R */
357  { 0x0000042D, 0x0180 }, /* R1069 - DAC Digital Volume 4R */
358  { 0x0000042E, 0x0080 }, /* R1070 - Out Volume 4R */
359  { 0x0000042F, 0x0080 }, /* R1071 - Noise Gate Select 4R */
360  { 0x00000430, 0x0000 }, /* R1072 - Output Path Config 5L */
361  { 0x00000431, 0x0180 }, /* R1073 - DAC Digital Volume 5L */
362  { 0x00000432, 0x0080 }, /* R1074 - DAC Volume Limit 5L */
363  { 0x00000433, 0x0100 }, /* R1075 - Noise Gate Select 5L */
364  { 0x00000434, 0x0000 }, /* R1076 - Output Path Config 5R */
365  { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */
366  { 0x00000436, 0x0080 }, /* R1078 - DAC Volume Limit 5R */
367  { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */
368  { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */
369  { 0x00000458, 0x0001 }, /* R1112 - Noise Gate Control */
370  { 0x00000490, 0x0069 }, /* R1168 - PDM SPK1 CTRL 1 */
371  { 0x00000491, 0x0000 }, /* R1169 - PDM SPK1 CTRL 2 */
372  { 0x000004DC, 0x0000 }, /* R1244 - DAC comp 1 */
373  { 0x000004DD, 0x0000 }, /* R1245 - DAC comp 2 */
374  { 0x000004DE, 0x0000 }, /* R1246 - DAC comp 3 */
375  { 0x000004DF, 0x0000 }, /* R1247 - DAC comp 4 */
376  { 0x00000500, 0x000C }, /* R1280 - AIF1 BCLK Ctrl */
377  { 0x00000501, 0x0008 }, /* R1281 - AIF1 Tx Pin Ctrl */
378  { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */
379  { 0x00000503, 0x0000 }, /* R1283 - AIF1 Rate Ctrl */
380  { 0x00000504, 0x0000 }, /* R1284 - AIF1 Format */
381  { 0x00000505, 0x0040 }, /* R1285 - AIF1 Tx BCLK Rate */
382  { 0x00000506, 0x0040 }, /* R1286 - AIF1 Rx BCLK Rate */
383  { 0x00000507, 0x1818 }, /* R1287 - AIF1 Frame Ctrl 1 */
384  { 0x00000508, 0x1818 }, /* R1288 - AIF1 Frame Ctrl 2 */
385  { 0x00000509, 0x0000 }, /* R1289 - AIF1 Frame Ctrl 3 */
386  { 0x0000050A, 0x0001 }, /* R1290 - AIF1 Frame Ctrl 4 */
387  { 0x0000050B, 0x0002 }, /* R1291 - AIF1 Frame Ctrl 5 */
388  { 0x0000050C, 0x0003 }, /* R1292 - AIF1 Frame Ctrl 6 */
389  { 0x0000050D, 0x0004 }, /* R1293 - AIF1 Frame Ctrl 7 */
390  { 0x0000050E, 0x0005 }, /* R1294 - AIF1 Frame Ctrl 8 */
391  { 0x0000050F, 0x0006 }, /* R1295 - AIF1 Frame Ctrl 9 */
392  { 0x00000510, 0x0007 }, /* R1296 - AIF1 Frame Ctrl 10 */
393  { 0x00000511, 0x0000 }, /* R1297 - AIF1 Frame Ctrl 11 */
394  { 0x00000512, 0x0001 }, /* R1298 - AIF1 Frame Ctrl 12 */
395  { 0x00000513, 0x0002 }, /* R1299 - AIF1 Frame Ctrl 13 */
396  { 0x00000514, 0x0003 }, /* R1300 - AIF1 Frame Ctrl 14 */
397  { 0x00000515, 0x0004 }, /* R1301 - AIF1 Frame Ctrl 15 */
398  { 0x00000516, 0x0005 }, /* R1302 - AIF1 Frame Ctrl 16 */
399  { 0x00000517, 0x0006 }, /* R1303 - AIF1 Frame Ctrl 17 */
400  { 0x00000518, 0x0007 }, /* R1304 - AIF1 Frame Ctrl 18 */
401  { 0x00000519, 0x0000 }, /* R1305 - AIF1 Tx Enables */
402  { 0x0000051A, 0x0000 }, /* R1306 - AIF1 Rx Enables */
403  { 0x0000051B, 0x0000 }, /* R1307 - AIF1 Force Write */
404  { 0x00000540, 0x000C }, /* R1344 - AIF2 BCLK Ctrl */
405  { 0x00000541, 0x0008 }, /* R1345 - AIF2 Tx Pin Ctrl */
406  { 0x00000542, 0x0000 }, /* R1346 - AIF2 Rx Pin Ctrl */
407  { 0x00000543, 0x0000 }, /* R1347 - AIF2 Rate Ctrl */
408  { 0x00000544, 0x0000 }, /* R1348 - AIF2 Format */
409  { 0x00000545, 0x0040 }, /* R1349 - AIF2 Tx BCLK Rate */
410  { 0x00000546, 0x0040 }, /* R1350 - AIF2 Rx BCLK Rate */
411  { 0x00000547, 0x1818 }, /* R1351 - AIF2 Frame Ctrl 1 */
412  { 0x00000548, 0x1818 }, /* R1352 - AIF2 Frame Ctrl 2 */
413  { 0x00000549, 0x0000 }, /* R1353 - AIF2 Frame Ctrl 3 */
414  { 0x0000054A, 0x0001 }, /* R1354 - AIF2 Frame Ctrl 4 */
415  { 0x00000551, 0x0000 }, /* R1361 - AIF2 Frame Ctrl 11 */
416  { 0x00000552, 0x0001 }, /* R1362 - AIF2 Frame Ctrl 12 */
417  { 0x00000559, 0x0000 }, /* R1369 - AIF2 Tx Enables */
418  { 0x0000055A, 0x0000 }, /* R1370 - AIF2 Rx Enables */
419  { 0x0000055B, 0x0000 }, /* R1371 - AIF2 Force Write */
420  { 0x00000580, 0x000C }, /* R1408 - AIF3 BCLK Ctrl */
421  { 0x00000581, 0x0008 }, /* R1409 - AIF3 Tx Pin Ctrl */
422  { 0x00000582, 0x0000 }, /* R1410 - AIF3 Rx Pin Ctrl */
423  { 0x00000583, 0x0000 }, /* R1411 - AIF3 Rate Ctrl */
424  { 0x00000584, 0x0000 }, /* R1412 - AIF3 Format */
425  { 0x00000585, 0x0040 }, /* R1413 - AIF3 Tx BCLK Rate */
426  { 0x00000586, 0x0040 }, /* R1414 - AIF3 Rx BCLK Rate */
427  { 0x00000587, 0x1818 }, /* R1415 - AIF3 Frame Ctrl 1 */
428  { 0x00000588, 0x1818 }, /* R1416 - AIF3 Frame Ctrl 2 */
429  { 0x00000589, 0x0000 }, /* R1417 - AIF3 Frame Ctrl 3 */
430  { 0x0000058A, 0x0001 }, /* R1418 - AIF3 Frame Ctrl 4 */
431  { 0x00000591, 0x0000 }, /* R1425 - AIF3 Frame Ctrl 11 */
432  { 0x00000592, 0x0001 }, /* R1426 - AIF3 Frame Ctrl 12 */
433  { 0x00000599, 0x0000 }, /* R1433 - AIF3 Tx Enables */
434  { 0x0000059A, 0x0000 }, /* R1434 - AIF3 Rx Enables */
435  { 0x0000059B, 0x0000 }, /* R1435 - AIF3 Force Write */
436  { 0x000005E3, 0x0004 }, /* R1507 - SLIMbus Framer Ref Gear */
437  { 0x000005E5, 0x0000 }, /* R1509 - SLIMbus Rates 1 */
438  { 0x000005E6, 0x0000 }, /* R1510 - SLIMbus Rates 2 */
439  { 0x000005E7, 0x0000 }, /* R1511 - SLIMbus Rates 3 */
440  { 0x000005E8, 0x0000 }, /* R1512 - SLIMbus Rates 4 */
441  { 0x000005E9, 0x0000 }, /* R1513 - SLIMbus Rates 5 */
442  { 0x000005EA, 0x0000 }, /* R1514 - SLIMbus Rates 6 */
443  { 0x000005EB, 0x0000 }, /* R1515 - SLIMbus Rates 7 */
444  { 0x000005EC, 0x0000 }, /* R1516 - SLIMbus Rates 8 */
445  { 0x000005F5, 0x0000 }, /* R1525 - SLIMbus RX Channel Enable */
446  { 0x000005F6, 0x0000 }, /* R1526 - SLIMbus TX Channel Enable */
447  { 0x00000640, 0x0000 }, /* R1600 - PWM1MIX Input 1 Source */
448  { 0x00000641, 0x0080 }, /* R1601 - PWM1MIX Input 1 Volume */
449  { 0x00000642, 0x0000 }, /* R1602 - PWM1MIX Input 2 Source */
450  { 0x00000643, 0x0080 }, /* R1603 - PWM1MIX Input 2 Volume */
451  { 0x00000644, 0x0000 }, /* R1604 - PWM1MIX Input 3 Source */
452  { 0x00000645, 0x0080 }, /* R1605 - PWM1MIX Input 3 Volume */
453  { 0x00000646, 0x0000 }, /* R1606 - PWM1MIX Input 4 Source */
454  { 0x00000647, 0x0080 }, /* R1607 - PWM1MIX Input 4 Volume */
455  { 0x00000648, 0x0000 }, /* R1608 - PWM2MIX Input 1 Source */
456  { 0x00000649, 0x0080 }, /* R1609 - PWM2MIX Input 1 Volume */
457  { 0x0000064A, 0x0000 }, /* R1610 - PWM2MIX Input 2 Source */
458  { 0x0000064B, 0x0080 }, /* R1611 - PWM2MIX Input 2 Volume */
459  { 0x0000064C, 0x0000 }, /* R1612 - PWM2MIX Input 3 Source */
460  { 0x0000064D, 0x0080 }, /* R1613 - PWM2MIX Input 3 Volume */
461  { 0x0000064E, 0x0000 }, /* R1614 - PWM2MIX Input 4 Source */
462  { 0x0000064F, 0x0080 }, /* R1615 - PWM2MIX Input 4 Volume */
463  { 0x00000660, 0x0000 }, /* R1632 - MICMIX Input 1 Source */
464  { 0x00000661, 0x0080 }, /* R1633 - MICMIX Input 1 Volume */
465  { 0x00000662, 0x0000 }, /* R1634 - MICMIX Input 2 Source */
466  { 0x00000663, 0x0080 }, /* R1635 - MICMIX Input 2 Volume */
467  { 0x00000664, 0x0000 }, /* R1636 - MICMIX Input 3 Source */
468  { 0x00000665, 0x0080 }, /* R1637 - MICMIX Input 3 Volume */
469  { 0x00000666, 0x0000 }, /* R1638 - MICMIX Input 4 Source */
470  { 0x00000667, 0x0080 }, /* R1639 - MICMIX Input 4 Volume */
471  { 0x00000668, 0x0000 }, /* R1640 - NOISEMIX Input 1 Source */
472  { 0x00000669, 0x0080 }, /* R1641 - NOISEMIX Input 1 Volume */
473  { 0x0000066A, 0x0000 }, /* R1642 - NOISEMIX Input 2 Source */
474  { 0x0000066B, 0x0080 }, /* R1643 - NOISEMIX Input 2 Volume */
475  { 0x0000066C, 0x0000 }, /* R1644 - NOISEMIX Input 3 Source */
476  { 0x0000066D, 0x0080 }, /* R1645 - NOISEMIX Input 3 Volume */
477  { 0x0000066E, 0x0000 }, /* R1646 - NOISEMIX Input 4 Source */
478  { 0x0000066F, 0x0080 }, /* R1647 - NOISEMIX Input 4 Volume */
479  { 0x00000680, 0x0000 }, /* R1664 - OUT1LMIX Input 1 Source */
480  { 0x00000681, 0x0080 }, /* R1665 - OUT1LMIX Input 1 Volume */
481  { 0x00000682, 0x0000 }, /* R1666 - OUT1LMIX Input 2 Source */
482  { 0x00000683, 0x0080 }, /* R1667 - OUT1LMIX Input 2 Volume */
483  { 0x00000684, 0x0000 }, /* R1668 - OUT1LMIX Input 3 Source */
484  { 0x00000685, 0x0080 }, /* R1669 - OUT1LMIX Input 3 Volume */
485  { 0x00000686, 0x0000 }, /* R1670 - OUT1LMIX Input 4 Source */
486  { 0x00000687, 0x0080 }, /* R1671 - OUT1LMIX Input 4 Volume */
487  { 0x00000688, 0x0000 }, /* R1672 - OUT1RMIX Input 1 Source */
488  { 0x00000689, 0x0080 }, /* R1673 - OUT1RMIX Input 1 Volume */
489  { 0x0000068A, 0x0000 }, /* R1674 - OUT1RMIX Input 2 Source */
490  { 0x0000068B, 0x0080 }, /* R1675 - OUT1RMIX Input 2 Volume */
491  { 0x0000068C, 0x0000 }, /* R1676 - OUT1RMIX Input 3 Source */
492  { 0x0000068D, 0x0080 }, /* R1677 - OUT1RMIX Input 3 Volume */
493  { 0x0000068E, 0x0000 }, /* R1678 - OUT1RMIX Input 4 Source */
494  { 0x0000068F, 0x0080 }, /* R1679 - OUT1RMIX Input 4 Volume */
495  { 0x00000690, 0x0000 }, /* R1680 - OUT2LMIX Input 1 Source */
496  { 0x00000691, 0x0080 }, /* R1681 - OUT2LMIX Input 1 Volume */
497  { 0x00000692, 0x0000 }, /* R1682 - OUT2LMIX Input 2 Source */
498  { 0x00000693, 0x0080 }, /* R1683 - OUT2LMIX Input 2 Volume */
499  { 0x00000694, 0x0000 }, /* R1684 - OUT2LMIX Input 3 Source */
500  { 0x00000695, 0x0080 }, /* R1685 - OUT2LMIX Input 3 Volume */
501  { 0x00000696, 0x0000 }, /* R1686 - OUT2LMIX Input 4 Source */
502  { 0x00000697, 0x0080 }, /* R1687 - OUT2LMIX Input 4 Volume */
503  { 0x00000698, 0x0000 }, /* R1688 - OUT2RMIX Input 1 Source */
504  { 0x00000699, 0x0080 }, /* R1689 - OUT2RMIX Input 1 Volume */
505  { 0x0000069A, 0x0000 }, /* R1690 - OUT2RMIX Input 2 Source */
506  { 0x0000069B, 0x0080 }, /* R1691 - OUT2RMIX Input 2 Volume */
507  { 0x0000069C, 0x0000 }, /* R1692 - OUT2RMIX Input 3 Source */
508  { 0x0000069D, 0x0080 }, /* R1693 - OUT2RMIX Input 3 Volume */
509  { 0x0000069E, 0x0000 }, /* R1694 - OUT2RMIX Input 4 Source */
510  { 0x0000069F, 0x0080 }, /* R1695 - OUT2RMIX Input 4 Volume */
511  { 0x000006A0, 0x0000 }, /* R1696 - OUT3LMIX Input 1 Source */
512  { 0x000006A1, 0x0080 }, /* R1697 - OUT3LMIX Input 1 Volume */
513  { 0x000006A2, 0x0000 }, /* R1698 - OUT3LMIX Input 2 Source */
514  { 0x000006A3, 0x0080 }, /* R1699 - OUT3LMIX Input 2 Volume */
515  { 0x000006A4, 0x0000 }, /* R1700 - OUT3LMIX Input 3 Source */
516  { 0x000006A5, 0x0080 }, /* R1701 - OUT3LMIX Input 3 Volume */
517  { 0x000006A6, 0x0000 }, /* R1702 - OUT3LMIX Input 4 Source */
518  { 0x000006A7, 0x0080 }, /* R1703 - OUT3LMIX Input 4 Volume */
519  { 0x000006B0, 0x0000 }, /* R1712 - OUT4LMIX Input 1 Source */
520  { 0x000006B1, 0x0080 }, /* R1713 - OUT4LMIX Input 1 Volume */
521  { 0x000006B2, 0x0000 }, /* R1714 - OUT4LMIX Input 2 Source */
522  { 0x000006B3, 0x0080 }, /* R1715 - OUT4LMIX Input 2 Volume */
523  { 0x000006B4, 0x0000 }, /* R1716 - OUT4LMIX Input 3 Source */
524  { 0x000006B5, 0x0080 }, /* R1717 - OUT4LMIX Input 3 Volume */
525  { 0x000006B6, 0x0000 }, /* R1718 - OUT4LMIX Input 4 Source */
526  { 0x000006B7, 0x0080 }, /* R1719 - OUT4LMIX Input 4 Volume */
527  { 0x000006B8, 0x0000 }, /* R1720 - OUT4RMIX Input 1 Source */
528  { 0x000006B9, 0x0080 }, /* R1721 - OUT4RMIX Input 1 Volume */
529  { 0x000006BA, 0x0000 }, /* R1722 - OUT4RMIX Input 2 Source */
530  { 0x000006BB, 0x0080 }, /* R1723 - OUT4RMIX Input 2 Volume */
531  { 0x000006BC, 0x0000 }, /* R1724 - OUT4RMIX Input 3 Source */
532  { 0x000006BD, 0x0080 }, /* R1725 - OUT4RMIX Input 3 Volume */
533  { 0x000006BE, 0x0000 }, /* R1726 - OUT4RMIX Input 4 Source */
534  { 0x000006BF, 0x0080 }, /* R1727 - OUT4RMIX Input 4 Volume */
535  { 0x000006C0, 0x0000 }, /* R1728 - OUT5LMIX Input 1 Source */
536  { 0x000006C1, 0x0080 }, /* R1729 - OUT5LMIX Input 1 Volume */
537  { 0x000006C2, 0x0000 }, /* R1730 - OUT5LMIX Input 2 Source */
538  { 0x000006C3, 0x0080 }, /* R1731 - OUT5LMIX Input 2 Volume */
539  { 0x000006C4, 0x0000 }, /* R1732 - OUT5LMIX Input 3 Source */
540  { 0x000006C5, 0x0080 }, /* R1733 - OUT5LMIX Input 3 Volume */
541  { 0x000006C6, 0x0000 }, /* R1734 - OUT5LMIX Input 4 Source */
542  { 0x000006C7, 0x0080 }, /* R1735 - OUT5LMIX Input 4 Volume */
543  { 0x000006C8, 0x0000 }, /* R1736 - OUT5RMIX Input 1 Source */
544  { 0x000006C9, 0x0080 }, /* R1737 - OUT5RMIX Input 1 Volume */
545  { 0x000006CA, 0x0000 }, /* R1738 - OUT5RMIX Input 2 Source */
546  { 0x000006CB, 0x0080 }, /* R1739 - OUT5RMIX Input 2 Volume */
547  { 0x000006CC, 0x0000 }, /* R1740 - OUT5RMIX Input 3 Source */
548  { 0x000006CD, 0x0080 }, /* R1741 - OUT5RMIX Input 3 Volume */
549  { 0x000006CE, 0x0000 }, /* R1742 - OUT5RMIX Input 4 Source */
550  { 0x000006CF, 0x0080 }, /* R1743 - OUT5RMIX Input 4 Volume */
551  { 0x00000700, 0x0000 }, /* R1792 - AIF1TX1MIX Input 1 Source */
552  { 0x00000701, 0x0080 }, /* R1793 - AIF1TX1MIX Input 1 Volume */
553  { 0x00000702, 0x0000 }, /* R1794 - AIF1TX1MIX Input 2 Source */
554  { 0x00000703, 0x0080 }, /* R1795 - AIF1TX1MIX Input 2 Volume */
555  { 0x00000704, 0x0000 }, /* R1796 - AIF1TX1MIX Input 3 Source */
556  { 0x00000705, 0x0080 }, /* R1797 - AIF1TX1MIX Input 3 Volume */
557  { 0x00000706, 0x0000 }, /* R1798 - AIF1TX1MIX Input 4 Source */
558  { 0x00000707, 0x0080 }, /* R1799 - AIF1TX1MIX Input 4 Volume */
559  { 0x00000708, 0x0000 }, /* R1800 - AIF1TX2MIX Input 1 Source */
560  { 0x00000709, 0x0080 }, /* R1801 - AIF1TX2MIX Input 1 Volume */
561  { 0x0000070A, 0x0000 }, /* R1802 - AIF1TX2MIX Input 2 Source */
562  { 0x0000070B, 0x0080 }, /* R1803 - AIF1TX2MIX Input 2 Volume */
563  { 0x0000070C, 0x0000 }, /* R1804 - AIF1TX2MIX Input 3 Source */
564  { 0x0000070D, 0x0080 }, /* R1805 - AIF1TX2MIX Input 3 Volume */
565  { 0x0000070E, 0x0000 }, /* R1806 - AIF1TX2MIX Input 4 Source */
566  { 0x0000070F, 0x0080 }, /* R1807 - AIF1TX2MIX Input 4 Volume */
567  { 0x00000710, 0x0000 }, /* R1808 - AIF1TX3MIX Input 1 Source */
568  { 0x00000711, 0x0080 }, /* R1809 - AIF1TX3MIX Input 1 Volume */
569  { 0x00000712, 0x0000 }, /* R1810 - AIF1TX3MIX Input 2 Source */
570  { 0x00000713, 0x0080 }, /* R1811 - AIF1TX3MIX Input 2 Volume */
571  { 0x00000714, 0x0000 }, /* R1812 - AIF1TX3MIX Input 3 Source */
572  { 0x00000715, 0x0080 }, /* R1813 - AIF1TX3MIX Input 3 Volume */
573  { 0x00000716, 0x0000 }, /* R1814 - AIF1TX3MIX Input 4 Source */
574  { 0x00000717, 0x0080 }, /* R1815 - AIF1TX3MIX Input 4 Volume */
575  { 0x00000718, 0x0000 }, /* R1816 - AIF1TX4MIX Input 1 Source */
576  { 0x00000719, 0x0080 }, /* R1817 - AIF1TX4MIX Input 1 Volume */
577  { 0x0000071A, 0x0000 }, /* R1818 - AIF1TX4MIX Input 2 Source */
578  { 0x0000071B, 0x0080 }, /* R1819 - AIF1TX4MIX Input 2 Volume */
579  { 0x0000071C, 0x0000 }, /* R1820 - AIF1TX4MIX Input 3 Source */
580  { 0x0000071D, 0x0080 }, /* R1821 - AIF1TX4MIX Input 3 Volume */
581  { 0x0000071E, 0x0000 }, /* R1822 - AIF1TX4MIX Input 4 Source */
582  { 0x0000071F, 0x0080 }, /* R1823 - AIF1TX4MIX Input 4 Volume */
583  { 0x00000720, 0x0000 }, /* R1824 - AIF1TX5MIX Input 1 Source */
584  { 0x00000721, 0x0080 }, /* R1825 - AIF1TX5MIX Input 1 Volume */
585  { 0x00000722, 0x0000 }, /* R1826 - AIF1TX5MIX Input 2 Source */
586  { 0x00000723, 0x0080 }, /* R1827 - AIF1TX5MIX Input 2 Volume */
587  { 0x00000724, 0x0000 }, /* R1828 - AIF1TX5MIX Input 3 Source */
588  { 0x00000725, 0x0080 }, /* R1829 - AIF1TX5MIX Input 3 Volume */
589  { 0x00000726, 0x0000 }, /* R1830 - AIF1TX5MIX Input 4 Source */
590  { 0x00000727, 0x0080 }, /* R1831 - AIF1TX5MIX Input 4 Volume */
591  { 0x00000728, 0x0000 }, /* R1832 - AIF1TX6MIX Input 1 Source */
592  { 0x00000729, 0x0080 }, /* R1833 - AIF1TX6MIX Input 1 Volume */
593  { 0x0000072A, 0x0000 }, /* R1834 - AIF1TX6MIX Input 2 Source */
594  { 0x0000072B, 0x0080 }, /* R1835 - AIF1TX6MIX Input 2 Volume */
595  { 0x0000072C, 0x0000 }, /* R1836 - AIF1TX6MIX Input 3 Source */
596  { 0x0000072D, 0x0080 }, /* R1837 - AIF1TX6MIX Input 3 Volume */
597  { 0x0000072E, 0x0000 }, /* R1838 - AIF1TX6MIX Input 4 Source */
598  { 0x0000072F, 0x0080 }, /* R1839 - AIF1TX6MIX Input 4 Volume */
599  { 0x00000730, 0x0000 }, /* R1840 - AIF1TX7MIX Input 1 Source */
600  { 0x00000731, 0x0080 }, /* R1841 - AIF1TX7MIX Input 1 Volume */
601  { 0x00000732, 0x0000 }, /* R1842 - AIF1TX7MIX Input 2 Source */
602  { 0x00000733, 0x0080 }, /* R1843 - AIF1TX7MIX Input 2 Volume */
603  { 0x00000734, 0x0000 }, /* R1844 - AIF1TX7MIX Input 3 Source */
604  { 0x00000735, 0x0080 }, /* R1845 - AIF1TX7MIX Input 3 Volume */
605  { 0x00000736, 0x0000 }, /* R1846 - AIF1TX7MIX Input 4 Source */
606  { 0x00000737, 0x0080 }, /* R1847 - AIF1TX7MIX Input 4 Volume */
607  { 0x00000738, 0x0000 }, /* R1848 - AIF1TX8MIX Input 1 Source */
608  { 0x00000739, 0x0080 }, /* R1849 - AIF1TX8MIX Input 1 Volume */
609  { 0x0000073A, 0x0000 }, /* R1850 - AIF1TX8MIX Input 2 Source */
610  { 0x0000073B, 0x0080 }, /* R1851 - AIF1TX8MIX Input 2 Volume */
611  { 0x0000073C, 0x0000 }, /* R1852 - AIF1TX8MIX Input 3 Source */
612  { 0x0000073D, 0x0080 }, /* R1853 - AIF1TX8MIX Input 3 Volume */
613  { 0x0000073E, 0x0000 }, /* R1854 - AIF1TX8MIX Input 4 Source */
614  { 0x0000073F, 0x0080 }, /* R1855 - AIF1TX8MIX Input 4 Volume */
615  { 0x00000740, 0x0000 }, /* R1856 - AIF2TX1MIX Input 1 Source */
616  { 0x00000741, 0x0080 }, /* R1857 - AIF2TX1MIX Input 1 Volume */
617  { 0x00000742, 0x0000 }, /* R1858 - AIF2TX1MIX Input 2 Source */
618  { 0x00000743, 0x0080 }, /* R1859 - AIF2TX1MIX Input 2 Volume */
619  { 0x00000744, 0x0000 }, /* R1860 - AIF2TX1MIX Input 3 Source */
620  { 0x00000745, 0x0080 }, /* R1861 - AIF2TX1MIX Input 3 Volume */
621  { 0x00000746, 0x0000 }, /* R1862 - AIF2TX1MIX Input 4 Source */
622  { 0x00000747, 0x0080 }, /* R1863 - AIF2TX1MIX Input 4 Volume */
623  { 0x00000748, 0x0000 }, /* R1864 - AIF2TX2MIX Input 1 Source */
624  { 0x00000749, 0x0080 }, /* R1865 - AIF2TX2MIX Input 1 Volume */
625  { 0x0000074A, 0x0000 }, /* R1866 - AIF2TX2MIX Input 2 Source */
626  { 0x0000074B, 0x0080 }, /* R1867 - AIF2TX2MIX Input 2 Volume */
627  { 0x0000074C, 0x0000 }, /* R1868 - AIF2TX2MIX Input 3 Source */
628  { 0x0000074D, 0x0080 }, /* R1869 - AIF2TX2MIX Input 3 Volume */
629  { 0x0000074E, 0x0000 }, /* R1870 - AIF2TX2MIX Input 4 Source */
630  { 0x0000074F, 0x0080 }, /* R1871 - AIF2TX2MIX Input 4 Volume */
631  { 0x00000780, 0x0000 }, /* R1920 - AIF3TX1MIX Input 1 Source */
632  { 0x00000781, 0x0080 }, /* R1921 - AIF3TX1MIX Input 1 Volume */
633  { 0x00000782, 0x0000 }, /* R1922 - AIF3TX1MIX Input 2 Source */
634  { 0x00000783, 0x0080 }, /* R1923 - AIF3TX1MIX Input 2 Volume */
635  { 0x00000784, 0x0000 }, /* R1924 - AIF3TX1MIX Input 3 Source */
636  { 0x00000785, 0x0080 }, /* R1925 - AIF3TX1MIX Input 3 Volume */
637  { 0x00000786, 0x0000 }, /* R1926 - AIF3TX1MIX Input 4 Source */
638  { 0x00000787, 0x0080 }, /* R1927 - AIF3TX1MIX Input 4 Volume */
639  { 0x00000788, 0x0000 }, /* R1928 - AIF3TX2MIX Input 1 Source */
640  { 0x00000789, 0x0080 }, /* R1929 - AIF3TX2MIX Input 1 Volume */
641  { 0x0000078A, 0x0000 }, /* R1930 - AIF3TX2MIX Input 2 Source */
642  { 0x0000078B, 0x0080 }, /* R1931 - AIF3TX2MIX Input 2 Volume */
643  { 0x0000078C, 0x0000 }, /* R1932 - AIF3TX2MIX Input 3 Source */
644  { 0x0000078D, 0x0080 }, /* R1933 - AIF3TX2MIX Input 3 Volume */
645  { 0x0000078E, 0x0000 }, /* R1934 - AIF3TX2MIX Input 4 Source */
646  { 0x0000078F, 0x0080 }, /* R1935 - AIF3TX2MIX Input 4 Volume */
647  { 0x000007C0, 0x0000 }, /* R1984 - SLIMTX1MIX Input 1 Source */
648  { 0x000007C1, 0x0080 }, /* R1985 - SLIMTX1MIX Input 1 Volume */
649  { 0x000007C2, 0x0000 }, /* R1986 - SLIMTX1MIX Input 2 Source */
650  { 0x000007C3, 0x0080 }, /* R1987 - SLIMTX1MIX Input 2 Volume */
651  { 0x000007C4, 0x0000 }, /* R1988 - SLIMTX1MIX Input 3 Source */
652  { 0x000007C5, 0x0080 }, /* R1989 - SLIMTX1MIX Input 3 Volume */
653  { 0x000007C6, 0x0000 }, /* R1990 - SLIMTX1MIX Input 4 Source */
654  { 0x000007C7, 0x0080 }, /* R1991 - SLIMTX1MIX Input 4 Volume */
655  { 0x000007C8, 0x0000 }, /* R1992 - SLIMTX2MIX Input 1 Source */
656  { 0x000007C9, 0x0080 }, /* R1993 - SLIMTX2MIX Input 1 Volume */
657  { 0x000007CA, 0x0000 }, /* R1994 - SLIMTX2MIX Input 2 Source */
658  { 0x000007CB, 0x0080 }, /* R1995 - SLIMTX2MIX Input 2 Volume */
659  { 0x000007CC, 0x0000 }, /* R1996 - SLIMTX2MIX Input 3 Source */
660  { 0x000007CD, 0x0080 }, /* R1997 - SLIMTX2MIX Input 3 Volume */
661  { 0x000007CE, 0x0000 }, /* R1998 - SLIMTX2MIX Input 4 Source */
662  { 0x000007CF, 0x0080 }, /* R1999 - SLIMTX2MIX Input 4 Volume */
663  { 0x000007D0, 0x0000 }, /* R2000 - SLIMTX3MIX Input 1 Source */
664  { 0x000007D1, 0x0080 }, /* R2001 - SLIMTX3MIX Input 1 Volume */
665  { 0x000007D2, 0x0000 }, /* R2002 - SLIMTX3MIX Input 2 Source */
666  { 0x000007D3, 0x0080 }, /* R2003 - SLIMTX3MIX Input 2 Volume */
667  { 0x000007D4, 0x0000 }, /* R2004 - SLIMTX3MIX Input 3 Source */
668  { 0x000007D5, 0x0080 }, /* R2005 - SLIMTX3MIX Input 3 Volume */
669  { 0x000007D6, 0x0000 }, /* R2006 - SLIMTX3MIX Input 4 Source */
670  { 0x000007D7, 0x0080 }, /* R2007 - SLIMTX3MIX Input 4 Volume */
671  { 0x000007D8, 0x0000 }, /* R2008 - SLIMTX4MIX Input 1 Source */
672  { 0x000007D9, 0x0080 }, /* R2009 - SLIMTX4MIX Input 1 Volume */
673  { 0x000007DA, 0x0000 }, /* R2010 - SLIMTX4MIX Input 2 Source */
674  { 0x000007DB, 0x0080 }, /* R2011 - SLIMTX4MIX Input 2 Volume */
675  { 0x000007DC, 0x0000 }, /* R2012 - SLIMTX4MIX Input 3 Source */
676  { 0x000007DD, 0x0080 }, /* R2013 - SLIMTX4MIX Input 3 Volume */
677  { 0x000007DE, 0x0000 }, /* R2014 - SLIMTX4MIX Input 4 Source */
678  { 0x000007DF, 0x0080 }, /* R2015 - SLIMTX4MIX Input 4 Volume */
679  { 0x000007E0, 0x0000 }, /* R2016 - SLIMTX5MIX Input 1 Source */
680  { 0x000007E1, 0x0080 }, /* R2017 - SLIMTX5MIX Input 1 Volume */
681  { 0x000007E2, 0x0000 }, /* R2018 - SLIMTX5MIX Input 2 Source */
682  { 0x000007E3, 0x0080 }, /* R2019 - SLIMTX5MIX Input 2 Volume */
683  { 0x000007E4, 0x0000 }, /* R2020 - SLIMTX5MIX Input 3 Source */
684  { 0x000007E5, 0x0080 }, /* R2021 - SLIMTX5MIX Input 3 Volume */
685  { 0x000007E6, 0x0000 }, /* R2022 - SLIMTX5MIX Input 4 Source */
686  { 0x000007E7, 0x0080 }, /* R2023 - SLIMTX5MIX Input 4 Volume */
687  { 0x000007E8, 0x0000 }, /* R2024 - SLIMTX6MIX Input 1 Source */
688  { 0x000007E9, 0x0080 }, /* R2025 - SLIMTX6MIX Input 1 Volume */
689  { 0x000007EA, 0x0000 }, /* R2026 - SLIMTX6MIX Input 2 Source */
690  { 0x000007EB, 0x0080 }, /* R2027 - SLIMTX6MIX Input 2 Volume */
691  { 0x000007EC, 0x0000 }, /* R2028 - SLIMTX6MIX Input 3 Source */
692  { 0x000007ED, 0x0080 }, /* R2029 - SLIMTX6MIX Input 3 Volume */
693  { 0x000007EE, 0x0000 }, /* R2030 - SLIMTX6MIX Input 4 Source */
694  { 0x000007EF, 0x0080 }, /* R2031 - SLIMTX6MIX Input 4 Volume */
695  { 0x000007F0, 0x0000 }, /* R2032 - SLIMTX7MIX Input 1 Source */
696  { 0x000007F1, 0x0080 }, /* R2033 - SLIMTX7MIX Input 1 Volume */
697  { 0x000007F2, 0x0000 }, /* R2034 - SLIMTX7MIX Input 2 Source */
698  { 0x000007F3, 0x0080 }, /* R2035 - SLIMTX7MIX Input 2 Volume */
699  { 0x000007F4, 0x0000 }, /* R2036 - SLIMTX7MIX Input 3 Source */
700  { 0x000007F5, 0x0080 }, /* R2037 - SLIMTX7MIX Input 3 Volume */
701  { 0x000007F6, 0x0000 }, /* R2038 - SLIMTX7MIX Input 4 Source */
702  { 0x000007F7, 0x0080 }, /* R2039 - SLIMTX7MIX Input 4 Volume */
703  { 0x000007F8, 0x0000 }, /* R2040 - SLIMTX8MIX Input 1 Source */
704  { 0x000007F9, 0x0080 }, /* R2041 - SLIMTX8MIX Input 1 Volume */
705  { 0x000007FA, 0x0000 }, /* R2042 - SLIMTX8MIX Input 2 Source */
706  { 0x000007FB, 0x0080 }, /* R2043 - SLIMTX8MIX Input 2 Volume */
707  { 0x000007FC, 0x0000 }, /* R2044 - SLIMTX8MIX Input 3 Source */
708  { 0x000007FD, 0x0080 }, /* R2045 - SLIMTX8MIX Input 3 Volume */
709  { 0x000007FE, 0x0000 }, /* R2046 - SLIMTX8MIX Input 4 Source */
710  { 0x000007FF, 0x0080 }, /* R2047 - SLIMTX8MIX Input 4 Volume */
711  { 0x00000880, 0x0000 }, /* R2176 - EQ1MIX Input 1 Source */
712  { 0x00000881, 0x0080 }, /* R2177 - EQ1MIX Input 1 Volume */
713  { 0x00000882, 0x0000 }, /* R2178 - EQ1MIX Input 2 Source */
714  { 0x00000883, 0x0080 }, /* R2179 - EQ1MIX Input 2 Volume */
715  { 0x00000884, 0x0000 }, /* R2180 - EQ1MIX Input 3 Source */
716  { 0x00000885, 0x0080 }, /* R2181 - EQ1MIX Input 3 Volume */
717  { 0x00000886, 0x0000 }, /* R2182 - EQ1MIX Input 4 Source */
718  { 0x00000887, 0x0080 }, /* R2183 - EQ1MIX Input 4 Volume */
719  { 0x00000888, 0x0000 }, /* R2184 - EQ2MIX Input 1 Source */
720  { 0x00000889, 0x0080 }, /* R2185 - EQ2MIX Input 1 Volume */
721  { 0x0000088A, 0x0000 }, /* R2186 - EQ2MIX Input 2 Source */
722  { 0x0000088B, 0x0080 }, /* R2187 - EQ2MIX Input 2 Volume */
723  { 0x0000088C, 0x0000 }, /* R2188 - EQ2MIX Input 3 Source */
724  { 0x0000088D, 0x0080 }, /* R2189 - EQ2MIX Input 3 Volume */
725  { 0x0000088E, 0x0000 }, /* R2190 - EQ2MIX Input 4 Source */
726  { 0x0000088F, 0x0080 }, /* R2191 - EQ2MIX Input 4 Volume */
727  { 0x00000890, 0x0000 }, /* R2192 - EQ3MIX Input 1 Source */
728  { 0x00000891, 0x0080 }, /* R2193 - EQ3MIX Input 1 Volume */
729  { 0x00000892, 0x0000 }, /* R2194 - EQ3MIX Input 2 Source */
730  { 0x00000893, 0x0080 }, /* R2195 - EQ3MIX Input 2 Volume */
731  { 0x00000894, 0x0000 }, /* R2196 - EQ3MIX Input 3 Source */
732  { 0x00000895, 0x0080 }, /* R2197 - EQ3MIX Input 3 Volume */
733  { 0x00000896, 0x0000 }, /* R2198 - EQ3MIX Input 4 Source */
734  { 0x00000897, 0x0080 }, /* R2199 - EQ3MIX Input 4 Volume */
735  { 0x00000898, 0x0000 }, /* R2200 - EQ4MIX Input 1 Source */
736  { 0x00000899, 0x0080 }, /* R2201 - EQ4MIX Input 1 Volume */
737  { 0x0000089A, 0x0000 }, /* R2202 - EQ4MIX Input 2 Source */
738  { 0x0000089B, 0x0080 }, /* R2203 - EQ4MIX Input 2 Volume */
739  { 0x0000089C, 0x0000 }, /* R2204 - EQ4MIX Input 3 Source */
740  { 0x0000089D, 0x0080 }, /* R2205 - EQ4MIX Input 3 Volume */
741  { 0x0000089E, 0x0000 }, /* R2206 - EQ4MIX Input 4 Source */
742  { 0x0000089F, 0x0080 }, /* R2207 - EQ4MIX Input 4 Volume */
743  { 0x000008C0, 0x0000 }, /* R2240 - DRC1LMIX Input 1 Source */
744  { 0x000008C1, 0x0080 }, /* R2241 - DRC1LMIX Input 1 Volume */
745  { 0x000008C2, 0x0000 }, /* R2242 - DRC1LMIX Input 2 Source */
746  { 0x000008C3, 0x0080 }, /* R2243 - DRC1LMIX Input 2 Volume */
747  { 0x000008C4, 0x0000 }, /* R2244 - DRC1LMIX Input 3 Source */
748  { 0x000008C5, 0x0080 }, /* R2245 - DRC1LMIX Input 3 Volume */
749  { 0x000008C6, 0x0000 }, /* R2246 - DRC1LMIX Input 4 Source */
750  { 0x000008C7, 0x0080 }, /* R2247 - DRC1LMIX Input 4 Volume */
751  { 0x000008C8, 0x0000 }, /* R2248 - DRC1RMIX Input 1 Source */
752  { 0x000008C9, 0x0080 }, /* R2249 - DRC1RMIX Input 1 Volume */
753  { 0x000008CA, 0x0000 }, /* R2250 - DRC1RMIX Input 2 Source */
754  { 0x000008CB, 0x0080 }, /* R2251 - DRC1RMIX Input 2 Volume */
755  { 0x000008CC, 0x0000 }, /* R2252 - DRC1RMIX Input 3 Source */
756  { 0x000008CD, 0x0080 }, /* R2253 - DRC1RMIX Input 3 Volume */
757  { 0x000008CE, 0x0000 }, /* R2254 - DRC1RMIX Input 4 Source */
758  { 0x000008CF, 0x0080 }, /* R2255 - DRC1RMIX Input 4 Volume */
759  { 0x000008D0, 0x0000 }, /* R2256 - DRC2LMIX Input 1 Source */
760  { 0x000008D1, 0x0080 }, /* R2257 - DRC2LMIX Input 1 Volume */
761  { 0x000008D2, 0x0000 }, /* R2258 - DRC2LMIX Input 2 Source */
762  { 0x000008D3, 0x0080 }, /* R2259 - DRC2LMIX Input 2 Volume */
763  { 0x000008D4, 0x0000 }, /* R2260 - DRC2LMIX Input 3 Source */
764  { 0x000008D5, 0x0080 }, /* R2261 - DRC2LMIX Input 3 Volume */
765  { 0x000008D6, 0x0000 }, /* R2262 - DRC2LMIX Input 4 Source */
766  { 0x000008D7, 0x0080 }, /* R2263 - DRC2LMIX Input 4 Volume */
767  { 0x000008D8, 0x0000 }, /* R2264 - DRC2RMIX Input 1 Source */
768  { 0x000008D9, 0x0080 }, /* R2265 - DRC2RMIX Input 1 Volume */
769  { 0x000008DA, 0x0000 }, /* R2266 - DRC2RMIX Input 2 Source */
770  { 0x000008DB, 0x0080 }, /* R2267 - DRC2RMIX Input 2 Volume */
771  { 0x000008DC, 0x0000 }, /* R2268 - DRC2RMIX Input 3 Source */
772  { 0x000008DD, 0x0080 }, /* R2269 - DRC2RMIX Input 3 Volume */
773  { 0x000008DE, 0x0000 }, /* R2270 - DRC2RMIX Input 4 Source */
774  { 0x000008DF, 0x0080 }, /* R2271 - DRC2RMIX Input 4 Volume */
775  { 0x00000900, 0x0000 }, /* R2304 - HPLP1MIX Input 1 Source */
776  { 0x00000901, 0x0080 }, /* R2305 - HPLP1MIX Input 1 Volume */
777  { 0x00000902, 0x0000 }, /* R2306 - HPLP1MIX Input 2 Source */
778  { 0x00000903, 0x0080 }, /* R2307 - HPLP1MIX Input 2 Volume */
779  { 0x00000904, 0x0000 }, /* R2308 - HPLP1MIX Input 3 Source */
780  { 0x00000905, 0x0080 }, /* R2309 - HPLP1MIX Input 3 Volume */
781  { 0x00000906, 0x0000 }, /* R2310 - HPLP1MIX Input 4 Source */
782  { 0x00000907, 0x0080 }, /* R2311 - HPLP1MIX Input 4 Volume */
783  { 0x00000908, 0x0000 }, /* R2312 - HPLP2MIX Input 1 Source */
784  { 0x00000909, 0x0080 }, /* R2313 - HPLP2MIX Input 1 Volume */
785  { 0x0000090A, 0x0000 }, /* R2314 - HPLP2MIX Input 2 Source */
786  { 0x0000090B, 0x0080 }, /* R2315 - HPLP2MIX Input 2 Volume */
787  { 0x0000090C, 0x0000 }, /* R2316 - HPLP2MIX Input 3 Source */
788  { 0x0000090D, 0x0080 }, /* R2317 - HPLP2MIX Input 3 Volume */
789  { 0x0000090E, 0x0000 }, /* R2318 - HPLP2MIX Input 4 Source */
790  { 0x0000090F, 0x0080 }, /* R2319 - HPLP2MIX Input 4 Volume */
791  { 0x00000910, 0x0000 }, /* R2320 - HPLP3MIX Input 1 Source */
792  { 0x00000911, 0x0080 }, /* R2321 - HPLP3MIX Input 1 Volume */
793  { 0x00000912, 0x0000 }, /* R2322 - HPLP3MIX Input 2 Source */
794  { 0x00000913, 0x0080 }, /* R2323 - HPLP3MIX Input 2 Volume */
795  { 0x00000914, 0x0000 }, /* R2324 - HPLP3MIX Input 3 Source */
796  { 0x00000915, 0x0080 }, /* R2325 - HPLP3MIX Input 3 Volume */
797  { 0x00000916, 0x0000 }, /* R2326 - HPLP3MIX Input 4 Source */
798  { 0x00000917, 0x0080 }, /* R2327 - HPLP3MIX Input 4 Volume */
799  { 0x00000918, 0x0000 }, /* R2328 - HPLP4MIX Input 1 Source */
800  { 0x00000919, 0x0080 }, /* R2329 - HPLP4MIX Input 1 Volume */
801  { 0x0000091A, 0x0000 }, /* R2330 - HPLP4MIX Input 2 Source */
802  { 0x0000091B, 0x0080 }, /* R2331 - HPLP4MIX Input 2 Volume */
803  { 0x0000091C, 0x0000 }, /* R2332 - HPLP4MIX Input 3 Source */
804  { 0x0000091D, 0x0080 }, /* R2333 - HPLP4MIX Input 3 Volume */
805  { 0x0000091E, 0x0000 }, /* R2334 - HPLP4MIX Input 4 Source */
806  { 0x0000091F, 0x0080 }, /* R2335 - HPLP4MIX Input 4 Volume */
807  { 0x00000940, 0x0000 }, /* R2368 - DSP1LMIX Input 1 Source */
808  { 0x00000941, 0x0080 }, /* R2369 - DSP1LMIX Input 1 Volume */
809  { 0x00000942, 0x0000 }, /* R2370 - DSP1LMIX Input 2 Source */
810  { 0x00000943, 0x0080 }, /* R2371 - DSP1LMIX Input 2 Volume */
811  { 0x00000944, 0x0000 }, /* R2372 - DSP1LMIX Input 3 Source */
812  { 0x00000945, 0x0080 }, /* R2373 - DSP1LMIX Input 3 Volume */
813  { 0x00000946, 0x0000 }, /* R2374 - DSP1LMIX Input 4 Source */
814  { 0x00000947, 0x0080 }, /* R2375 - DSP1LMIX Input 4 Volume */
815  { 0x00000948, 0x0000 }, /* R2376 - DSP1RMIX Input 1 Source */
816  { 0x00000949, 0x0080 }, /* R2377 - DSP1RMIX Input 1 Volume */
817  { 0x0000094A, 0x0000 }, /* R2378 - DSP1RMIX Input 2 Source */
818  { 0x0000094B, 0x0080 }, /* R2379 - DSP1RMIX Input 2 Volume */
819  { 0x0000094C, 0x0000 }, /* R2380 - DSP1RMIX Input 3 Source */
820  { 0x0000094D, 0x0080 }, /* R2381 - DSP1RMIX Input 3 Volume */
821  { 0x0000094E, 0x0000 }, /* R2382 - DSP1RMIX Input 4 Source */
822  { 0x0000094F, 0x0080 }, /* R2383 - DSP1RMIX Input 4 Volume */
823  { 0x00000950, 0x0000 }, /* R2384 - DSP1AUX1MIX Input 1 Source */
824  { 0x00000958, 0x0000 }, /* R2392 - DSP1AUX2MIX Input 1 Source */
825  { 0x00000960, 0x0000 }, /* R2400 - DSP1AUX3MIX Input 1 Source */
826  { 0x00000968, 0x0000 }, /* R2408 - DSP1AUX4MIX Input 1 Source */
827  { 0x00000970, 0x0000 }, /* R2416 - DSP1AUX5MIX Input 1 Source */
828  { 0x00000978, 0x0000 }, /* R2424 - DSP1AUX6MIX Input 1 Source */
829  { 0x00000A80, 0x0000 }, /* R2688 - ASRC1LMIX Input 1 Source */
830  { 0x00000A88, 0x0000 }, /* R2696 - ASRC1RMIX Input 1 Source */
831  { 0x00000A90, 0x0000 }, /* R2704 - ASRC2LMIX Input 1 Source */
832  { 0x00000A98, 0x0000 }, /* R2712 - ASRC2RMIX Input 1 Source */
833  { 0x00000B00, 0x0000 }, /* R2816 - ISRC1DEC1MIX Input 1 Source */
834  { 0x00000B08, 0x0000 }, /* R2824 - ISRC1DEC2MIX Input 1 Source */
835  { 0x00000B20, 0x0000 }, /* R2848 - ISRC1INT1MIX Input 1 Source */
836  { 0x00000B28, 0x0000 }, /* R2856 - ISRC1INT2MIX Input 1 Source */
837  { 0x00000B40, 0x0000 }, /* R2880 - ISRC2DEC1MIX Input 1 Source */
838  { 0x00000B48, 0x0000 }, /* R2888 - ISRC2DEC2MIX Input 1 Source */
839  { 0x00000B60, 0x0000 }, /* R2912 - ISRC2INT1MIX Input 1 Source */
840  { 0x00000B68, 0x0000 }, /* R2920 - ISRC2INT2MIX Input 1 Source */
841  { 0x00000C00, 0xA101 }, /* R3072 - GPIO1 CTRL */
842  { 0x00000C01, 0xA101 }, /* R3073 - GPIO2 CTRL */
843  { 0x00000C02, 0xA101 }, /* R3074 - GPIO3 CTRL */
844  { 0x00000C03, 0xA101 }, /* R3075 - GPIO4 CTRL */
845  { 0x00000C04, 0xA101 }, /* R3076 - GPIO5 CTRL */
846  { 0x00000C0F, 0x0400 }, /* R3087 - IRQ CTRL 1 */
847  { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */
848  { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */
849  { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */
850  { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */
851  { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */
852  { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */
853  { 0x00000C25, 0x0000 }, /* R3109 - Misc Pad Ctrl 6 */
854  { 0x00000D08, 0xFFFF }, /* R3336 - Interrupt Status 1 Mask */
855  { 0x00000D09, 0xFFFF }, /* R3337 - Interrupt Status 2 Mask */
856  { 0x00000D0A, 0xFFFF }, /* R3338 - Interrupt Status 3 Mask */
857  { 0x00000D0B, 0xFFFF }, /* R3339 - Interrupt Status 4 Mask */
858  { 0x00000D0C, 0xFEFF }, /* R3340 - Interrupt Status 5 Mask */
859  { 0x00000D0F, 0x0000 }, /* R3343 - Interrupt Control */
860  { 0x00000D18, 0xFFFF }, /* R3352 - IRQ2 Status 1 Mask */
861  { 0x00000D19, 0xFFFF }, /* R3353 - IRQ2 Status 2 Mask */
862  { 0x00000D1A, 0xFFFF }, /* R3354 - IRQ2 Status 3 Mask */
863  { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */
864  { 0x00000D1C, 0xFFFF }, /* R3356 - IRQ2 Status 5 Mask */
865  { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */
866  { 0x00000D41, 0x0000 }, /* R3393 - ADSP2 IRQ0 */
867  { 0x00000D53, 0xFFFF }, /* R3411 - AOD IRQ Mask IRQ1 */
868  { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */
869  { 0x00000D56, 0x0000 }, /* R3414 - Jack detect debounce */
870  { 0x00000E00, 0x0000 }, /* R3584 - FX_Ctrl1 */
871  { 0x00000E01, 0x0000 }, /* R3585 - FX_Ctrl2 */
872  { 0x00000E10, 0x6318 }, /* R3600 - EQ1_1 */
873  { 0x00000E11, 0x6300 }, /* R3601 - EQ1_2 */
874  { 0x00000E12, 0x0FC8 }, /* R3602 - EQ1_3 */
875  { 0x00000E13, 0x03FE }, /* R3603 - EQ1_4 */
876  { 0x00000E14, 0x00E0 }, /* R3604 - EQ1_5 */
877  { 0x00000E15, 0x1EC4 }, /* R3605 - EQ1_6 */
878  { 0x00000E16, 0xF136 }, /* R3606 - EQ1_7 */
879  { 0x00000E17, 0x0409 }, /* R3607 - EQ1_8 */
880  { 0x00000E18, 0x04CC }, /* R3608 - EQ1_9 */
881  { 0x00000E19, 0x1C9B }, /* R3609 - EQ1_10 */
882  { 0x00000E1A, 0xF337 }, /* R3610 - EQ1_11 */
883  { 0x00000E1B, 0x040B }, /* R3611 - EQ1_12 */
884  { 0x00000E1C, 0x0CBB }, /* R3612 - EQ1_13 */
885  { 0x00000E1D, 0x16F8 }, /* R3613 - EQ1_14 */
886  { 0x00000E1E, 0xF7D9 }, /* R3614 - EQ1_15 */
887  { 0x00000E1F, 0x040A }, /* R3615 - EQ1_16 */
888  { 0x00000E20, 0x1F14 }, /* R3616 - EQ1_17 */
889  { 0x00000E21, 0x058C }, /* R3617 - EQ1_18 */
890  { 0x00000E22, 0x0563 }, /* R3618 - EQ1_19 */
891  { 0x00000E23, 0x4000 }, /* R3619 - EQ1_20 */
892  { 0x00000E24, 0x0B75 }, /* R3620 - EQ1_21 */
893  { 0x00000E26, 0x6318 }, /* R3622 - EQ2_1 */
894  { 0x00000E27, 0x6300 }, /* R3623 - EQ2_2 */
895  { 0x00000E28, 0x0FC8 }, /* R3624 - EQ2_3 */
896  { 0x00000E29, 0x03FE }, /* R3625 - EQ2_4 */
897  { 0x00000E2A, 0x00E0 }, /* R3626 - EQ2_5 */
898  { 0x00000E2B, 0x1EC4 }, /* R3627 - EQ2_6 */
899  { 0x00000E2C, 0xF136 }, /* R3628 - EQ2_7 */
900  { 0x00000E2D, 0x0409 }, /* R3629 - EQ2_8 */
901  { 0x00000E2E, 0x04CC }, /* R3630 - EQ2_9 */
902  { 0x00000E2F, 0x1C9B }, /* R3631 - EQ2_10 */
903  { 0x00000E30, 0xF337 }, /* R3632 - EQ2_11 */
904  { 0x00000E31, 0x040B }, /* R3633 - EQ2_12 */
905  { 0x00000E32, 0x0CBB }, /* R3634 - EQ2_13 */
906  { 0x00000E33, 0x16F8 }, /* R3635 - EQ2_14 */
907  { 0x00000E34, 0xF7D9 }, /* R3636 - EQ2_15 */
908  { 0x00000E35, 0x040A }, /* R3637 - EQ2_16 */
909  { 0x00000E36, 0x1F14 }, /* R3638 - EQ2_17 */
910  { 0x00000E37, 0x058C }, /* R3639 - EQ2_18 */
911  { 0x00000E38, 0x0563 }, /* R3640 - EQ2_19 */
912  { 0x00000E39, 0x4000 }, /* R3641 - EQ2_20 */
913  { 0x00000E3A, 0x0B75 }, /* R3642 - EQ2_21 */
914  { 0x00000E3C, 0x6318 }, /* R3644 - EQ3_1 */
915  { 0x00000E3D, 0x6300 }, /* R3645 - EQ3_2 */
916  { 0x00000E3E, 0x0FC8 }, /* R3646 - EQ3_3 */
917  { 0x00000E3F, 0x03FE }, /* R3647 - EQ3_4 */
918  { 0x00000E40, 0x00E0 }, /* R3648 - EQ3_5 */
919  { 0x00000E41, 0x1EC4 }, /* R3649 - EQ3_6 */
920  { 0x00000E42, 0xF136 }, /* R3650 - EQ3_7 */
921  { 0x00000E43, 0x0409 }, /* R3651 - EQ3_8 */
922  { 0x00000E44, 0x04CC }, /* R3652 - EQ3_9 */
923  { 0x00000E45, 0x1C9B }, /* R3653 - EQ3_10 */
924  { 0x00000E46, 0xF337 }, /* R3654 - EQ3_11 */
925  { 0x00000E47, 0x040B }, /* R3655 - EQ3_12 */
926  { 0x00000E48, 0x0CBB }, /* R3656 - EQ3_13 */
927  { 0x00000E49, 0x16F8 }, /* R3657 - EQ3_14 */
928  { 0x00000E4A, 0xF7D9 }, /* R3658 - EQ3_15 */
929  { 0x00000E4B, 0x040A }, /* R3659 - EQ3_16 */
930  { 0x00000E4C, 0x1F14 }, /* R3660 - EQ3_17 */
931  { 0x00000E4D, 0x058C }, /* R3661 - EQ3_18 */
932  { 0x00000E4E, 0x0563 }, /* R3662 - EQ3_19 */
933  { 0x00000E4F, 0x4000 }, /* R3663 - EQ3_20 */
934  { 0x00000E50, 0x0B75 }, /* R3664 - EQ3_21 */
935  { 0x00000E52, 0x6318 }, /* R3666 - EQ4_1 */
936  { 0x00000E53, 0x6300 }, /* R3667 - EQ4_2 */
937  { 0x00000E54, 0x0FC8 }, /* R3668 - EQ4_3 */
938  { 0x00000E55, 0x03FE }, /* R3669 - EQ4_4 */
939  { 0x00000E56, 0x00E0 }, /* R3670 - EQ4_5 */
940  { 0x00000E57, 0x1EC4 }, /* R3671 - EQ4_6 */
941  { 0x00000E58, 0xF136 }, /* R3672 - EQ4_7 */
942  { 0x00000E59, 0x0409 }, /* R3673 - EQ4_8 */
943  { 0x00000E5A, 0x04CC }, /* R3674 - EQ4_9 */
944  { 0x00000E5B, 0x1C9B }, /* R3675 - EQ4_10 */
945  { 0x00000E5C, 0xF337 }, /* R3676 - EQ4_11 */
946  { 0x00000E5D, 0x040B }, /* R3677 - EQ4_12 */
947  { 0x00000E5E, 0x0CBB }, /* R3678 - EQ4_13 */
948  { 0x00000E5F, 0x16F8 }, /* R3679 - EQ4_14 */
949  { 0x00000E60, 0xF7D9 }, /* R3680 - EQ4_15 */
950  { 0x00000E61, 0x040A }, /* R3681 - EQ4_16 */
951  { 0x00000E62, 0x1F14 }, /* R3682 - EQ4_17 */
952  { 0x00000E63, 0x058C }, /* R3683 - EQ4_18 */
953  { 0x00000E64, 0x0563 }, /* R3684 - EQ4_19 */
954  { 0x00000E65, 0x4000 }, /* R3685 - EQ4_20 */
955  { 0x00000E66, 0x0B75 }, /* R3686 - EQ4_21 */
956  { 0x00000E80, 0x0018 }, /* R3712 - DRC1 ctrl1 */
957  { 0x00000E81, 0x0933 }, /* R3713 - DRC1 ctrl2 */
958  { 0x00000E82, 0x0018 }, /* R3714 - DRC1 ctrl3 */
959  { 0x00000E83, 0x0000 }, /* R3715 - DRC1 ctrl4 */
960  { 0x00000E84, 0x0000 }, /* R3716 - DRC1 ctrl5 */
961  { 0x00000E89, 0x0018 }, /* R3721 - DRC2 ctrl1 */
962  { 0x00000E8A, 0x0933 }, /* R3722 - DRC2 ctrl2 */
963  { 0x00000E8B, 0x0018 }, /* R3723 - DRC2 ctrl3 */
964  { 0x00000E8C, 0x0000 }, /* R3724 - DRC2 ctrl4 */
965  { 0x00000E8D, 0x0000 }, /* R3725 - DRC2 ctrl5 */
966  { 0x00000EC0, 0x0000 }, /* R3776 - HPLPF1_1 */
967  { 0x00000EC1, 0x0000 }, /* R3777 - HPLPF1_2 */
968  { 0x00000EC4, 0x0000 }, /* R3780 - HPLPF2_1 */
969  { 0x00000EC5, 0x0000 }, /* R3781 - HPLPF2_2 */
970  { 0x00000EC8, 0x0000 }, /* R3784 - HPLPF3_1 */
971  { 0x00000EC9, 0x0000 }, /* R3785 - HPLPF3_2 */
972  { 0x00000ECC, 0x0000 }, /* R3788 - HPLPF4_1 */
973  { 0x00000ECD, 0x0000 }, /* R3789 - HPLPF4_2 */
974  { 0x00000EE0, 0x0000 }, /* R3808 - ASRC_ENABLE */
975  { 0x00000EE2, 0x0000 }, /* R3810 - ASRC_RATE1 */
976  { 0x00000EE3, 0x4000 }, /* R3811 - ASRC_RATE2 */
977  { 0x00000EF0, 0x0000 }, /* R3824 - ISRC 1 CTRL 1 */
978  { 0x00000EF1, 0x0000 }, /* R3825 - ISRC 1 CTRL 2 */
979  { 0x00000EF2, 0x0000 }, /* R3826 - ISRC 1 CTRL 3 */
980  { 0x00000EF3, 0x0000 }, /* R3827 - ISRC 2 CTRL 1 */
981  { 0x00000EF4, 0x0000 }, /* R3828 - ISRC 2 CTRL 2 */
982  { 0x00000EF5, 0x0000 }, /* R3829 - ISRC 2 CTRL 3 */
983  { 0x00000EF6, 0x0000 }, /* R3830 - ISRC 3 CTRL 1 */
984  { 0x00000EF7, 0x0000 }, /* R3831 - ISRC 3 CTRL 2 */
985  { 0x00000EF8, 0x0000 }, /* R3832 - ISRC 3 CTRL 3 */
986  { 0x00001100, 0x0010 }, /* R4352 - DSP1 Control 1 */
987  { 0x00001101, 0x0000 }, /* R4353 - DSP1 Clocking 1 */
988 };
989 
990 static bool wm5102_readable_register(struct device *dev, unsigned int reg)
991 {
992  switch (reg) {
1007  case ARIZONA_PWM_DRIVE_1:
1008  case ARIZONA_PWM_DRIVE_2:
1009  case ARIZONA_PWM_DRIVE_3:
1010  case ARIZONA_WAKE_CONTROL:
1032  case ARIZONA_CLOCK_32K_1:
1034  case ARIZONA_SAMPLE_RATE_1:
1035  case ARIZONA_SAMPLE_RATE_2:
1036  case ARIZONA_SAMPLE_RATE_3:
1040  case ARIZONA_ASYNC_CLOCK_1:
1089  case ARIZONA_MIC_DETECT_1:
1090  case ARIZONA_MIC_DETECT_2:
1091  case ARIZONA_MIC_DETECT_3:
1095  case ARIZONA_INPUT_ENABLES:
1096  case ARIZONA_INPUT_RATE:
1098  case ARIZONA_IN1L_CONTROL:
1101  case ARIZONA_IN1R_CONTROL:
1104  case ARIZONA_IN2L_CONTROL:
1107  case ARIZONA_IN2R_CONTROL:
1110  case ARIZONA_IN3L_CONTROL:
1113  case ARIZONA_IN3R_CONTROL:
1118  case ARIZONA_OUTPUT_RATE_1:
1145  case ARIZONA_OUT_VOLUME_4L:
1149  case ARIZONA_OUT_VOLUME_4R:
1163  case ARIZONA_DAC_COMP_1:
1164  case ARIZONA_DAC_COMP_2:
1165  case ARIZONA_DAC_COMP_3:
1166  case ARIZONA_DAC_COMP_4:
1171  case ARIZONA_AIF1_FORMAT:
1199  case ARIZONA_AIF2_FORMAT:
1215  case ARIZONA_AIF3_FORMAT:
1634  case ARIZONA_GPIO1_CTRL:
1635  case ARIZONA_GPIO2_CTRL:
1636  case ARIZONA_GPIO3_CTRL:
1637  case ARIZONA_GPIO4_CTRL:
1638  case ARIZONA_GPIO5_CTRL:
1639  case ARIZONA_IRQ_CTRL_1:
1658  case ARIZONA_IRQ2_STATUS_1:
1659  case ARIZONA_IRQ2_STATUS_2:
1660  case ARIZONA_IRQ2_STATUS_3:
1661  case ARIZONA_IRQ2_STATUS_4:
1662  case ARIZONA_IRQ2_STATUS_5:
1668  case ARIZONA_IRQ2_CONTROL:
1677  case ARIZONA_ADSP2_IRQ0:
1679  case ARIZONA_AOD_IRQ1:
1680  case ARIZONA_AOD_IRQ2:
1685  case ARIZONA_FX_CTRL1:
1686  case ARIZONA_FX_CTRL2:
1687  case ARIZONA_EQ1_1:
1688  case ARIZONA_EQ1_2:
1689  case ARIZONA_EQ1_3:
1690  case ARIZONA_EQ1_4:
1691  case ARIZONA_EQ1_5:
1692  case ARIZONA_EQ1_6:
1693  case ARIZONA_EQ1_7:
1694  case ARIZONA_EQ1_8:
1695  case ARIZONA_EQ1_9:
1696  case ARIZONA_EQ1_10:
1697  case ARIZONA_EQ1_11:
1698  case ARIZONA_EQ1_12:
1699  case ARIZONA_EQ1_13:
1700  case ARIZONA_EQ1_14:
1701  case ARIZONA_EQ1_15:
1702  case ARIZONA_EQ1_16:
1703  case ARIZONA_EQ1_17:
1704  case ARIZONA_EQ1_18:
1705  case ARIZONA_EQ1_19:
1706  case ARIZONA_EQ1_20:
1707  case ARIZONA_EQ1_21:
1708  case ARIZONA_EQ2_1:
1709  case ARIZONA_EQ2_2:
1710  case ARIZONA_EQ2_3:
1711  case ARIZONA_EQ2_4:
1712  case ARIZONA_EQ2_5:
1713  case ARIZONA_EQ2_6:
1714  case ARIZONA_EQ2_7:
1715  case ARIZONA_EQ2_8:
1716  case ARIZONA_EQ2_9:
1717  case ARIZONA_EQ2_10:
1718  case ARIZONA_EQ2_11:
1719  case ARIZONA_EQ2_12:
1720  case ARIZONA_EQ2_13:
1721  case ARIZONA_EQ2_14:
1722  case ARIZONA_EQ2_15:
1723  case ARIZONA_EQ2_16:
1724  case ARIZONA_EQ2_17:
1725  case ARIZONA_EQ2_18:
1726  case ARIZONA_EQ2_19:
1727  case ARIZONA_EQ2_20:
1728  case ARIZONA_EQ2_21:
1729  case ARIZONA_EQ3_1:
1730  case ARIZONA_EQ3_2:
1731  case ARIZONA_EQ3_3:
1732  case ARIZONA_EQ3_4:
1733  case ARIZONA_EQ3_5:
1734  case ARIZONA_EQ3_6:
1735  case ARIZONA_EQ3_7:
1736  case ARIZONA_EQ3_8:
1737  case ARIZONA_EQ3_9:
1738  case ARIZONA_EQ3_10:
1739  case ARIZONA_EQ3_11:
1740  case ARIZONA_EQ3_12:
1741  case ARIZONA_EQ3_13:
1742  case ARIZONA_EQ3_14:
1743  case ARIZONA_EQ3_15:
1744  case ARIZONA_EQ3_16:
1745  case ARIZONA_EQ3_17:
1746  case ARIZONA_EQ3_18:
1747  case ARIZONA_EQ3_19:
1748  case ARIZONA_EQ3_20:
1749  case ARIZONA_EQ3_21:
1750  case ARIZONA_EQ4_1:
1751  case ARIZONA_EQ4_2:
1752  case ARIZONA_EQ4_3:
1753  case ARIZONA_EQ4_4:
1754  case ARIZONA_EQ4_5:
1755  case ARIZONA_EQ4_6:
1756  case ARIZONA_EQ4_7:
1757  case ARIZONA_EQ4_8:
1758  case ARIZONA_EQ4_9:
1759  case ARIZONA_EQ4_10:
1760  case ARIZONA_EQ4_11:
1761  case ARIZONA_EQ4_12:
1762  case ARIZONA_EQ4_13:
1763  case ARIZONA_EQ4_14:
1764  case ARIZONA_EQ4_15:
1765  case ARIZONA_EQ4_16:
1766  case ARIZONA_EQ4_17:
1767  case ARIZONA_EQ4_18:
1768  case ARIZONA_EQ4_19:
1769  case ARIZONA_EQ4_20:
1770  case ARIZONA_EQ4_21:
1771  case ARIZONA_DRC1_CTRL1:
1772  case ARIZONA_DRC1_CTRL2:
1773  case ARIZONA_DRC1_CTRL3:
1774  case ARIZONA_DRC1_CTRL4:
1775  case ARIZONA_DRC1_CTRL5:
1776  case ARIZONA_DRC2_CTRL1:
1777  case ARIZONA_DRC2_CTRL2:
1778  case ARIZONA_DRC2_CTRL3:
1779  case ARIZONA_DRC2_CTRL4:
1780  case ARIZONA_DRC2_CTRL5:
1781  case ARIZONA_HPLPF1_1:
1782  case ARIZONA_HPLPF1_2:
1783  case ARIZONA_HPLPF2_1:
1784  case ARIZONA_HPLPF2_2:
1785  case ARIZONA_HPLPF3_1:
1786  case ARIZONA_HPLPF3_2:
1787  case ARIZONA_HPLPF4_1:
1788  case ARIZONA_HPLPF4_2:
1789  case ARIZONA_ASRC_ENABLE:
1790  case ARIZONA_ASRC_RATE1:
1791  case ARIZONA_ASRC_RATE2:
1792  case ARIZONA_ISRC_1_CTRL_1:
1793  case ARIZONA_ISRC_1_CTRL_2:
1794  case ARIZONA_ISRC_1_CTRL_3:
1795  case ARIZONA_ISRC_2_CTRL_1:
1796  case ARIZONA_ISRC_2_CTRL_2:
1797  case ARIZONA_ISRC_2_CTRL_3:
1798  case ARIZONA_ISRC_3_CTRL_1:
1799  case ARIZONA_ISRC_3_CTRL_2:
1800  case ARIZONA_ISRC_3_CTRL_3:
1803  case ARIZONA_DSP1_STATUS_1:
1804  case ARIZONA_DSP1_STATUS_2:
1805  return true;
1806  default:
1807  return false;
1808  }
1809 }
1810 
1811 static bool wm5102_volatile_register(struct device *dev, unsigned int reg)
1812 {
1813  switch (reg) {
1822  case ARIZONA_FX_CTRL2:
1828  case ARIZONA_IRQ2_STATUS_1:
1829  case ARIZONA_IRQ2_STATUS_2:
1830  case ARIZONA_IRQ2_STATUS_3:
1831  case ARIZONA_IRQ2_STATUS_4:
1832  case ARIZONA_IRQ2_STATUS_5:
1842  case ARIZONA_AOD_IRQ1:
1843  case ARIZONA_AOD_IRQ2:
1845  case ARIZONA_DSP1_STATUS_1:
1846  case ARIZONA_DSP1_STATUS_2:
1848  case ARIZONA_MIC_DETECT_3:
1849  return true;
1850  default:
1851  return false;
1852  }
1853 }
1854 
1855 const struct regmap_config wm5102_spi_regmap = {
1856  .reg_bits = 32,
1857  .pad_bits = 16,
1858  .val_bits = 16,
1859 
1860  .max_register = ARIZONA_DSP1_STATUS_2,
1861  .readable_reg = wm5102_readable_register,
1862  .volatile_reg = wm5102_volatile_register,
1863 
1864  .cache_type = REGCACHE_RBTREE,
1865  .reg_defaults = wm5102_reg_default,
1866  .num_reg_defaults = ARRAY_SIZE(wm5102_reg_default),
1867 };
1868 EXPORT_SYMBOL_GPL(wm5102_spi_regmap);
1869 
1870 const struct regmap_config wm5102_i2c_regmap = {
1871  .reg_bits = 32,
1872  .val_bits = 16,
1873 
1874  .max_register = ARIZONA_DSP1_STATUS_2,
1875  .readable_reg = wm5102_readable_register,
1876  .volatile_reg = wm5102_volatile_register,
1877 
1878  .cache_type = REGCACHE_RBTREE,
1879  .reg_defaults = wm5102_reg_default,
1880  .num_reg_defaults = ARRAY_SIZE(wm5102_reg_default),
1881 };
1882 EXPORT_SYMBOL_GPL(wm5102_i2c_regmap);