Go to the documentation of this file.
33 #define WSS_MODE_NONE 0x0000
34 #define WSS_MODE_PLAY 0x0001
35 #define WSS_MODE_RECORD 0x0002
36 #define WSS_MODE_TIMER 0x0004
37 #define WSS_MODE_OPEN (WSS_MODE_PLAY|WSS_MODE_RECORD|WSS_MODE_TIMER)
41 #define WSS_HW_DETECT 0x0000
42 #define WSS_HW_DETECT3 0x0001
43 #define WSS_HW_TYPE_MASK 0xff00
44 #define WSS_HW_CS4231_MASK 0x0100
45 #define WSS_HW_CS4231 0x0100
46 #define WSS_HW_CS4231A 0x0101
47 #define WSS_HW_AD1845 0x0102
48 #define WSS_HW_CS4232_MASK 0x0200
49 #define WSS_HW_CS4232 0x0200
50 #define WSS_HW_CS4232A 0x0201
51 #define WSS_HW_CS4236 0x0202
52 #define WSS_HW_CS4236B_MASK 0x0400
53 #define WSS_HW_CS4235 0x0400
54 #define WSS_HW_CS4236B 0x0401
55 #define WSS_HW_CS4237B 0x0402
56 #define WSS_HW_CS4238B 0x0403
57 #define WSS_HW_CS4239 0x0404
58 #define WSS_HW_AD1848_MASK 0x0800
59 #define WSS_HW_AD1847 0x0801
60 #define WSS_HW_AD1848 0x0802
61 #define WSS_HW_CS4248 0x0803
62 #define WSS_HW_CMI8330 0x0804
63 #define WSS_HW_THINKPAD 0x0805
65 #define WSS_HW_INTERWAVE 0x1000
66 #define WSS_HW_OPL3SA2 0x1101
67 #define WSS_HW_OPTI93X 0x1102
70 #define WSS_HWSHARE_IRQ (1<<0)
71 #define WSS_HWSHARE_DMA1 (1<<1)
72 #define WSS_HWSHARE_DMA2 (1<<2)
75 #define AD1848_THINKPAD_CTL_PORT1 0x15e8
76 #define AD1848_THINKPAD_CTL_PORT2 0x15e9
77 #define AD1848_THINKPAD_CS4248_ENABLE_BIT 0x02
139 unsigned char reg,
unsigned char val);
166 int irq,
int dma1,
int dma2,
168 unsigned short hwshare,
177 #define WSS_SINGLE(xname, xindex, reg, shift, mask, invert) \
178 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
181 .info = snd_wss_info_single, \
182 .get = snd_wss_get_single, \
183 .put = snd_wss_put_single, \
184 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
193 #define WSS_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
194 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
197 .info = snd_wss_info_double, \
198 .get = snd_wss_get_double, \
199 .put = snd_wss_put_double, \
200 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
201 (shift_right << 19) | (mask << 24) | (invert << 22) }
203 #define WSS_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
204 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
205 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
208 .info = snd_wss_info_single, \
209 .get = snd_wss_get_single, \
210 .put = snd_wss_put_single, \
211 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
212 .tlv = { .p = (xtlv) } }
214 #define WSS_DOUBLE_TLV(xname, xindex, left_reg, right_reg, \
215 shift_left, shift_right, mask, invert, xtlv) \
216 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
217 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
220 .info = snd_wss_info_double, \
221 .get = snd_wss_get_double, \
222 .put = snd_wss_put_double, \
223 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
224 (shift_right << 19) | (mask << 24) | (invert << 22), \
225 .tlv = { .p = (xtlv) } }