xway_nand.c File Reference

#include <linux/mtd/nand.h>
#include <linux/of_gpio.h>
#include <linux/of_platform.h>
#include <lantiq_soc.h>

Go to the source code of this file.

Macros
#define	EBU_ADDSEL1   0x24
#define	EBU_NAND_CON   0xB0
#define	EBU_NAND_WAIT   0xB4
#define	EBU_NAND_ECC0   0xB8
#define	EBU_NAND_ECC_AC   0xBC
#define	NAND_CMD_ALE   (1 << 2)
#define	NAND_CMD_CLE   (1 << 3)
#define	NAND_CMD_CS   (1 << 4)
#define	NAND_WRITE_CMD_RESET   0xff
#define	NAND_WRITE_CMD   (NAND_CMD_CS | NAND_CMD_CLE)
#define	NAND_WRITE_ADDR   (NAND_CMD_CS | NAND_CMD_ALE)
#define	NAND_WRITE_DATA   (NAND_CMD_CS)
#define	NAND_READ_DATA   (NAND_CMD_CS)
#define	NAND_WAIT_WR_C   (1 << 3)
#define	NAND_WAIT_RD   (0x1)
#define	ADDSEL1_MASK(x)   (x << 4)
#define	ADDSEL1_REGEN   1
#define	BUSCON1_SETUP   (1 << 22)
#define	BUSCON1_BCGEN_RES   (0x3 << 12)
#define	BUSCON1_WAITWRC2   (2 << 8)
#define	BUSCON1_WAITRDC2   (2 << 6)
#define	BUSCON1_HOLDC1   (1 << 4)
#define	BUSCON1_RECOVC1   (1 << 2)
#define	BUSCON1_CMULT4   1
#define	NAND_CON_CE   (1 << 20)
#define	NAND_CON_OUT_CS1   (1 << 10)
#define	NAND_CON_IN_CS1   (1 << 8)
#define	NAND_CON_PRE_P   (1 << 7)
#define	NAND_CON_WP_P   (1 << 6)
#define	NAND_CON_SE_P   (1 << 5)
#define	NAND_CON_CS_P   (1 << 4)
#define	NAND_CON_CSMUX   (1 << 1)
#define	NAND_CON_NANDM   1

Functions
	subsys_initcall (xway_register_nand)

Macro Definition Documentation

#define ADDSEL1_MASK

(

x

)

(x << 4)

Definition at line 35 of file xway_nand.c.

#define ADDSEL1_REGEN   1

Definition at line 36 of file xway_nand.c.

#define BUSCON1_BCGEN_RES   (0x3 << 12)

Definition at line 40 of file xway_nand.c.

#define BUSCON1_CMULT4   1

Definition at line 45 of file xway_nand.c.

#define BUSCON1_HOLDC1   (1 << 4)

Definition at line 43 of file xway_nand.c.

#define BUSCON1_RECOVC1   (1 << 2)

Definition at line 44 of file xway_nand.c.

#define BUSCON1_SETUP   (1 << 22)

Definition at line 39 of file xway_nand.c.

#define BUSCON1_WAITRDC2   (2 << 6)

Definition at line 42 of file xway_nand.c.

#define BUSCON1_WAITWRC2   (2 << 8)

Definition at line 41 of file xway_nand.c.

#define EBU_ADDSEL1   0x24

Definition at line 16 of file xway_nand.c.

#define EBU_NAND_CON   0xB0

Definition at line 17 of file xway_nand.c.

#define EBU_NAND_ECC0   0xB8

Definition at line 19 of file xway_nand.c.

#define EBU_NAND_ECC_AC   0xBC

Definition at line 20 of file xway_nand.c.

#define EBU_NAND_WAIT   0xB4

Definition at line 18 of file xway_nand.c.

#define NAND_CMD_ALE   (1 << 2)

Definition at line 23 of file xway_nand.c.

#define NAND_CMD_CLE   (1 << 3)

Definition at line 24 of file xway_nand.c.

#define NAND_CMD_CS   (1 << 4)

Definition at line 25 of file xway_nand.c.

#define NAND_CON_CE   (1 << 20)

Definition at line 47 of file xway_nand.c.

#define NAND_CON_CS_P   (1 << 4)

Definition at line 53 of file xway_nand.c.

#define NAND_CON_CSMUX   (1 << 1)

Definition at line 54 of file xway_nand.c.

#define NAND_CON_IN_CS1   (1 << 8)

Definition at line 49 of file xway_nand.c.

#define NAND_CON_NANDM   1

Definition at line 55 of file xway_nand.c.

#define NAND_CON_OUT_CS1   (1 << 10)

Definition at line 48 of file xway_nand.c.

#define NAND_CON_PRE_P   (1 << 7)

Definition at line 50 of file xway_nand.c.

#define NAND_CON_SE_P   (1 << 5)

Definition at line 52 of file xway_nand.c.

#define NAND_CON_WP_P   (1 << 6)

Definition at line 51 of file xway_nand.c.

#define NAND_READ_DATA   (NAND_CMD_CS)

Definition at line 30 of file xway_nand.c.

#define NAND_WAIT_RD   (0x1)

Definition at line 32 of file xway_nand.c.

#define NAND_WAIT_WR_C   (1 << 3)

Definition at line 31 of file xway_nand.c.

#define NAND_WRITE_ADDR   (NAND_CMD_CS | NAND_CMD_ALE)

Definition at line 28 of file xway_nand.c.

#define NAND_WRITE_CMD   (NAND_CMD_CS | NAND_CMD_CLE)

Definition at line 27 of file xway_nand.c.

#define NAND_WRITE_CMD_RESET   0xff

Definition at line 26 of file xway_nand.c.

#define NAND_WRITE_DATA   (NAND_CMD_CS)

Definition at line 29 of file xway_nand.c.

Function Documentation

subsys_initcall

(

xway_register_nand

)