LLVM API Documentation

AArch64Subtarget.h
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00001 //===--- AArch64Subtarget.h - Define Subtarget for the AArch64 -*- C++ -*--===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file declares the AArch64 specific subclass of TargetSubtarget.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H
00015 #define LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H
00016 
00017 #include "AArch64FrameLowering.h"
00018 #include "AArch64ISelLowering.h"
00019 #include "AArch64InstrInfo.h"
00020 #include "AArch64RegisterInfo.h"
00021 #include "AArch64SelectionDAGInfo.h"
00022 #include "llvm/IR/DataLayout.h"
00023 #include "llvm/Target/TargetSubtargetInfo.h"
00024 #include <string>
00025 
00026 #define GET_SUBTARGETINFO_HEADER
00027 #include "AArch64GenSubtargetInfo.inc"
00028 
00029 namespace llvm {
00030 class GlobalValue;
00031 class StringRef;
00032 
00033 class AArch64Subtarget : public AArch64GenSubtargetInfo {
00034 protected:
00035   enum ARMProcFamilyEnum {Others, CortexA53, CortexA57, Cyclone};
00036 
00037   /// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
00038   ARMProcFamilyEnum ARMProcFamily;
00039 
00040   bool HasFPARMv8;
00041   bool HasNEON;
00042   bool HasCrypto;
00043   bool HasCRC;
00044 
00045   // HasZeroCycleRegMove - Has zero-cycle register mov instructions.
00046   bool HasZeroCycleRegMove;
00047 
00048   // HasZeroCycleZeroing - Has zero-cycle zeroing instructions.
00049   bool HasZeroCycleZeroing;
00050 
00051   /// CPUString - String name of used CPU.
00052   std::string CPUString;
00053 
00054   /// TargetTriple - What processor and OS we're targeting.
00055   Triple TargetTriple;
00056 
00057   const DataLayout DL;
00058   AArch64FrameLowering FrameLowering;
00059   AArch64InstrInfo InstrInfo;
00060   AArch64SelectionDAGInfo TSInfo;
00061   AArch64TargetLowering TLInfo;
00062 private:
00063   /// initializeSubtargetDependencies - Initializes using CPUString and the
00064   /// passed in feature string so that we can use initializer lists for
00065   /// subtarget initialization.
00066   AArch64Subtarget &initializeSubtargetDependencies(StringRef FS);
00067 
00068 public:
00069   /// This constructor initializes the data members to match that
00070   /// of the specified triple.
00071   AArch64Subtarget(const std::string &TT, const std::string &CPU,
00072        const std::string &FS, TargetMachine &TM, bool LittleEndian);
00073 
00074   const AArch64SelectionDAGInfo *getSelectionDAGInfo() const override {
00075     return &TSInfo;
00076   }
00077   const AArch64FrameLowering *getFrameLowering() const override {
00078     return &FrameLowering;
00079   }
00080   const AArch64TargetLowering *getTargetLowering() const override {
00081     return &TLInfo;
00082   }
00083   const AArch64InstrInfo *getInstrInfo() const override { return &InstrInfo; }
00084   const DataLayout *getDataLayout() const override { return &DL; }
00085   const AArch64RegisterInfo *getRegisterInfo() const override {
00086     return &getInstrInfo()->getRegisterInfo();
00087   }
00088   bool enableMachineScheduler() const override { return true; }
00089   bool enablePostMachineScheduler() const override {
00090     return isCortexA53() || isCortexA57();
00091   }
00092 
00093   bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; }
00094 
00095   bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; }
00096 
00097   bool hasFPARMv8() const { return HasFPARMv8; }
00098   bool hasNEON() const { return HasNEON; }
00099   bool hasCrypto() const { return HasCrypto; }
00100   bool hasCRC() const { return HasCRC; }
00101 
00102   bool isLittleEndian() const { return DL.isLittleEndian(); }
00103 
00104   bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
00105   bool isTargetIOS() const { return TargetTriple.isiOS(); }
00106   bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
00107   bool isTargetWindows() const { return TargetTriple.isOSWindows(); }
00108 
00109   bool isTargetCOFF() const { return TargetTriple.isOSBinFormatCOFF(); }
00110   bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
00111   bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
00112 
00113   bool isCyclone() const { return CPUString == "cyclone"; }
00114   bool isCortexA57() const { return CPUString == "cortex-a57"; }
00115   bool isCortexA53() const { return CPUString == "cortex-a53"; }
00116 
00117   bool useAA() const override { return isCortexA53() || isCortexA57(); }
00118 
00119   /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
00120   /// that still makes it profitable to inline the call.
00121   unsigned getMaxInlineSizeThreshold() const { return 64; }
00122 
00123   /// ParseSubtargetFeatures - Parses features string setting specified
00124   /// subtarget options.  Definition of function is auto generated by tblgen.
00125   void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
00126 
00127   /// ClassifyGlobalReference - Find the target operand flags that describe
00128   /// how a global value should be referenced for the current subtarget.
00129   unsigned char ClassifyGlobalReference(const GlobalValue *GV,
00130                                         const TargetMachine &TM) const;
00131 
00132   /// This function returns the name of a function which has an interface
00133   /// like the non-standard bzero function, if such a function exists on
00134   /// the current subtarget and it is considered prefereable over
00135   /// memset with zero passed as the second argument. Otherwise it
00136   /// returns null.
00137   const char *getBZeroEntry() const;
00138 
00139   void overrideSchedPolicy(MachineSchedPolicy &Policy, MachineInstr *begin,
00140                            MachineInstr *end,
00141                            unsigned NumRegionInstrs) const override;
00142 
00143   bool enableEarlyIfConversion() const override;
00144 };
00145 } // End llvm namespace
00146 
00147 #endif