LLVM API Documentation
00001 //===-- AMDGPUMCTargetDesc.h - AMDGPU Target Descriptions -----*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 /// \file 00011 /// \brief Provides AMDGPU specific target descriptions. 00012 // 00013 //===----------------------------------------------------------------------===// 00014 // 00015 00016 #ifndef LLVM_LIB_TARGET_R600_MCTARGETDESC_AMDGPUMCTARGETDESC_H 00017 #define LLVM_LIB_TARGET_R600_MCTARGETDESC_AMDGPUMCTARGETDESC_H 00018 00019 #include "llvm/ADT/StringRef.h" 00020 00021 namespace llvm { 00022 class MCAsmBackend; 00023 class MCCodeEmitter; 00024 class MCContext; 00025 class MCInstrInfo; 00026 class MCObjectWriter; 00027 class MCRegisterInfo; 00028 class MCSubtargetInfo; 00029 class Target; 00030 class raw_ostream; 00031 00032 extern Target TheAMDGPUTarget; 00033 00034 MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII, 00035 const MCRegisterInfo &MRI, 00036 const MCSubtargetInfo &STI); 00037 00038 MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII, 00039 const MCRegisterInfo &MRI, 00040 const MCSubtargetInfo &STI, 00041 MCContext &Ctx); 00042 00043 MCAsmBackend *createAMDGPUAsmBackend(const Target &T, const MCRegisterInfo &MRI, 00044 StringRef TT, StringRef CPU); 00045 00046 MCObjectWriter *createAMDGPUELFObjectWriter(raw_ostream &OS); 00047 } // End llvm namespace 00048 00049 #define GET_REGINFO_ENUM 00050 #include "AMDGPUGenRegisterInfo.inc" 00051 00052 #define GET_INSTRINFO_ENUM 00053 #include "AMDGPUGenInstrInfo.inc" 00054 00055 #define GET_SUBTARGETINFO_ENUM 00056 #include "AMDGPUGenSubtargetInfo.inc" 00057 00058 #endif