#include <MCRegisterInfo.h>

Inheritance diagram for llvm::MCRegisterInfo:

Classes
class	DiffListIterator
struct	DwarfLLVMRegPair
struct	SubRegCoveredBits
Public Types
typedef const MCRegisterClass *	regclass_iterator
Public Member Functions
void	InitMCRegisterInfo (const MCRegisterDesc D, unsigned NR, unsigned RA, unsigned PC, const MCRegisterClass C, unsigned NC, const MCPhysReg(RURoots)[2], unsigned NRU, const MCPhysReg DL, const char Strings, const uint16_t SubIndices, unsigned NumIndices, const SubRegCoveredBits SubIdxRanges, const uint16_t RET)
	Initialize MCRegisterInfo, called by TableGen auto-generated routines. DO NOT USE.
void	mapLLVMRegsToDwarfRegs (const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
	Used to initialize LLVM register to Dwarf register number mapping. Called by TableGen auto-generated routines. DO NOT USE*.
void	mapDwarfRegsToLLVMRegs (const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
	Used to initialize Dwarf register to LLVM register number mapping. Called by TableGen auto-generated routines. DO NOT USE*.
void	mapLLVMRegToSEHReg (unsigned LLVMReg, int SEHReg)
unsigned	getRARegister () const
	This method should return the register where the return address can be found.
unsigned	getProgramCounter () const
	Return the register which is the program counter.
const MCRegisterDesc &	operator[] (unsigned RegNo) const
const MCRegisterDesc &	get (unsigned RegNo) const
	Provide a get method, equivalent to [], but more useful with a pointer to this object.
unsigned	getSubReg (unsigned Reg, unsigned Idx) const
	Returns the physical register number of sub-register "Index" for physical register RegNo. Return zero if the sub-register does not exist.
unsigned	getMatchingSuperReg (unsigned Reg, unsigned SubIdx, const MCRegisterClass *RC) const
	Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg.
unsigned	getSubRegIndex (unsigned RegNo, unsigned SubRegNo) const
	For a given register pair, return the sub-register index if the second register is a sub-register of the first. Return zero otherwise.
unsigned	getSubRegIdxSize (unsigned Idx) const
	Get the size of the bit range covered by a sub-register index. If the index isn't continuous, return the sum of the sizes of its parts. If the index is used to access subregisters of different sizes, return -1.
unsigned	getSubRegIdxOffset (unsigned Idx) const
	Get the offset of the bit range covered by a sub-register index. If an Offset doesn't make sense (the index isn't continuous, or is used to access sub-registers at different offsets), return -1.
const char *	getName (unsigned RegNo) const
	Return the human-readable symbolic target-specific name for the specified physical register.
unsigned	getNumRegs () const
	Return the number of registers this target has (useful for sizing arrays holding per register information)
unsigned	getNumSubRegIndices () const
	Return the number of sub-register indices understood by the target. Index 0 is reserved for the no-op sub-register, while 1 to getNumSubRegIndices() - 1 represent real sub-registers.
unsigned	getNumRegUnits () const
	Return the number of (native) register units in the target. Register units are numbered from 0 to getNumRegUnits() - 1. They can be accessed through MCRegUnitIterator defined below.
int	getDwarfRegNum (unsigned RegNum, bool isEH) const
	Map a target register to an equivalent dwarf register number. Returns -1 if there is no equivalent value. The second parameter allows targets to use different numberings for EH info and debugging info.
int	getLLVMRegNum (unsigned RegNum, bool isEH) const
	Map a dwarf register back to a target register.
int	getSEHRegNum (unsigned RegNum) const
	Map a target register to an equivalent SEH register number. Returns LLVM register number if there is no equivalent value.
regclass_iterator	regclass_begin () const
regclass_iterator	regclass_end () const
unsigned	getNumRegClasses () const
const MCRegisterClass &	getRegClass (unsigned i) const
	Returns the register class associated with the enumeration value. See class MCOperandInfo.
uint16_t	getEncodingValue (unsigned RegNo) const
	Returns the encoding for RegNo.
bool	isSubRegister (unsigned RegA, unsigned RegB) const
	Returns true if RegB is a sub-register of RegA.
bool	isSuperRegister (unsigned RegA, unsigned RegB) const
	Returns true if RegB is a super-register of RegA.
bool	isSubRegisterEq (unsigned RegA, unsigned RegB) const
	Returns true if RegB is a sub-register of RegA or if RegB == RegA.
bool	isSuperRegisterEq (unsigned RegA, unsigned RegB) const
	Returns true if RegB is a super-register of RegA or if RegB == RegA.
Friends
class	MCSubRegIterator
class	MCSuperRegIterator
class	MCRegUnitIterator
class	MCRegUnitRootIterator

Detailed Description

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc objects that represent all of the machine registers that the target has. As such, we simply have to track a pointer to this array so that we can turn register number into a register descriptor.

Note this class is designed to be a base class of TargetRegisterInfo, which is the interface used by codegen. However, specific targets *should never* specialize this class. MCRegisterInfo should only contain getters to access TableGen generated physical register data. It must not be extended with virtual methods.

Definition at line 135 of file MCRegisterInfo.h.

Member Typedef Documentation

typedef const MCRegisterClass* llvm::MCRegisterInfo::regclass_iterator

Reimplemented in llvm::TargetRegisterInfo.

Definition at line 137 of file MCRegisterInfo.h.

Member Function Documentation

const MCRegisterDesc& llvm::MCRegisterInfo::get ( unsigned RegNo ) const [inline]

Provide a get method, equivalent to [], but more useful with a pointer to this object.

Definition at line 322 of file MCRegisterInfo.h.

References operator[]().

Referenced by llvm::MCRegUnitIterator::MCRegUnitIterator(), llvm::MCSubRegIterator::MCSubRegIterator(), and llvm::MCSuperRegIterator::MCSuperRegIterator().

int MCRegisterInfo::getDwarfRegNum	(	unsigned	RegNum,
		bool	isEH
	)		const

Map a target register to an equivalent dwarf register number. Returns -1 if there is no equivalent value. The second parameter allows targets to use different numberings for EH info and debugging info.

Definition at line 61 of file MCRegisterInfo.cpp.

References llvm::MCRegisterInfo::DwarfLLVMRegPair::FromReg, I, and llvm::MCRegisterInfo::DwarfLLVMRegPair::ToReg.

Referenced by llvm::DwarfUnit::addRegisterOffset(), llvm::DwarfUnit::addRegisterOpPiece(), llvm::ARMFrameLowering::adjustForSegmentedStacks(), createAArch64MCAsmInfo(), createARMMCAsmInfo(), createMipsMCAsmInfo(), createPPCMCAsmInfo(), createSparcMCAsmInfo(), createSparcV9MCAsmInfo(), createSystemZMCAsmInfo(), createX86MCAsmInfo(), llvm::AArch64FrameLowering::emitCalleeSavedFrameMoves(), llvm::X86FrameLowering::emitCalleeSavedFrameMoves(), llvm::AsmPrinter::EmitDwarfRegOp(), llvm::Mips16FrameLowering::emitPrologue(), llvm::MipsSEFrameLowering::emitPrologue(), llvm::SparcFrameLowering::emitPrologue(), llvm::Thumb1FrameLowering::emitPrologue(), llvm::XCoreFrameLowering::emitPrologue(), llvm::ARMFrameLowering::emitPrologue(), llvm::PPCFrameLowering::emitPrologue(), llvm::SystemZFrameLowering::emitPrologue(), and getDwarfRegNum().

uint16_t llvm::MCRegisterInfo::getEncodingValue ( unsigned RegNo ) const [inline]

Returns the encoding for RegNo.

Definition at line 405 of file MCRegisterInfo.h.

Referenced by llvm::MipsTargetELFStreamer::emitFrame(), HandleVRSaveUpdate(), llvm::X86_MC::InitLLVM2SEHRegisterMapping(), llvm::MipsAsmPrinter::printSavedRegsBitmask(), llvm::MipsRegInfoRecord::SetPhysRegUsed(), and llvm::AArch64ExternalSymbolizer::tryAddingSymbolicOperand().

int MCRegisterInfo::getLLVMRegNum	(	unsigned	RegNum,
		bool	isEH
	)		const

Map a dwarf register back to a target register.

Definition at line 72 of file MCRegisterInfo.cpp.

References llvm::MCRegisterInfo::DwarfLLVMRegPair::FromReg, I, and llvm::MCRegisterInfo::DwarfLLVMRegPair::ToReg.

unsigned MCRegisterInfo::getMatchingSuperReg	(	unsigned	Reg,
		unsigned	SubIdx,
		const MCRegisterClass *	RC
	)		const

Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg.

Definition at line 18 of file MCRegisterInfo.cpp.

References llvm::MCRegisterClass::contains(), getSubReg(), and llvm::MCRegisterInfo::DiffListIterator::isValid().

Referenced by llvm::ARMInstPrinter::printInst(), and llvm::AArch64InstPrinter::printVectorList().

const char* llvm::MCRegisterInfo::getName ( unsigned RegNo ) const [inline]

Return the human-readable symbolic target-specific name for the specified physical register.

Definition at line 353 of file MCRegisterInfo.h.

References Name.

Referenced by llvm::AggressiveAntiDepBreaker::AggressiveAntiDepBreaker(), emitDebugValueComment(), llvm::AsmPrinter::emitImplicitDef(), emitKill(), llvm::RegScavenger::FindUnusedReg(), llvm::TargetLowering::getRegForInlineAsmConstraint(), llvm::AggressiveAntiDepBreaker::Observe(), llvm::PrintReg::print(), llvm::PrintRegUnit::print(), llvm::AArch64FrameLowering::restoreCalleeSavedRegisters(), llvm::RegScavenger::scavengeRegister(), and llvm::AArch64FrameLowering::spillCalleeSavedRegisters().

unsigned llvm::MCRegisterInfo::getNumRegClasses ( ) const [inline]

Reimplemented in llvm::TargetRegisterInfo.

Definition at line 393 of file MCRegisterInfo.h.

References regclass_begin(), and regclass_end().

Referenced by getRegClass().

unsigned llvm::MCRegisterInfo::getNumRegs ( ) const [inline]

Return the number of registers this target has (useful for sizing arrays holding per register information)

Definition at line 359 of file MCRegisterInfo.h.

Referenced by llvm::PBQPBuilder::build(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::CCState::CCState(), llvm::LiveIntervals::checkRegMaskInterference(), collectInvolvedReg(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::MachineRegisterInfo::freezeReservedRegs(), llvm::TargetRegisterInfo::getAllocatableSet(), llvm::MachineFrameInfo::getPristineRegs(), llvm::RegScavenger::getRegsAvailable(), getSubRegIndex(), llvm::Hexagon_CCState::Hexagon_CCState(), llvm::LivePhysRegs::init(), llvm::RegPressureTracker::init(), llvm::LivePhysRegs::LivePhysRegs(), llvm::CriticalAntiDepBreaker::Observe(), llvm::AggressiveAntiDepBreaker::Observe(), llvm::InterferenceCache::reinitPhysRegEntries(), llvm::RegisterClassInfo::runOnMachineFunction(), llvm::LiveVariables::runOnMachineFunction(), llvm::CriticalAntiDepBreaker::StartBlock(), and llvm::AggressiveAntiDepBreaker::StartBlock().

unsigned llvm::MCRegisterInfo::getNumRegUnits ( ) const [inline]

Return the number of (native) register units in the target. Register units are numbered from 0 to getNumRegUnits() - 1. They can be accessed through MCRegUnitIterator defined below.

Definition at line 373 of file MCRegisterInfo.h.

Referenced by llvm::RegScavenger::enterBasicBlock(), llvm::PrintRegUnit::print(), and llvm::LiveIntervals::runOnMachineFunction().

unsigned llvm::MCRegisterInfo::getNumSubRegIndices ( ) const [inline]

Return the number of sub-register indices understood by the target. Index 0 is reserved for the no-op sub-register, while 1 to getNumSubRegIndices() - 1 represent real sub-registers.

Definition at line 366 of file MCRegisterInfo.h.

Referenced by getSubReg(), getSubRegIdxOffset(), getSubRegIdxSize(), llvm::TargetRegisterInfo::getSubRegIndexLaneMask(), and llvm::TargetRegisterInfo::getSubRegIndexName().

unsigned llvm::MCRegisterInfo::getProgramCounter ( ) const [inline]

Return the register which is the program counter.

Definition at line 310 of file MCRegisterInfo.h.

Referenced by llvm::MCInstrDesc::mayAffectControlFlow().

unsigned llvm::MCRegisterInfo::getRARegister ( ) const [inline]

This method should return the register where the return address can be found.

Definition at line 305 of file MCRegisterInfo.h.

Referenced by llvm::MipsAsmPrinter::emitFrameDirective(), and llvm::HexagonTargetLowering::LowerRETURNADDR().

const MCRegisterClass& llvm::MCRegisterInfo::getRegClass ( unsigned i ) const [inline]

Returns the register class associated with the enumeration value. See class MCOperandInfo.

Reimplemented in llvm::TargetRegisterInfo.

Definition at line 399 of file MCRegisterInfo.h.

References getNumRegClasses().

Referenced by getReg(), llvm::MipsRegInfoRecord::MipsRegInfoRecord(), llvm::ARMInstPrinter::printInst(), and llvm::AArch64InstPrinter::printVectorList().

int MCRegisterInfo::getSEHRegNum ( unsigned RegNum ) const

Map a target register to an equivalent SEH register number. Returns LLVM register number if there is no equivalent value.

Definition at line 82 of file MCRegisterInfo.cpp.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::find(), and I.

unsigned MCRegisterInfo::getSubReg	(	unsigned	Reg,
		unsigned	Idx
	)		const

Returns the physical register number of sub-register "Index" for physical register RegNo. Return zero if the sub-register does not exist.

Definition at line 26 of file MCRegisterInfo.cpp.

References getNumSubRegIndices(), and llvm::MCRegisterInfo::DiffListIterator::isValid().

Referenced by llvm::ARMBaseInstrInfo::AddDReg(), addSavedGPR(), AddSubReg(), llvm::SparcInstrInfo::copyPhysReg(), llvm::ARMBaseInstrInfo::copyPhysReg(), GetDSubRegs(), getImplicitSPRUseForDPRUse(), getMatchingSuperReg(), getPairedGPR(), llvm::CoalescerPair::isCoalescable(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::ARMInstPrinter::printGPRPairOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::AArch64InstPrinter::printVectorList(), llvm::ARMInstPrinter::printVectorListTwo(), llvm::ARMInstPrinter::printVectorListTwoAllLanes(), llvm::ARMInstPrinter::printVectorListTwoSpaced(), llvm::ARMInstPrinter::printVectorListTwoSpacedAllLanes(), llvm::CoalescerPair::setRegisters(), llvm::MachineInstr::substituteRegister(), and llvm::MachineOperand::substPhysReg().

unsigned MCRegisterInfo::getSubRegIdxOffset ( unsigned Idx ) const

Get the offset of the bit range covered by a sub-register index. If an Offset doesn't make sense (the index isn't continuous, or is used to access sub-registers at different offsets), return -1.

Definition at line 55 of file MCRegisterInfo.cpp.

References getNumSubRegIndices(), and llvm::MCRegisterInfo::SubRegCoveredBits::Offset.

Referenced by llvm::DwarfUnit::addRegisterOpPiece(), and llvm::TargetInstrInfo::getStackSlotRange().

unsigned MCRegisterInfo::getSubRegIdxSize ( unsigned Idx ) const

Get the size of the bit range covered by a sub-register index. If the index isn't continuous, return the sum of the sizes of its parts. If the index is used to access subregisters of different sizes, return -1.

Definition at line 49 of file MCRegisterInfo.cpp.

References getNumSubRegIndices(), and llvm::MCRegisterInfo::SubRegCoveredBits::Size.

Referenced by llvm::DwarfUnit::addRegisterOpPiece(), and llvm::TargetInstrInfo::getStackSlotRange().

unsigned MCRegisterInfo::getSubRegIndex	(	unsigned	RegNo,
		unsigned	SubRegNo
	)		const

For a given register pair, return the sub-register index if the second register is a sub-register of the first. Return zero otherwise.

Definition at line 38 of file MCRegisterInfo.cpp.

References getNumRegs(), and llvm::MCRegisterInfo::DiffListIterator::isValid().

Referenced by llvm::DwarfUnit::addRegisterOpPiece(), and isNopCopy().

void llvm::MCRegisterInfo::InitMCRegisterInfo	(	const MCRegisterDesc *	D,
		unsigned	NR,
		unsigned	RA,
		unsigned	PC,
		const MCRegisterClass *	C,
		unsigned	NC,
		const MCPhysReg(*)	RURoots[2],
		unsigned	NRU,
		const MCPhysReg *	DL,
		const char *	Strings,
		const uint16_t *	SubIndices,
		unsigned	NumIndices,
		const SubRegCoveredBits *	SubIdxRanges,
		const uint16_t *	RET
	)		`[inline]`

Initialize MCRegisterInfo, called by TableGen auto-generated routines. *DO NOT USE*.

Definition at line 239 of file MCRegisterInfo.h.

References llvm::CallingConv::C, and NC.

bool llvm::MCRegisterInfo::isSubRegister	(	unsigned	RegA,
		unsigned	RegB
	)		const `[inline]`

Returns true if RegB is a sub-register of RegA.

Definition at line 412 of file MCRegisterInfo.h.

References isSuperRegister().

Referenced by llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterKilled(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::MachineInstr::findRegisterUseOperandIdx(), and isNopCopy().

bool llvm::MCRegisterInfo::isSubRegisterEq	(	unsigned	RegA,
		unsigned	RegB
	)		const `[inline]`

Returns true if RegB is a sub-register of RegA or if RegB == RegA.

Definition at line 420 of file MCRegisterInfo.h.

References isSuperRegisterEq().

Referenced by llvm::MCInstrDesc::hasDefOfPhysReg(), and llvm::MCInstrDesc::mayAffectControlFlow().

bool llvm::MCRegisterInfo::isSuperRegister	(	unsigned	RegA,
		unsigned	RegB
	)		const `[inline]`

Returns true if RegB is a super-register of RegA.

Definition at line 468 of file MCRegisterInfo.h.

References I.

Referenced by llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterKilled(), llvm::ARMBaseInstrInfo::breakPartialRegDependency(), llvm::MachineInstr::clearRegisterKills(), isSubRegister(), and isSuperRegisterEq().

bool llvm::MCRegisterInfo::isSuperRegisterEq	(	unsigned	RegA,
		unsigned	RegB
	)		const `[inline]`

Returns true if RegB is a super-register of RegA or if RegB == RegA.

Definition at line 426 of file MCRegisterInfo.h.

References isSuperRegister().

Referenced by isSubRegisterEq().

void llvm::MCRegisterInfo::mapDwarfRegsToLLVMRegs	(	const DwarfLLVMRegPair *	Map,
		unsigned	Size,
		bool	isEH
	)		`[inline]`

Used to initialize Dwarf register to LLVM register number mapping. Called by TableGen auto-generated routines. DO NOT USE*.

Definition at line 283 of file MCRegisterInfo.h.

void llvm::MCRegisterInfo::mapLLVMRegsToDwarfRegs	(	const DwarfLLVMRegPair *	Map,
		unsigned	Size,
		bool	isEH
	)		`[inline]`

Used to initialize LLVM register to Dwarf register number mapping. Called by TableGen auto-generated routines. DO NOT USE*.

Definition at line 269 of file MCRegisterInfo.h.

void llvm::MCRegisterInfo::mapLLVMRegToSEHReg	(	unsigned	LLVMReg,
		int	SEHReg
	)		`[inline]`

mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register number mapping. By default the SEH register number is just the same as the LLVM register number. FIXME: TableGen these numbers. Currently this requires target specific initialization code.

Definition at line 299 of file MCRegisterInfo.h.

Referenced by llvm::X86_MC::InitLLVM2SEHRegisterMapping().

const MCRegisterDesc& llvm::MCRegisterInfo::operator[] ( unsigned RegNo ) const [inline]