LLVM API Documentation

AMDGPUSubtarget.h
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00001 //=====-- AMDGPUSubtarget.h - Define Subtarget for the AMDIL ---*- C++ -*-====//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //==-----------------------------------------------------------------------===//
00009 //
00010 /// \file
00011 /// \brief AMDGPU specific subclass of TargetSubtarget.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #ifndef LLVM_LIB_TARGET_R600_AMDGPUSUBTARGET_H
00016 #define LLVM_LIB_TARGET_R600_AMDGPUSUBTARGET_H
00017 #include "AMDGPU.h"
00018 #include "AMDGPUFrameLowering.h"
00019 #include "AMDGPUInstrInfo.h"
00020 #include "AMDGPUIntrinsicInfo.h"
00021 #include "AMDGPUSubtarget.h"
00022 #include "R600ISelLowering.h"
00023 #include "llvm/IR/DataLayout.h"
00024 #include "llvm/ADT/StringExtras.h"
00025 #include "llvm/ADT/StringRef.h"
00026 #include "llvm/Target/TargetSubtargetInfo.h"
00027 
00028 #define GET_SUBTARGETINFO_HEADER
00029 #include "AMDGPUGenSubtargetInfo.inc"
00030 
00031 #define MAX_CB_SIZE (1 << 16)
00032 
00033 namespace llvm {
00034 
00035 class AMDGPUSubtarget : public AMDGPUGenSubtargetInfo {
00036 
00037 public:
00038   enum Generation {
00039     R600 = 0,
00040     R700,
00041     EVERGREEN,
00042     NORTHERN_ISLANDS,
00043     SOUTHERN_ISLANDS,
00044     SEA_ISLANDS
00045   };
00046 
00047 private:
00048   std::string DevName;
00049   bool Is64bit;
00050   bool DumpCode;
00051   bool R600ALUInst;
00052   bool HasVertexCache;
00053   short TexVTXClauseSize;
00054   Generation Gen;
00055   bool FP64;
00056   bool FP64Denormals;
00057   bool FP32Denormals;
00058   bool CaymanISA;
00059   bool FlatAddressSpace;
00060   bool EnableIRStructurizer;
00061   bool EnablePromoteAlloca;
00062   bool EnableIfCvt;
00063   unsigned WavefrontSize;
00064   bool CFALUBug;
00065   int LocalMemorySize;
00066 
00067   const DataLayout DL;
00068   AMDGPUFrameLowering FrameLowering;
00069   std::unique_ptr<AMDGPUTargetLowering> TLInfo;
00070   std::unique_ptr<AMDGPUInstrInfo> InstrInfo;
00071   InstrItineraryData InstrItins;
00072 
00073 public:
00074   AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS, TargetMachine &TM);
00075   AMDGPUSubtarget &initializeSubtargetDependencies(StringRef GPU, StringRef FS);
00076 
00077   const AMDGPUFrameLowering *getFrameLowering() const override {
00078     return &FrameLowering;
00079   }
00080   const AMDGPUInstrInfo *getInstrInfo() const override {
00081     return InstrInfo.get();
00082   }
00083   const AMDGPURegisterInfo *getRegisterInfo() const override {
00084     return &InstrInfo->getRegisterInfo();
00085   }
00086   AMDGPUTargetLowering *getTargetLowering() const override {
00087     return TLInfo.get();
00088   }
00089   const DataLayout *getDataLayout() const override { return &DL; }
00090   const InstrItineraryData *getInstrItineraryData() const override {
00091     return &InstrItins;
00092   }
00093 
00094   void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
00095 
00096   bool is64bit() const {
00097     return Is64bit;
00098   }
00099 
00100   bool hasVertexCache() const {
00101     return HasVertexCache;
00102   }
00103 
00104   short getTexVTXClauseSize() const {
00105     return TexVTXClauseSize;
00106   }
00107 
00108   Generation getGeneration() const {
00109     return Gen;
00110   }
00111 
00112   bool hasHWFP64() const {
00113     return FP64;
00114   }
00115 
00116   bool hasCaymanISA() const {
00117     return CaymanISA;
00118   }
00119 
00120   bool hasFP32Denormals() const {
00121     return FP32Denormals;
00122   }
00123 
00124   bool hasFP64Denormals() const {
00125     return FP64Denormals;
00126   }
00127 
00128   bool hasFlatAddressSpace() const {
00129     return FlatAddressSpace;
00130   }
00131 
00132   bool hasBFE() const {
00133     return (getGeneration() >= EVERGREEN);
00134   }
00135 
00136   bool hasBFI() const {
00137     return (getGeneration() >= EVERGREEN);
00138   }
00139 
00140   bool hasBFM() const {
00141     return hasBFE();
00142   }
00143 
00144   bool hasBCNT(unsigned Size) const {
00145     if (Size == 32)
00146       return (getGeneration() >= EVERGREEN);
00147 
00148     if (Size == 64)
00149       return (getGeneration() >= SOUTHERN_ISLANDS);
00150 
00151     return false;
00152   }
00153 
00154   bool hasMulU24() const {
00155     return (getGeneration() >= EVERGREEN);
00156   }
00157 
00158   bool hasMulI24() const {
00159     return (getGeneration() >= SOUTHERN_ISLANDS ||
00160             hasCaymanISA());
00161   }
00162 
00163   bool hasFFBL() const {
00164     return (getGeneration() >= EVERGREEN);
00165   }
00166 
00167   bool hasFFBH() const {
00168     return (getGeneration() >= EVERGREEN);
00169   }
00170 
00171   bool IsIRStructurizerEnabled() const {
00172     return EnableIRStructurizer;
00173   }
00174 
00175   bool isPromoteAllocaEnabled() const {
00176     return EnablePromoteAlloca;
00177   }
00178 
00179   bool isIfCvtEnabled() const {
00180     return EnableIfCvt;
00181   }
00182 
00183   unsigned getWavefrontSize() const {
00184     return WavefrontSize;
00185   }
00186 
00187   unsigned getStackEntrySize() const;
00188 
00189   bool hasCFAluBug() const {
00190     assert(getGeneration() <= NORTHERN_ISLANDS);
00191     return CFALUBug;
00192   }
00193 
00194   int getLocalMemorySize() const {
00195     return LocalMemorySize;
00196   }
00197 
00198   bool enableMachineScheduler() const override {
00199     return getGeneration() <= NORTHERN_ISLANDS;
00200   }
00201 
00202   // Helper functions to simplify if statements
00203   bool isTargetELF() const {
00204     return false;
00205   }
00206 
00207   StringRef getDeviceName() const {
00208     return DevName;
00209   }
00210 
00211   bool dumpCode() const {
00212     return DumpCode;
00213   }
00214   bool r600ALUEncoding() const {
00215     return R600ALUInst;
00216   }
00217 };
00218 
00219 } // End namespace llvm
00220 
00221 #endif