LLVM API Documentation

HexagonMCTargetDesc.cpp
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00001 //===-- HexagonMCTargetDesc.cpp - Hexagon Target Descriptions -------------===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file provides Hexagon specific target descriptions.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 #include "HexagonMCTargetDesc.h"
00015 #include "HexagonMCAsmInfo.h"
00016 #include "InstPrinter/HexagonInstPrinter.h"
00017 #include "llvm/MC/MCCodeGenInfo.h"
00018 #include "llvm/MC/MCInstrInfo.h"
00019 #include "llvm/MC/MCRegisterInfo.h"
00020 #include "llvm/MC/MCStreamer.h"
00021 #include "llvm/MC/MCSubtargetInfo.h"
00022 #include "llvm/MC/MachineLocation.h"
00023 #include "llvm/Support/ErrorHandling.h"
00024 #include "llvm/Support/TargetRegistry.h"
00025 
00026 using namespace llvm;
00027 
00028 #define GET_INSTRINFO_MC_DESC
00029 #include "HexagonGenInstrInfo.inc"
00030 
00031 #define GET_SUBTARGETINFO_MC_DESC
00032 #include "HexagonGenSubtargetInfo.inc"
00033 
00034 #define GET_REGINFO_MC_DESC
00035 #include "HexagonGenRegisterInfo.inc"
00036 
00037 static MCInstrInfo *createHexagonMCInstrInfo() {
00038   MCInstrInfo *X = new MCInstrInfo();
00039   InitHexagonMCInstrInfo(X);
00040   return X;
00041 }
00042 
00043 static MCRegisterInfo *createHexagonMCRegisterInfo(StringRef TT) {
00044   MCRegisterInfo *X = new MCRegisterInfo();
00045   InitHexagonMCRegisterInfo(X, Hexagon::R0);
00046   return X;
00047 }
00048 
00049 static MCSubtargetInfo *createHexagonMCSubtargetInfo(StringRef TT,
00050                                                      StringRef CPU,
00051                                                      StringRef FS) {
00052   MCSubtargetInfo *X = new MCSubtargetInfo();
00053   InitHexagonMCSubtargetInfo(X, TT, CPU, FS);
00054   return X;
00055 }
00056 
00057 static MCAsmInfo *createHexagonMCAsmInfo(const MCRegisterInfo &MRI,
00058                                          StringRef TT) {
00059   MCAsmInfo *MAI = new HexagonMCAsmInfo(TT);
00060 
00061   // VirtualFP = (R30 + #0).
00062   MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(
00063       nullptr, Hexagon::R30, 0);
00064   MAI->addInitialFrameState(Inst);
00065 
00066   return MAI;
00067 }
00068 
00069 static MCCodeGenInfo *createHexagonMCCodeGenInfo(StringRef TT, Reloc::Model RM,
00070                                              CodeModel::Model CM,
00071                                              CodeGenOpt::Level OL) {
00072   MCCodeGenInfo *X = new MCCodeGenInfo();
00073   // For the time being, use static relocations, since there's really no
00074   // support for PIC yet.
00075   X->InitMCCodeGenInfo(Reloc::Static, CM, OL);
00076   return X;
00077 }
00078 
00079 // Force static initialization.
00080 extern "C" void LLVMInitializeHexagonTargetMC() {
00081   // Register the MC asm info.
00082   RegisterMCAsmInfoFn X(TheHexagonTarget, createHexagonMCAsmInfo);
00083 
00084   // Register the MC codegen info.
00085   TargetRegistry::RegisterMCCodeGenInfo(TheHexagonTarget,
00086                                         createHexagonMCCodeGenInfo);
00087 
00088   // Register the MC instruction info.
00089   TargetRegistry::RegisterMCInstrInfo(TheHexagonTarget, createHexagonMCInstrInfo);
00090 
00091   // Register the MC register info.
00092   TargetRegistry::RegisterMCRegInfo(TheHexagonTarget,
00093                                     createHexagonMCRegisterInfo);
00094 
00095   // Register the MC subtarget info.
00096   TargetRegistry::RegisterMCSubtargetInfo(TheHexagonTarget,
00097                                           createHexagonMCSubtargetInfo);
00098 }