LLVM API Documentation
00001 //===-- LiveStackAnalysis.h - Live Stack Slot Analysis ----------*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file implements the live stack slot analysis pass. It is analogous to 00011 // live interval analysis except it's analyzing liveness of stack slots rather 00012 // than registers. 00013 // 00014 //===----------------------------------------------------------------------===// 00015 00016 #ifndef LLVM_CODEGEN_LIVESTACKANALYSIS_H 00017 #define LLVM_CODEGEN_LIVESTACKANALYSIS_H 00018 00019 #include "llvm/CodeGen/LiveInterval.h" 00020 #include "llvm/CodeGen/MachineFunctionPass.h" 00021 #include "llvm/Support/Allocator.h" 00022 #include "llvm/Target/TargetRegisterInfo.h" 00023 #include <map> 00024 00025 namespace llvm { 00026 00027 class LiveStacks : public MachineFunctionPass { 00028 const TargetRegisterInfo *TRI; 00029 00030 /// Special pool allocator for VNInfo's (LiveInterval val#). 00031 /// 00032 VNInfo::Allocator VNInfoAllocator; 00033 00034 /// S2IMap - Stack slot indices to live interval mapping. 00035 /// 00036 typedef std::map<int, LiveInterval> SS2IntervalMap; 00037 SS2IntervalMap S2IMap; 00038 00039 /// S2RCMap - Stack slot indices to register class mapping. 00040 std::map<int, const TargetRegisterClass*> S2RCMap; 00041 00042 public: 00043 static char ID; // Pass identification, replacement for typeid 00044 LiveStacks() : MachineFunctionPass(ID) { 00045 initializeLiveStacksPass(*PassRegistry::getPassRegistry()); 00046 } 00047 00048 typedef SS2IntervalMap::iterator iterator; 00049 typedef SS2IntervalMap::const_iterator const_iterator; 00050 const_iterator begin() const { return S2IMap.begin(); } 00051 const_iterator end() const { return S2IMap.end(); } 00052 iterator begin() { return S2IMap.begin(); } 00053 iterator end() { return S2IMap.end(); } 00054 00055 unsigned getNumIntervals() const { return (unsigned)S2IMap.size(); } 00056 00057 LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC); 00058 00059 LiveInterval &getInterval(int Slot) { 00060 assert(Slot >= 0 && "Spill slot indice must be >= 0"); 00061 SS2IntervalMap::iterator I = S2IMap.find(Slot); 00062 assert(I != S2IMap.end() && "Interval does not exist for stack slot"); 00063 return I->second; 00064 } 00065 00066 const LiveInterval &getInterval(int Slot) const { 00067 assert(Slot >= 0 && "Spill slot indice must be >= 0"); 00068 SS2IntervalMap::const_iterator I = S2IMap.find(Slot); 00069 assert(I != S2IMap.end() && "Interval does not exist for stack slot"); 00070 return I->second; 00071 } 00072 00073 bool hasInterval(int Slot) const { 00074 return S2IMap.count(Slot); 00075 } 00076 00077 const TargetRegisterClass *getIntervalRegClass(int Slot) const { 00078 assert(Slot >= 0 && "Spill slot indice must be >= 0"); 00079 std::map<int, const TargetRegisterClass*>::const_iterator 00080 I = S2RCMap.find(Slot); 00081 assert(I != S2RCMap.end() && 00082 "Register class info does not exist for stack slot"); 00083 return I->second; 00084 } 00085 00086 VNInfo::Allocator& getVNInfoAllocator() { return VNInfoAllocator; } 00087 00088 void getAnalysisUsage(AnalysisUsage &AU) const override; 00089 void releaseMemory() override; 00090 00091 /// runOnMachineFunction - pass entry point 00092 bool runOnMachineFunction(MachineFunction&) override; 00093 00094 /// print - Implement the dump method. 00095 void print(raw_ostream &O, const Module* = nullptr) const override; 00096 }; 00097 } 00098 00099 #endif /* LLVM_CODEGEN_LIVESTACK_ANALYSIS_H */