LLVM API Documentation

RegisterScavenging.h
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00001 //===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file declares the machine register scavenger class. It can provide
00011 // information such as unused register at any point in a machine basic block.
00012 // It also provides a mechanism to make registers availbale by evicting them
00013 // to spill slots.
00014 //
00015 //===----------------------------------------------------------------------===//
00016 
00017 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
00018 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
00019 
00020 #include "llvm/ADT/BitVector.h"
00021 #include "llvm/CodeGen/MachineBasicBlock.h"
00022 #include "llvm/CodeGen/MachineRegisterInfo.h"
00023 
00024 namespace llvm {
00025 
00026 class MachineRegisterInfo;
00027 class TargetRegisterInfo;
00028 class TargetInstrInfo;
00029 class TargetRegisterClass;
00030 
00031 class RegScavenger {
00032   const TargetRegisterInfo *TRI;
00033   const TargetInstrInfo *TII;
00034   MachineRegisterInfo* MRI;
00035   MachineBasicBlock *MBB;
00036   MachineBasicBlock::iterator MBBI;
00037   unsigned NumRegUnits;
00038 
00039   /// Tracking - True if RegScavenger is currently tracking the liveness of 
00040   /// registers.
00041   bool Tracking;
00042 
00043   /// Information on scavenged registers (held in a spill slot).
00044   struct ScavengedInfo {
00045     ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(nullptr) {}
00046 
00047     /// A spill slot used for scavenging a register post register allocation.
00048     int FrameIndex;
00049 
00050     /// If non-zero, the specific register is currently being
00051     /// scavenged. That is, it is spilled to this scavenging stack slot.
00052     unsigned Reg;
00053 
00054     /// The instruction that restores the scavenged register from stack.
00055     const MachineInstr *Restore;
00056   };
00057 
00058   /// A vector of information on scavenged registers.
00059   SmallVector<ScavengedInfo, 2> Scavenged;
00060 
00061   /// RegUnitsAvailable - The current state of each reg unit immediatelly
00062   /// before MBBI. One bit per register unit. If bit is not set it means any
00063   /// register containing that register unit is currently being used.
00064   BitVector RegUnitsAvailable;
00065 
00066   // These BitVectors are only used internally to forward(). They are members
00067   // to avoid frequent reallocations.
00068   BitVector KillRegUnits, DefRegUnits;
00069   BitVector TmpRegUnits;
00070 
00071 public:
00072   RegScavenger()
00073     : MBB(nullptr), NumRegUnits(0), Tracking(false) {}
00074 
00075   /// enterBasicBlock - Start tracking liveness from the begin of the specific
00076   /// basic block.
00077   void enterBasicBlock(MachineBasicBlock *mbb);
00078 
00079   /// initRegState - allow resetting register state info for multiple
00080   /// passes over/within the same function.
00081   void initRegState();
00082 
00083   /// forward - Move the internal MBB iterator and update register states.
00084   void forward();
00085 
00086   /// forward - Move the internal MBB iterator and update register states until
00087   /// it has processed the specific iterator.
00088   void forward(MachineBasicBlock::iterator I) {
00089     if (!Tracking && MBB->begin() != I) forward();
00090     while (MBBI != I) forward();
00091   }
00092 
00093   /// Invert the behavior of forward() on the current instruction (undo the
00094   /// changes to the available registers made by forward()).
00095   void unprocess();
00096 
00097   /// Unprocess instructions until you reach the provided iterator.
00098   void unprocess(MachineBasicBlock::iterator I) {
00099     while (MBBI != I) unprocess();
00100   }
00101 
00102   /// skipTo - Move the internal MBB iterator but do not update register states.
00103   void skipTo(MachineBasicBlock::iterator I) {
00104     if (I == MachineBasicBlock::iterator(nullptr))
00105       Tracking = false;
00106     MBBI = I;
00107   }
00108 
00109   MachineBasicBlock::iterator getCurrentPosition() const {
00110     return MBBI;
00111   }
00112   
00113   /// isRegUsed - return if a specific register is currently used.
00114   bool isRegUsed(unsigned Reg, bool includeReserved = true) const;
00115 
00116   /// getRegsAvailable - Return all available registers in the register class
00117   /// in Mask.
00118   BitVector getRegsAvailable(const TargetRegisterClass *RC);
00119 
00120   /// FindUnusedReg - Find a unused register of the specified register class.
00121   /// Return 0 if none is found.
00122   unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
00123 
00124   /// Add a scavenging frame index.
00125   void addScavengingFrameIndex(int FI) {
00126     Scavenged.push_back(ScavengedInfo(FI));
00127   }
00128 
00129   /// Query whether a frame index is a scavenging frame index.
00130   bool isScavengingFrameIndex(int FI) const {
00131     for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
00132          IE = Scavenged.end(); I != IE; ++I)
00133       if (I->FrameIndex == FI)
00134         return true;
00135 
00136     return false;
00137   }
00138 
00139   /// Get an array of scavenging frame indices.
00140   void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
00141     for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
00142          IE = Scavenged.end(); I != IE; ++I)
00143       if (I->FrameIndex >= 0)
00144         A.push_back(I->FrameIndex);
00145   }
00146 
00147   /// scavengeRegister - Make a register of the specific register class
00148   /// available and do the appropriate bookkeeping. SPAdj is the stack
00149   /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
00150   /// Returns the scavenged register.
00151   unsigned scavengeRegister(const TargetRegisterClass *RegClass,
00152                             MachineBasicBlock::iterator I, int SPAdj);
00153   unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
00154     return scavengeRegister(RegClass, MBBI, SPAdj);
00155   }
00156 
00157   /// setRegUsed - Tell the scavenger a register is used.
00158   ///
00159   void setRegUsed(unsigned Reg);
00160 private:
00161   /// isReserved - Returns true if a register is reserved. It is never "unused".
00162   bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
00163 
00164   /// setUsed / setUnused - Mark the state of one or a number of register units.
00165   ///
00166   void setUsed(BitVector &RegUnits) {
00167     RegUnitsAvailable.reset(RegUnits);
00168   }
00169   void setUnused(BitVector &RegUnits) {
00170     RegUnitsAvailable |= RegUnits;
00171   }
00172 
00173   /// Processes the current instruction and fill the KillRegUnits and
00174   /// DefRegUnits bit vectors.
00175   void determineKillsAndDefs();
00176   
00177   /// Add all Reg Units that Reg contains to BV.
00178   void addRegUnits(BitVector &BV, unsigned Reg);
00179   
00180   /// findSurvivorReg - Return the candidate register that is unused for the
00181   /// longest after StartMI. UseMI is set to the instruction where the search
00182   /// stopped.
00183   ///
00184   /// No more than InstrLimit instructions are inspected.
00185   unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
00186                            BitVector &Candidates,
00187                            unsigned InstrLimit,
00188                            MachineBasicBlock::iterator &UseMI);
00189 
00190 };
00191 
00192 } // End llvm namespace
00193 
00194 #endif