LLVM API Documentation

SystemZMCTargetDesc.cpp
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00001 //===-- SystemZMCTargetDesc.cpp - SystemZ target descriptions -------------===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 
00010 #include "SystemZMCTargetDesc.h"
00011 #include "InstPrinter/SystemZInstPrinter.h"
00012 #include "SystemZMCAsmInfo.h"
00013 #include "llvm/MC/MCCodeGenInfo.h"
00014 #include "llvm/MC/MCInstrInfo.h"
00015 #include "llvm/MC/MCStreamer.h"
00016 #include "llvm/MC/MCSubtargetInfo.h"
00017 #include "llvm/Support/TargetRegistry.h"
00018 
00019 using namespace llvm;
00020 
00021 #define GET_INSTRINFO_MC_DESC
00022 #include "SystemZGenInstrInfo.inc"
00023 
00024 #define GET_SUBTARGETINFO_MC_DESC
00025 #include "SystemZGenSubtargetInfo.inc"
00026 
00027 #define GET_REGINFO_MC_DESC
00028 #include "SystemZGenRegisterInfo.inc"
00029 
00030 const unsigned SystemZMC::GR32Regs[16] = {
00031   SystemZ::R0L, SystemZ::R1L, SystemZ::R2L, SystemZ::R3L,
00032   SystemZ::R4L, SystemZ::R5L, SystemZ::R6L, SystemZ::R7L,
00033   SystemZ::R8L, SystemZ::R9L, SystemZ::R10L, SystemZ::R11L,
00034   SystemZ::R12L, SystemZ::R13L, SystemZ::R14L, SystemZ::R15L
00035 };
00036 
00037 const unsigned SystemZMC::GRH32Regs[16] = {
00038   SystemZ::R0H, SystemZ::R1H, SystemZ::R2H, SystemZ::R3H,
00039   SystemZ::R4H, SystemZ::R5H, SystemZ::R6H, SystemZ::R7H,
00040   SystemZ::R8H, SystemZ::R9H, SystemZ::R10H, SystemZ::R11H,
00041   SystemZ::R12H, SystemZ::R13H, SystemZ::R14H, SystemZ::R15H
00042 };
00043 
00044 const unsigned SystemZMC::GR64Regs[16] = {
00045   SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D,
00046   SystemZ::R4D, SystemZ::R5D, SystemZ::R6D, SystemZ::R7D,
00047   SystemZ::R8D, SystemZ::R9D, SystemZ::R10D, SystemZ::R11D,
00048   SystemZ::R12D, SystemZ::R13D, SystemZ::R14D, SystemZ::R15D
00049 };
00050 
00051 const unsigned SystemZMC::GR128Regs[16] = {
00052   SystemZ::R0Q, 0, SystemZ::R2Q, 0,
00053   SystemZ::R4Q, 0, SystemZ::R6Q, 0,
00054   SystemZ::R8Q, 0, SystemZ::R10Q, 0,
00055   SystemZ::R12Q, 0, SystemZ::R14Q, 0
00056 };
00057 
00058 const unsigned SystemZMC::FP32Regs[16] = {
00059   SystemZ::F0S, SystemZ::F1S, SystemZ::F2S, SystemZ::F3S,
00060   SystemZ::F4S, SystemZ::F5S, SystemZ::F6S, SystemZ::F7S,
00061   SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S,
00062   SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S
00063 };
00064 
00065 const unsigned SystemZMC::FP64Regs[16] = {
00066   SystemZ::F0D, SystemZ::F1D, SystemZ::F2D, SystemZ::F3D,
00067   SystemZ::F4D, SystemZ::F5D, SystemZ::F6D, SystemZ::F7D,
00068   SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D,
00069   SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D
00070 };
00071 
00072 const unsigned SystemZMC::FP128Regs[16] = {
00073   SystemZ::F0Q, SystemZ::F1Q, 0, 0,
00074   SystemZ::F4Q, SystemZ::F5Q, 0, 0,
00075   SystemZ::F8Q, SystemZ::F9Q, 0, 0,
00076   SystemZ::F12Q, SystemZ::F13Q, 0, 0
00077 };
00078 
00079 unsigned SystemZMC::getFirstReg(unsigned Reg) {
00080   static unsigned Map[SystemZ::NUM_TARGET_REGS];
00081   static bool Initialized = false;
00082   if (!Initialized) {
00083     for (unsigned I = 0; I < 16; ++I) {
00084       Map[GR32Regs[I]] = I;
00085       Map[GRH32Regs[I]] = I;
00086       Map[GR64Regs[I]] = I;
00087       Map[GR128Regs[I]] = I;
00088       Map[FP32Regs[I]] = I;
00089       Map[FP64Regs[I]] = I;
00090       Map[FP128Regs[I]] = I;
00091     }
00092   }
00093   assert(Reg < SystemZ::NUM_TARGET_REGS);
00094   return Map[Reg];
00095 }
00096 
00097 static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI,
00098                                          StringRef TT) {
00099   MCAsmInfo *MAI = new SystemZMCAsmInfo(TT);
00100   MCCFIInstruction Inst =
00101       MCCFIInstruction::createDefCfa(nullptr,
00102                                      MRI.getDwarfRegNum(SystemZ::R15D, true),
00103                                      SystemZMC::CFAOffsetFromInitialSP);
00104   MAI->addInitialFrameState(Inst);
00105   return MAI;
00106 }
00107 
00108 static MCInstrInfo *createSystemZMCInstrInfo() {
00109   MCInstrInfo *X = new MCInstrInfo();
00110   InitSystemZMCInstrInfo(X);
00111   return X;
00112 }
00113 
00114 static MCRegisterInfo *createSystemZMCRegisterInfo(StringRef TT) {
00115   MCRegisterInfo *X = new MCRegisterInfo();
00116   InitSystemZMCRegisterInfo(X, SystemZ::R14D);
00117   return X;
00118 }
00119 
00120 static MCSubtargetInfo *createSystemZMCSubtargetInfo(StringRef TT,
00121                                                      StringRef CPU,
00122                                                      StringRef FS) {
00123   MCSubtargetInfo *X = new MCSubtargetInfo();
00124   InitSystemZMCSubtargetInfo(X, TT, CPU, FS);
00125   return X;
00126 }
00127 
00128 static MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM,
00129                                                  CodeModel::Model CM,
00130                                                  CodeGenOpt::Level OL) {
00131   MCCodeGenInfo *X = new MCCodeGenInfo();
00132 
00133   // Static code is suitable for use in a dynamic executable; there is no
00134   // separate DynamicNoPIC model.
00135   if (RM == Reloc::Default || RM == Reloc::DynamicNoPIC)
00136     RM = Reloc::Static;
00137 
00138   // For SystemZ we define the models as follows:
00139   //
00140   // Small:  BRASL can call any function and will use a stub if necessary.
00141   //         Locally-binding symbols will always be in range of LARL.
00142   //
00143   // Medium: BRASL can call any function and will use a stub if necessary.
00144   //         GOT slots and locally-defined text will always be in range
00145   //         of LARL, but other symbols might not be.
00146   //
00147   // Large:  Equivalent to Medium for now.
00148   //
00149   // Kernel: Equivalent to Medium for now.
00150   //
00151   // This means that any PIC module smaller than 4GB meets the
00152   // requirements of Small, so Small seems like the best default there.
00153   //
00154   // All symbols bind locally in a non-PIC module, so the choice is less
00155   // obvious.  There are two cases:
00156   //
00157   // - When creating an executable, PLTs and copy relocations allow
00158   //   us to treat external symbols as part of the executable.
00159   //   Any executable smaller than 4GB meets the requirements of Small,
00160   //   so that seems like the best default.
00161   //
00162   // - When creating JIT code, stubs will be in range of BRASL if the
00163   //   image is less than 4GB in size.  GOT entries will likewise be
00164   //   in range of LARL.  However, the JIT environment has no equivalent
00165   //   of copy relocs, so locally-binding data symbols might not be in
00166   //   the range of LARL.  We need the Medium model in that case.
00167   if (CM == CodeModel::Default)
00168     CM = CodeModel::Small;
00169   else if (CM == CodeModel::JITDefault)
00170     CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium;
00171   X->InitMCCodeGenInfo(RM, CM, OL);
00172   return X;
00173 }
00174 
00175 static MCInstPrinter *createSystemZMCInstPrinter(const Target &T,
00176                                                  unsigned SyntaxVariant,
00177                                                  const MCAsmInfo &MAI,
00178                                                  const MCInstrInfo &MII,
00179                                                  const MCRegisterInfo &MRI,
00180                                                  const MCSubtargetInfo &STI) {
00181   return new SystemZInstPrinter(MAI, MII, MRI);
00182 }
00183 
00184 static MCStreamer *createSystemZMCObjectStreamer(const Target &T, StringRef TT,
00185                                                  MCContext &Ctx,
00186                                                  MCAsmBackend &MAB,
00187                                                  raw_ostream &OS,
00188                                                  MCCodeEmitter *Emitter,
00189                                                  const MCSubtargetInfo &STI,
00190                                                  bool RelaxAll,
00191                                                  bool NoExecStack) {
00192   return createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll, NoExecStack);
00193 }
00194 
00195 extern "C" void LLVMInitializeSystemZTargetMC() {
00196   // Register the MCAsmInfo.
00197   TargetRegistry::RegisterMCAsmInfo(TheSystemZTarget,
00198                                     createSystemZMCAsmInfo);
00199 
00200   // Register the MCCodeGenInfo.
00201   TargetRegistry::RegisterMCCodeGenInfo(TheSystemZTarget,
00202                                         createSystemZMCCodeGenInfo);
00203 
00204   // Register the MCCodeEmitter.
00205   TargetRegistry::RegisterMCCodeEmitter(TheSystemZTarget,
00206           createSystemZMCCodeEmitter);
00207 
00208   // Register the MCInstrInfo.
00209   TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget,
00210                                       createSystemZMCInstrInfo);
00211 
00212   // Register the MCRegisterInfo.
00213   TargetRegistry::RegisterMCRegInfo(TheSystemZTarget,
00214                                     createSystemZMCRegisterInfo);
00215 
00216   // Register the MCSubtargetInfo.
00217   TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget,
00218                                           createSystemZMCSubtargetInfo);
00219 
00220   // Register the MCAsmBackend.
00221   TargetRegistry::RegisterMCAsmBackend(TheSystemZTarget,
00222                                        createSystemZMCAsmBackend);
00223 
00224   // Register the MCInstPrinter.
00225   TargetRegistry::RegisterMCInstPrinter(TheSystemZTarget,
00226                                         createSystemZMCInstPrinter);
00227 
00228   // Register the MCObjectStreamer;
00229   TargetRegistry::RegisterMCObjectStreamer(TheSystemZTarget,
00230                                            createSystemZMCObjectStreamer);
00231 }