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7990.c
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1 /*
2  * 7990.c -- LANCE ethernet IC generic routines.
3  * This is an attempt to separate out the bits of various ethernet
4  * drivers that are common because they all use the AMD 7990 LANCE
5  * (Local Area Network Controller for Ethernet) chip.
6  *
7  * Copyright (C) 05/1998 Peter Maydell <[email protected]>
8  *
9  * Most of this stuff was obtained by looking at other LANCE drivers,
10  * in particular a2065.[ch]. The AMD C-LANCE datasheet was also helpful.
11  * NB: this was made easy by the fact that Jes Sorensen had cleaned up
12  * most of a2025 and sunlance with the aim of merging them, so the
13  * common code was pretty obvious.
14  */
15 #include <linux/crc32.h>
16 #include <linux/delay.h>
17 #include <linux/errno.h>
18 #include <linux/netdevice.h>
19 #include <linux/etherdevice.h>
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/types.h>
24 #include <linux/fcntl.h>
25 #include <linux/interrupt.h>
26 #include <linux/ioport.h>
27 #include <linux/in.h>
28 #include <linux/route.h>
29 #include <linux/string.h>
30 #include <linux/skbuff.h>
31 #include <asm/irq.h>
32 /* Used for the temporal inet entries and routing */
33 #include <linux/socket.h>
34 #include <linux/bitops.h>
35 
36 #include <asm/io.h>
37 #include <asm/dma.h>
38 #include <asm/pgtable.h>
39 #ifdef CONFIG_HP300
40 #include <asm/blinken.h>
41 #endif
42 
43 #include "7990.h"
44 
45 #define WRITERAP(lp,x) out_be16(lp->base + LANCE_RAP, (x))
46 #define WRITERDP(lp,x) out_be16(lp->base + LANCE_RDP, (x))
47 #define READRDP(lp) in_be16(lp->base + LANCE_RDP)
48 
49 #if defined(CONFIG_HPLANCE) || defined(CONFIG_HPLANCE_MODULE)
50 #include "hplance.h"
51 
52 #undef WRITERAP
53 #undef WRITERDP
54 #undef READRDP
55 
56 #if defined(CONFIG_MVME147_NET) || defined(CONFIG_MVME147_NET_MODULE)
57 
58 /* Lossage Factor Nine, Mr Sulu. */
59 #define WRITERAP(lp,x) (lp->writerap(lp,x))
60 #define WRITERDP(lp,x) (lp->writerdp(lp,x))
61 #define READRDP(lp) (lp->readrdp(lp))
62 
63 #else
64 
65 /* These inlines can be used if only CONFIG_HPLANCE is defined */
66 static inline void WRITERAP(struct lance_private *lp, __u16 value)
67 {
68  do {
69  out_be16(lp->base + HPLANCE_REGOFF + LANCE_RAP, value);
70  } while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
71 }
72 
73 static inline void WRITERDP(struct lance_private *lp, __u16 value)
74 {
75  do {
76  out_be16(lp->base + HPLANCE_REGOFF + LANCE_RDP, value);
77  } while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
78 }
79 
80 static inline __u16 READRDP(struct lance_private *lp)
81 {
82  __u16 value;
83  do {
84  value = in_be16(lp->base + HPLANCE_REGOFF + LANCE_RDP);
85  } while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
86  return value;
87 }
88 
89 #endif
90 #endif /* CONFIG_HPLANCE || CONFIG_HPLANCE_MODULE */
91 
92 /* debugging output macros, various flavours */
93 /* #define TEST_HITS */
94 #ifdef UNDEF
95 #define PRINT_RINGS() \
96 do { \
97  int t; \
98  for (t=0; t < RX_RING_SIZE; t++) { \
99  printk("R%d: @(%02X %04X) len %04X, mblen %04X, bits %02X\n",\
100  t, ib->brx_ring[t].rmd1_hadr, ib->brx_ring[t].rmd0,\
101  ib->brx_ring[t].length,\
102  ib->brx_ring[t].mblength, ib->brx_ring[t].rmd1_bits);\
103  }\
104  for (t=0; t < TX_RING_SIZE; t++) { \
105  printk("T%d: @(%02X %04X) len %04X, misc %04X, bits %02X\n",\
106  t, ib->btx_ring[t].tmd1_hadr, ib->btx_ring[t].tmd0,\
107  ib->btx_ring[t].length,\
108  ib->btx_ring[t].misc, ib->btx_ring[t].tmd1_bits);\
109  }\
110 } while (0)
111 #else
112 #define PRINT_RINGS()
113 #endif
114 
115 /* Load the CSR registers. The LANCE has to be STOPped when we do this! */
116 static void load_csrs (struct lance_private *lp)
117 {
118  volatile struct lance_init_block *aib = lp->lance_init_block;
119  int leptr;
120 
121  leptr = LANCE_ADDR (aib);
122 
123  WRITERAP(lp, LE_CSR1); /* load address of init block */
124  WRITERDP(lp, leptr & 0xFFFF);
125  WRITERAP(lp, LE_CSR2);
126  WRITERDP(lp, leptr >> 16);
127  WRITERAP(lp, LE_CSR3);
128  WRITERDP(lp, lp->busmaster_regval); /* set byteswap/ALEctrl/byte ctrl */
129 
130  /* Point back to csr0 */
131  WRITERAP(lp, LE_CSR0);
132 }
133 
134 /* #define to 0 or 1 appropriately */
135 #define DEBUG_IRING 0
136 /* Set up the Lance Rx and Tx rings and the init block */
137 static void lance_init_ring (struct net_device *dev)
138 {
139  struct lance_private *lp = netdev_priv(dev);
140  volatile struct lance_init_block *ib = lp->init_block;
141  volatile struct lance_init_block *aib; /* for LANCE_ADDR computations */
142  int leptr;
143  int i;
144 
145  aib = lp->lance_init_block;
146 
147  lp->rx_new = lp->tx_new = 0;
148  lp->rx_old = lp->tx_old = 0;
149 
150  ib->mode = LE_MO_PROM; /* normal, enable Tx & Rx */
151 
152  /* Copy the ethernet address to the lance init block
153  * Notice that we do a byteswap if we're big endian.
154  * [I think this is the right criterion; at least, sunlance,
155  * a2065 and atarilance do the byteswap and lance.c (PC) doesn't.
156  * However, the datasheet says that the BSWAP bit doesn't affect
157  * the init block, so surely it should be low byte first for
158  * everybody? Um.]
159  * We could define the ib->physaddr as three 16bit values and
160  * use (addr[1] << 8) | addr[0] & co, but this is more efficient.
161  */
162 #ifdef __BIG_ENDIAN
163  ib->phys_addr [0] = dev->dev_addr [1];
164  ib->phys_addr [1] = dev->dev_addr [0];
165  ib->phys_addr [2] = dev->dev_addr [3];
166  ib->phys_addr [3] = dev->dev_addr [2];
167  ib->phys_addr [4] = dev->dev_addr [5];
168  ib->phys_addr [5] = dev->dev_addr [4];
169 #else
170  for (i=0; i<6; i++)
171  ib->phys_addr[i] = dev->dev_addr[i];
172 #endif
173 
174  if (DEBUG_IRING)
175  printk ("TX rings:\n");
176 
177  lp->tx_full = 0;
178  /* Setup the Tx ring entries */
179  for (i = 0; i < (1<<lp->lance_log_tx_bufs); i++) {
180  leptr = LANCE_ADDR(&aib->tx_buf[i][0]);
181  ib->btx_ring [i].tmd0 = leptr;
182  ib->btx_ring [i].tmd1_hadr = leptr >> 16;
183  ib->btx_ring [i].tmd1_bits = 0;
184  ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
185  ib->btx_ring [i].misc = 0;
186  if (DEBUG_IRING)
187  printk ("%d: 0x%8.8x\n", i, leptr);
188  }
189 
190  /* Setup the Rx ring entries */
191  if (DEBUG_IRING)
192  printk ("RX rings:\n");
193  for (i = 0; i < (1<<lp->lance_log_rx_bufs); i++) {
194  leptr = LANCE_ADDR(&aib->rx_buf[i][0]);
195 
196  ib->brx_ring [i].rmd0 = leptr;
197  ib->brx_ring [i].rmd1_hadr = leptr >> 16;
198  ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
199  /* 0xf000 == bits that must be one (reserved, presumably) */
200  ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
201  ib->brx_ring [i].mblength = 0;
202  if (DEBUG_IRING)
203  printk ("%d: 0x%8.8x\n", i, leptr);
204  }
205 
206  /* Setup the initialization block */
207 
208  /* Setup rx descriptor pointer */
209  leptr = LANCE_ADDR(&aib->brx_ring);
210  ib->rx_len = (lp->lance_log_rx_bufs << 13) | (leptr >> 16);
211  ib->rx_ptr = leptr;
212  if (DEBUG_IRING)
213  printk ("RX ptr: %8.8x\n", leptr);
214 
215  /* Setup tx descriptor pointer */
216  leptr = LANCE_ADDR(&aib->btx_ring);
217  ib->tx_len = (lp->lance_log_tx_bufs << 13) | (leptr >> 16);
218  ib->tx_ptr = leptr;
219  if (DEBUG_IRING)
220  printk ("TX ptr: %8.8x\n", leptr);
221 
222  /* Clear the multicast filter */
223  ib->filter [0] = 0;
224  ib->filter [1] = 0;
225  PRINT_RINGS();
226 }
227 
228 /* LANCE must be STOPped before we do this, too... */
229 static int init_restart_lance (struct lance_private *lp)
230 {
231  int i;
232 
233  WRITERAP(lp, LE_CSR0);
234  WRITERDP(lp, LE_C0_INIT);
235 
236  /* Need a hook here for sunlance ledma stuff */
237 
238  /* Wait for the lance to complete initialization */
239  for (i = 0; (i < 100) && !(READRDP(lp) & (LE_C0_ERR | LE_C0_IDON)); i++)
240  barrier();
241  if ((i == 100) || (READRDP(lp) & LE_C0_ERR)) {
242  printk ("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, READRDP(lp));
243  return -1;
244  }
245 
246  /* Clear IDON by writing a "1", enable interrupts and start lance */
247  WRITERDP(lp, LE_C0_IDON);
248  WRITERDP(lp, LE_C0_INEA | LE_C0_STRT);
249 
250  return 0;
251 }
252 
253 static int lance_reset (struct net_device *dev)
254 {
255  struct lance_private *lp = netdev_priv(dev);
256  int status;
257 
258  /* Stop the lance */
259  WRITERAP(lp, LE_CSR0);
260  WRITERDP(lp, LE_C0_STOP);
261 
262  load_csrs (lp);
263  lance_init_ring (dev);
264  dev->trans_start = jiffies; /* prevent tx timeout */
265  status = init_restart_lance (lp);
266 #ifdef DEBUG_DRIVER
267  printk ("Lance restart=%d\n", status);
268 #endif
269  return status;
270 }
271 
272 static int lance_rx (struct net_device *dev)
273 {
274  struct lance_private *lp = netdev_priv(dev);
275  volatile struct lance_init_block *ib = lp->init_block;
276  volatile struct lance_rx_desc *rd;
277  unsigned char bits;
278 #ifdef TEST_HITS
279  int i;
280 #endif
281 
282 #ifdef TEST_HITS
283  printk ("[");
284  for (i = 0; i < RX_RING_SIZE; i++) {
285  if (i == lp->rx_new)
286  printk ("%s",
287  ib->brx_ring [i].rmd1_bits & LE_R1_OWN ? "_" : "X");
288  else
289  printk ("%s",
290  ib->brx_ring [i].rmd1_bits & LE_R1_OWN ? "." : "1");
291  }
292  printk ("]");
293 #endif
294 #ifdef CONFIG_HP300
295  blinken_leds(0x40, 0);
296 #endif
297  WRITERDP(lp, LE_C0_RINT | LE_C0_INEA); /* ack Rx int, reenable ints */
298  for (rd = &ib->brx_ring [lp->rx_new]; /* For each Rx ring we own... */
299  !((bits = rd->rmd1_bits) & LE_R1_OWN);
300  rd = &ib->brx_ring [lp->rx_new]) {
301 
302  /* We got an incomplete frame? */
303  if ((bits & LE_R1_POK) != LE_R1_POK) {
304  dev->stats.rx_over_errors++;
305  dev->stats.rx_errors++;
306  continue;
307  } else if (bits & LE_R1_ERR) {
308  /* Count only the end frame as a rx error,
309  * not the beginning
310  */
311  if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
312  if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
313  if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
314  if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
315  if (bits & LE_R1_EOP) dev->stats.rx_errors++;
316  } else {
317  int len = (rd->mblength & 0xfff) - 4;
318  struct sk_buff *skb = netdev_alloc_skb(dev, len + 2);
319 
320  if (!skb) {
321  printk ("%s: Memory squeeze, deferring packet.\n",
322  dev->name);
323  dev->stats.rx_dropped++;
324  rd->mblength = 0;
325  rd->rmd1_bits = LE_R1_OWN;
326  lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask;
327  return 0;
328  }
329 
330  skb_reserve (skb, 2); /* 16 byte align */
331  skb_put (skb, len); /* make room */
332  skb_copy_to_linear_data(skb,
333  (unsigned char *)&(ib->rx_buf [lp->rx_new][0]),
334  len);
335  skb->protocol = eth_type_trans (skb, dev);
336  netif_rx (skb);
337  dev->stats.rx_packets++;
338  dev->stats.rx_bytes += len;
339  }
340 
341  /* Return the packet to the pool */
342  rd->mblength = 0;
343  rd->rmd1_bits = LE_R1_OWN;
344  lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask;
345  }
346  return 0;
347 }
348 
349 static int lance_tx (struct net_device *dev)
350 {
351  struct lance_private *lp = netdev_priv(dev);
352  volatile struct lance_init_block *ib = lp->init_block;
353  volatile struct lance_tx_desc *td;
354  int i, j;
355  int status;
356 
357 #ifdef CONFIG_HP300
358  blinken_leds(0x80, 0);
359 #endif
360  /* csr0 is 2f3 */
361  WRITERDP(lp, LE_C0_TINT | LE_C0_INEA);
362  /* csr0 is 73 */
363 
364  j = lp->tx_old;
365  for (i = j; i != lp->tx_new; i = j) {
366  td = &ib->btx_ring [i];
367 
368  /* If we hit a packet not owned by us, stop */
369  if (td->tmd1_bits & LE_T1_OWN)
370  break;
371 
372  if (td->tmd1_bits & LE_T1_ERR) {
373  status = td->misc;
374 
375  dev->stats.tx_errors++;
376  if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
377  if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
378 
379  if (status & LE_T3_CLOS) {
380  dev->stats.tx_carrier_errors++;
381  if (lp->auto_select) {
382  lp->tpe = 1 - lp->tpe;
383  printk("%s: Carrier Lost, trying %s\n",
384  dev->name, lp->tpe?"TPE":"AUI");
385  /* Stop the lance */
386  WRITERAP(lp, LE_CSR0);
387  WRITERDP(lp, LE_C0_STOP);
388  lance_init_ring (dev);
389  load_csrs (lp);
390  init_restart_lance (lp);
391  return 0;
392  }
393  }
394 
395  /* buffer errors and underflows turn off the transmitter */
396  /* Restart the adapter */
397  if (status & (LE_T3_BUF|LE_T3_UFL)) {
398  dev->stats.tx_fifo_errors++;
399 
400  printk ("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
401  dev->name);
402  /* Stop the lance */
403  WRITERAP(lp, LE_CSR0);
404  WRITERDP(lp, LE_C0_STOP);
405  lance_init_ring (dev);
406  load_csrs (lp);
407  init_restart_lance (lp);
408  return 0;
409  }
410  } else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
411  /*
412  * So we don't count the packet more than once.
413  */
414  td->tmd1_bits &= ~(LE_T1_POK);
415 
416  /* One collision before packet was sent. */
417  if (td->tmd1_bits & LE_T1_EONE)
418  dev->stats.collisions++;
419 
420  /* More than one collision, be optimistic. */
421  if (td->tmd1_bits & LE_T1_EMORE)
422  dev->stats.collisions += 2;
423 
424  dev->stats.tx_packets++;
425  }
426 
427  j = (j + 1) & lp->tx_ring_mod_mask;
428  }
429  lp->tx_old = j;
430  WRITERDP(lp, LE_C0_TINT | LE_C0_INEA);
431  return 0;
432 }
433 
434 static irqreturn_t
435 lance_interrupt (int irq, void *dev_id)
436 {
437  struct net_device *dev = (struct net_device *)dev_id;
438  struct lance_private *lp = netdev_priv(dev);
439  int csr0;
440 
441  spin_lock (&lp->devlock);
442 
443  WRITERAP(lp, LE_CSR0); /* LANCE Controller Status */
444  csr0 = READRDP(lp);
445 
446  PRINT_RINGS();
447 
448  if (!(csr0 & LE_C0_INTR)) { /* Check if any interrupt has */
449  spin_unlock (&lp->devlock);
450  return IRQ_NONE; /* been generated by the Lance. */
451  }
452 
453  /* Acknowledge all the interrupt sources ASAP */
454  WRITERDP(lp, csr0 & ~(LE_C0_INEA|LE_C0_TDMD|LE_C0_STOP|LE_C0_STRT|LE_C0_INIT));
455 
456  if ((csr0 & LE_C0_ERR)) {
457  /* Clear the error condition */
458  WRITERDP(lp, LE_C0_BABL|LE_C0_ERR|LE_C0_MISS|LE_C0_INEA);
459  }
460 
461  if (csr0 & LE_C0_RINT)
462  lance_rx (dev);
463 
464  if (csr0 & LE_C0_TINT)
465  lance_tx (dev);
466 
467  /* Log misc errors. */
468  if (csr0 & LE_C0_BABL)
469  dev->stats.tx_errors++; /* Tx babble. */
470  if (csr0 & LE_C0_MISS)
471  dev->stats.rx_errors++; /* Missed a Rx frame. */
472  if (csr0 & LE_C0_MERR) {
473  printk("%s: Bus master arbitration failure, status %4.4x.\n",
474  dev->name, csr0);
475  /* Restart the chip. */
476  WRITERDP(lp, LE_C0_STRT);
477  }
478 
479  if (lp->tx_full && netif_queue_stopped(dev) && (TX_BUFFS_AVAIL >= 0)) {
480  lp->tx_full = 0;
481  netif_wake_queue (dev);
482  }
483 
484  WRITERAP(lp, LE_CSR0);
485  WRITERDP(lp, LE_C0_BABL|LE_C0_CERR|LE_C0_MISS|LE_C0_MERR|LE_C0_IDON|LE_C0_INEA);
486 
487  spin_unlock (&lp->devlock);
488  return IRQ_HANDLED;
489 }
490 
491 int lance_open (struct net_device *dev)
492 {
493  struct lance_private *lp = netdev_priv(dev);
494  int res;
495 
496  /* Install the Interrupt handler. Or we could shunt this out to specific drivers? */
497  if (request_irq(lp->irq, lance_interrupt, IRQF_SHARED, lp->name, dev))
498  return -EAGAIN;
499 
500  res = lance_reset(dev);
501  spin_lock_init(&lp->devlock);
502  netif_start_queue (dev);
503 
504  return res;
505 }
506 EXPORT_SYMBOL_GPL(lance_open);
507 
508 int lance_close (struct net_device *dev)
509 {
510  struct lance_private *lp = netdev_priv(dev);
511 
512  netif_stop_queue (dev);
513 
514  /* Stop the LANCE */
515  WRITERAP(lp, LE_CSR0);
516  WRITERDP(lp, LE_C0_STOP);
517 
518  free_irq(lp->irq, dev);
519 
520  return 0;
521 }
522 EXPORT_SYMBOL_GPL(lance_close);
523 
524 void lance_tx_timeout(struct net_device *dev)
525 {
526  printk("lance_tx_timeout\n");
527  lance_reset(dev);
528  dev->trans_start = jiffies; /* prevent tx timeout */
529  netif_wake_queue (dev);
530 }
531 EXPORT_SYMBOL_GPL(lance_tx_timeout);
532 
533 int lance_start_xmit (struct sk_buff *skb, struct net_device *dev)
534 {
535  struct lance_private *lp = netdev_priv(dev);
536  volatile struct lance_init_block *ib = lp->init_block;
537  int entry, skblen, len;
538  static int outs;
539  unsigned long flags;
540 
541  if (!TX_BUFFS_AVAIL)
542  return NETDEV_TX_LOCKED;
543 
544  netif_stop_queue (dev);
545 
546  skblen = skb->len;
547 
548 #ifdef DEBUG_DRIVER
549  /* dump the packet */
550  {
551  int i;
552 
553  for (i = 0; i < 64; i++) {
554  if ((i % 16) == 0)
555  printk ("\n");
556  printk ("%2.2x ", skb->data [i]);
557  }
558  }
559 #endif
560  len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
561  entry = lp->tx_new & lp->tx_ring_mod_mask;
562  ib->btx_ring [entry].length = (-len) | 0xf000;
563  ib->btx_ring [entry].misc = 0;
564 
565  if (skb->len < ETH_ZLEN)
566  memset((void *)&ib->tx_buf[entry][0], 0, ETH_ZLEN);
567  skb_copy_from_linear_data(skb, (void *)&ib->tx_buf[entry][0], skblen);
568 
569  /* Now, give the packet to the lance */
570  ib->btx_ring [entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
571  lp->tx_new = (lp->tx_new+1) & lp->tx_ring_mod_mask;
572 
573  outs++;
574  /* Kick the lance: transmit now */
575  WRITERDP(lp, LE_C0_INEA | LE_C0_TDMD);
576  dev_kfree_skb (skb);
577 
578  spin_lock_irqsave (&lp->devlock, flags);
579  if (TX_BUFFS_AVAIL)
580  netif_start_queue (dev);
581  else
582  lp->tx_full = 1;
583  spin_unlock_irqrestore (&lp->devlock, flags);
584 
585  return NETDEV_TX_OK;
586 }
587 EXPORT_SYMBOL_GPL(lance_start_xmit);
588 
589 /* taken from the depca driver via a2065.c */
590 static void lance_load_multicast (struct net_device *dev)
591 {
592  struct lance_private *lp = netdev_priv(dev);
593  volatile struct lance_init_block *ib = lp->init_block;
594  volatile u16 *mcast_table = (u16 *)&ib->filter;
595  struct netdev_hw_addr *ha;
596  u32 crc;
597 
598  /* set all multicast bits */
599  if (dev->flags & IFF_ALLMULTI){
600  ib->filter [0] = 0xffffffff;
601  ib->filter [1] = 0xffffffff;
602  return;
603  }
604  /* clear the multicast filter */
605  ib->filter [0] = 0;
606  ib->filter [1] = 0;
607 
608  /* Add addresses */
609  netdev_for_each_mc_addr(ha, dev) {
610  crc = ether_crc_le(6, ha->addr);
611  crc = crc >> 26;
612  mcast_table [crc >> 4] |= 1 << (crc & 0xf);
613  }
614 }
615 
616 
617 void lance_set_multicast (struct net_device *dev)
618 {
619  struct lance_private *lp = netdev_priv(dev);
620  volatile struct lance_init_block *ib = lp->init_block;
621  int stopped;
622 
623  stopped = netif_queue_stopped(dev);
624  if (!stopped)
625  netif_stop_queue (dev);
626 
627  while (lp->tx_old != lp->tx_new)
628  schedule();
629 
630  WRITERAP(lp, LE_CSR0);
631  WRITERDP(lp, LE_C0_STOP);
632  lance_init_ring (dev);
633 
634  if (dev->flags & IFF_PROMISC) {
635  ib->mode |= LE_MO_PROM;
636  } else {
637  ib->mode &= ~LE_MO_PROM;
638  lance_load_multicast (dev);
639  }
640  load_csrs (lp);
641  init_restart_lance (lp);
642 
643  if (!stopped)
644  netif_start_queue (dev);
645 }
646 EXPORT_SYMBOL_GPL(lance_set_multicast);
647 
648 #ifdef CONFIG_NET_POLL_CONTROLLER
649 void lance_poll(struct net_device *dev)
650 {
651  struct lance_private *lp = netdev_priv(dev);
652 
653  spin_lock (&lp->devlock);
654  WRITERAP(lp, LE_CSR0);
655  WRITERDP(lp, LE_C0_STRT);
656  spin_unlock (&lp->devlock);
657  lance_interrupt(dev->irq, dev);
658 }
659 #endif
660 
661 MODULE_LICENSE("GPL");
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