Linux Kernel
3.7.1
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Data Structures | |
struct | lance_rx_desc |
struct | lance_tx_desc |
struct | lance_init_block |
struct | lance_private |
Macros | |
#define | LANCE_RDP 0 /* Register Data Port */ |
#define | LANCE_RAP 2 /* Register Address Port */ |
#define | LANCE_LOG_TX_BUFFERS 1 |
#define | LANCE_LOG_RX_BUFFERS 3 |
#define | TX_RING_SIZE (1<<LANCE_LOG_TX_BUFFERS) |
#define | RX_RING_SIZE (1<<LANCE_LOG_RX_BUFFERS) |
#define | TX_RING_MOD_MASK (TX_RING_SIZE - 1) |
#define | RX_RING_MOD_MASK (RX_RING_SIZE - 1) |
#define | TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29) |
#define | RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29) |
#define | PKT_BUFF_SIZE (1544) |
#define | RX_BUFF_SIZE PKT_BUFF_SIZE |
#define | TX_BUFF_SIZE PKT_BUFF_SIZE |
#define | LE_CSR0 0x0000 /* LANCE Controller Status */ |
#define | LE_CSR1 0x0001 /* IADR[15:0] (bit0==0 ie word aligned) */ |
#define | LE_CSR2 0x0002 /* IADR[23:16] (high bits reserved) */ |
#define | LE_CSR3 0x0003 /* Misc */ |
#define | LE_C0_ERR 0x8000 /* Error = BABL | CERR | MISS | MERR */ |
#define | LE_C0_BABL 0x4000 /* Babble: Transmitted too many bits */ |
#define | LE_C0_CERR 0x2000 /* No Heartbeat (10BASE-T) */ |
#define | LE_C0_MISS 0x1000 /* Missed Frame (no rx buffer to put it in) */ |
#define | LE_C0_MERR 0x0800 /* Memory Error */ |
#define | LE_C0_RINT 0x0400 /* Receive Interrupt */ |
#define | LE_C0_TINT 0x0200 /* Transmit Interrupt */ |
#define | LE_C0_IDON 0x0100 /* Initialization Done */ |
#define | LE_C0_INTR |
#define | LE_C0_INEA 0x0040 /* Interrupt Enable */ |
#define | LE_C0_RXON 0x0020 /* Receive On */ |
#define | LE_C0_TXON 0x0010 /* Transmit On */ |
#define | LE_C0_TDMD 0x0008 /* Transmit Demand */ |
#define | LE_C0_STOP 0x0004 /* Stop */ |
#define | LE_C0_STRT 0x0002 /* Start */ |
#define | LE_C0_INIT 0x0001 /* Initialize */ |
#define | LE_C3_BSWP |
#define | LE_C3_ACON |
#define | LE_C3_BCON 0x0001 /* Byte Control */ |
#define | LE_MO_PROM 0x8000 /* Promiscuous Mode */ |
#define | LE_MO_DRCVBC 0x4000 /* disable receive broadcast */ |
#define | LE_MO_DRCVPA 0x2000 /* disable physical address detection */ |
#define | LE_MO_DLNKTST 0x1000 /* disable link status */ |
#define | LE_MO_DAPC 0x0800 /* disable automatic polarity correction */ |
#define | LE_MO_MENDECL 0x0400 /* MENDEC loopback mode */ |
#define | LE_MO_LRTTSEL 0x0200 /* lower RX threshold / TX mode selection */ |
#define | LE_MO_PSEL1 0x0100 /* port selection bit1 */ |
#define | LE_MO_PSEL0 0x0080 /* port selection bit0 */ |
#define | LE_MO_EMBA |
#define | LE_MO_INTL 0x0040 /* Internal Loopback */ |
#define | LE_MO_DRTY 0x0020 /* Disable Retry */ |
#define | LE_MO_FCOLL 0x0010 /* Force Collision */ |
#define | LE_MO_DXMTFCS 0x0008 /* Disable Transmit CRC */ |
#define | LE_MO_LOOP 0x0004 /* Loopback Enable */ |
#define | LE_MO_DTX 0x0002 /* Disable Transmitter */ |
#define | LE_MO_DRX 0x0001 /* Disable Receiver */ |
#define | LE_R1_OWN 0x80 /* LANCE owns the descriptor */ |
#define | LE_R1_ERR 0x40 /* Error */ |
#define | LE_R1_FRA 0x20 /* Framing Error */ |
#define | LE_R1_OFL 0x10 /* Overflow Error */ |
#define | LE_R1_CRC 0x08 /* CRC Error */ |
#define | LE_R1_BUF 0x04 /* Buffer Error */ |
#define | LE_R1_SOP 0x02 /* Start of Packet */ |
#define | LE_R1_EOP 0x01 /* End of Packet */ |
#define | LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */ |
#define | LE_T1_OWN 0x80 /* LANCE owns the descriptor */ |
#define | LE_T1_ERR 0x40 /* Error */ |
#define | LE_T1_RES 0x20 /* Reserved, LANCE writes this with a zero */ |
#define | LE_T1_EMORE 0x10 /* More than one retry needed */ |
#define | LE_T1_EONE 0x08 /* One retry needed */ |
#define | LE_T1_EDEF 0x04 /* Deferred */ |
#define | LE_T1_SOP 0x02 /* Start of Packet */ |
#define | LE_T1_EOP 0x01 /* End of Packet */ |
#define | LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */ |
#define | LE_T3_BUF 0x8000 /* Buffer Error */ |
#define | LE_T3_UFL 0x4000 /* Underflow Error */ |
#define | LE_T3_LCOL 0x1000 /* Late Collision */ |
#define | LE_T3_CLOS 0x0800 /* Loss of Carrier */ |
#define | LE_T3_RTY 0x0400 /* Retry Error */ |
#define | LE_T3_TDR 0x03ff /* Time Domain Reflectometry */ |
#define | TX_BUFFS_AVAIL |
#define | LANCE_ADDR(x) ((int)(x) & ~0xff000000) |
Functions | |
int | lance_open (struct net_device *dev) |
int | lance_close (struct net_device *dev) |
int | lance_start_xmit (struct sk_buff *skb, struct net_device *dev) |
void | lance_set_multicast (struct net_device *dev) |
void | lance_tx_timeout (struct net_device *dev) |
#define LE_C0_BABL 0x4000 /* Babble: Transmitted too many bits */ |
#define LE_C0_ERR 0x8000 /* Error = BABL | CERR | MISS | MERR */ |
#define LE_C0_INTR |
#define LE_C0_MISS 0x1000 /* Missed Frame (no rx buffer to put it in) */ |
#define LE_C3_ACON |
#define LE_C3_BSWP |
#define LE_CSR1 0x0001 /* IADR[15:0] (bit0==0 ie word aligned) */ |
#define LE_CSR2 0x0002 /* IADR[23:16] (high bits reserved) */ |
#define LE_MO_DAPC 0x0800 /* disable automatic polarity correction */ |
#define LE_MO_DRCVPA 0x2000 /* disable physical address detection */ |
#define LE_MO_EMBA |
#define LE_MO_LRTTSEL 0x0200 /* lower RX threshold / TX mode selection */ |
#define LE_T1_RES 0x20 /* Reserved, LANCE writes this with a zero */ |
#define RX_BUFF_SIZE PKT_BUFF_SIZE |
#define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29) |
#define RX_RING_MOD_MASK (RX_RING_SIZE - 1) |
#define RX_RING_SIZE (1<<LANCE_LOG_RX_BUFFERS) |
#define TX_BUFF_SIZE PKT_BUFF_SIZE |
#define TX_BUFFS_AVAIL |
#define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29) |
#define TX_RING_MOD_MASK (TX_RING_SIZE - 1) |
#define TX_RING_SIZE (1<<LANCE_LOG_TX_BUFFERS) |
int lance_close | ( | struct net_device * | dev | ) |
int lance_open | ( | struct net_device * | dev | ) |
void lance_set_multicast | ( | struct net_device * | dev | ) |
int lance_start_xmit | ( | struct sk_buff * | skb, |
struct net_device * | dev | ||
) |
void lance_tx_timeout | ( | struct net_device * | dev | ) |