Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
ad5421.c
Go to the documentation of this file.
1 /*
2  * AD5421 Digital to analog converters driver
3  *
4  * Copyright 2011 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2.
7  */
8 
9 #include <linux/device.h>
10 #include <linux/delay.h>
11 #include <linux/err.h>
12 #include <linux/module.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/spi/spi.h>
16 #include <linux/slab.h>
17 #include <linux/sysfs.h>
18 
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 #include <linux/iio/events.h>
22 #include <linux/iio/dac/ad5421.h>
23 
24 
25 #define AD5421_REG_DAC_DATA 0x1
26 #define AD5421_REG_CTRL 0x2
27 #define AD5421_REG_OFFSET 0x3
28 #define AD5421_REG_GAIN 0x4
29 /* load dac and fault shared the same register number. Writing to it will cause
30  * a dac load command, reading from it will return the fault status register */
31 #define AD5421_REG_LOAD_DAC 0x5
32 #define AD5421_REG_FAULT 0x5
33 #define AD5421_REG_FORCE_ALARM_CURRENT 0x6
34 #define AD5421_REG_RESET 0x7
35 #define AD5421_REG_START_CONVERSION 0x8
36 #define AD5421_REG_NOOP 0x9
37 
38 #define AD5421_CTRL_WATCHDOG_DISABLE BIT(12)
39 #define AD5421_CTRL_AUTO_FAULT_READBACK BIT(11)
40 #define AD5421_CTRL_MIN_CURRENT BIT(9)
41 #define AD5421_CTRL_ADC_SOURCE_TEMP BIT(8)
42 #define AD5421_CTRL_ADC_ENABLE BIT(7)
43 #define AD5421_CTRL_PWR_DOWN_INT_VREF BIT(6)
44 
45 #define AD5421_FAULT_SPI BIT(15)
46 #define AD5421_FAULT_PEC BIT(14)
47 #define AD5421_FAULT_OVER_CURRENT BIT(13)
48 #define AD5421_FAULT_UNDER_CURRENT BIT(12)
49 #define AD5421_FAULT_TEMP_OVER_140 BIT(11)
50 #define AD5421_FAULT_TEMP_OVER_100 BIT(10)
51 #define AD5421_FAULT_UNDER_VOLTAGE_6V BIT(9)
52 #define AD5421_FAULT_UNDER_VOLTAGE_12V BIT(8)
53 
54 /* These bits will cause the fault pin to go high */
55 #define AD5421_FAULT_TRIGGER_IRQ \
56  (AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
57  AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
58 
67 struct ad5421_state {
68  struct spi_device *spi;
69  unsigned int ctrl;
71  unsigned int fault_mask;
72 
73  /*
74  * DMA (thus cache coherency maintenance) requires the
75  * transfer buffers to live in their own cache lines.
76  */
77  union {
79  u8 d8[4];
81 };
82 
83 static const struct iio_chan_spec ad5421_channels[] = {
84  {
85  .type = IIO_CURRENT,
86  .indexed = 1,
87  .output = 1,
88  .channel = 0,
89  .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
94  .scan_type = IIO_ST('u', 16, 16, 0),
97  },
98  {
99  .type = IIO_TEMP,
100  .channel = -1,
102  },
103 };
104 
105 static int ad5421_write_unlocked(struct iio_dev *indio_dev,
106  unsigned int reg, unsigned int val)
107 {
108  struct ad5421_state *st = iio_priv(indio_dev);
109 
110  st->data[0].d32 = cpu_to_be32((reg << 16) | val);
111 
112  return spi_write(st->spi, &st->data[0].d8[1], 3);
113 }
114 
115 static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
116  unsigned int val)
117 {
118  int ret;
119 
120  mutex_lock(&indio_dev->mlock);
121  ret = ad5421_write_unlocked(indio_dev, reg, val);
122  mutex_unlock(&indio_dev->mlock);
123 
124  return ret;
125 }
126 
127 static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
128 {
129  struct ad5421_state *st = iio_priv(indio_dev);
130  struct spi_message m;
131  int ret;
132  struct spi_transfer t[] = {
133  {
134  .tx_buf = &st->data[0].d8[1],
135  .len = 3,
136  .cs_change = 1,
137  }, {
138  .rx_buf = &st->data[1].d8[1],
139  .len = 3,
140  },
141  };
142 
143  spi_message_init(&m);
144  spi_message_add_tail(&t[0], &m);
145  spi_message_add_tail(&t[1], &m);
146 
147  mutex_lock(&indio_dev->mlock);
148 
149  st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
150 
151  ret = spi_sync(st->spi, &m);
152  if (ret >= 0)
153  ret = be32_to_cpu(st->data[1].d32) & 0xffff;
154 
155  mutex_unlock(&indio_dev->mlock);
156 
157  return ret;
158 }
159 
160 static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
161  unsigned int clr)
162 {
163  struct ad5421_state *st = iio_priv(indio_dev);
164  unsigned int ret;
165 
166  mutex_lock(&indio_dev->mlock);
167 
168  st->ctrl &= ~clr;
169  st->ctrl |= set;
170 
171  ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
172 
173  mutex_unlock(&indio_dev->mlock);
174 
175  return ret;
176 }
177 
178 static irqreturn_t ad5421_fault_handler(int irq, void *data)
179 {
180  struct iio_dev *indio_dev = data;
181  struct ad5421_state *st = iio_priv(indio_dev);
182  unsigned int fault;
183  unsigned int old_fault = 0;
184  unsigned int events;
185 
186  fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
187  if (!fault)
188  return IRQ_NONE;
189 
190  /* If we had a fault, this might mean that the DAC has lost its state
191  * and has been reset. Make sure that the control register actually
192  * contains what we expect it to contain. Otherwise the watchdog might
193  * be enabled and we get watchdog timeout faults, which will render the
194  * DAC unusable. */
195  ad5421_update_ctrl(indio_dev, 0, 0);
196 
197 
198  /* The fault pin stays high as long as a fault condition is present and
199  * it is not possible to mask fault conditions. For certain fault
200  * conditions for example like over-temperature it takes some time
201  * until the fault condition disappears. If we would exit the interrupt
202  * handler immediately after handling the event it would be entered
203  * again instantly. Thus we fall back to polling in case we detect that
204  * a interrupt condition is still present.
205  */
206  do {
207  /* 0xffff is a invalid value for the register and will only be
208  * read if there has been a communication error */
209  if (fault == 0xffff)
210  fault = 0;
211 
212  /* we are only interested in new events */
213  events = (old_fault ^ fault) & fault;
214  events &= st->fault_mask;
215 
216  if (events & AD5421_FAULT_OVER_CURRENT) {
217  iio_push_event(indio_dev,
219  0,
222  iio_get_time_ns());
223  }
224 
225  if (events & AD5421_FAULT_UNDER_CURRENT) {
226  iio_push_event(indio_dev,
228  0,
231  iio_get_time_ns());
232  }
233 
234  if (events & AD5421_FAULT_TEMP_OVER_140) {
235  iio_push_event(indio_dev,
237  0,
240  iio_get_time_ns());
241  }
242 
243  old_fault = fault;
244  fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
245 
246  /* still active? go to sleep for some time */
247  if (fault & AD5421_FAULT_TRIGGER_IRQ)
248  msleep(1000);
249 
250  } while (fault & AD5421_FAULT_TRIGGER_IRQ);
251 
252 
253  return IRQ_HANDLED;
254 }
255 
256 static void ad5421_get_current_min_max(struct ad5421_state *st,
257  unsigned int *min, unsigned int *max)
258 {
259  /* The current range is configured using external pins, which are
260  * usually hard-wired and not run-time switchable. */
261  switch (st->current_range) {
263  *min = 4000;
264  *max = 20000;
265  break;
267  *min = 3800;
268  *max = 21000;
269  break;
271  *min = 3200;
272  *max = 24000;
273  break;
274  default:
275  *min = 0;
276  *max = 1;
277  break;
278  }
279 }
280 
281 static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
282 {
283  unsigned int min, max;
284 
285  ad5421_get_current_min_max(st, &min, &max);
286  return (min * (1 << 16)) / (max - min);
287 }
288 
289 static inline unsigned int ad5421_get_scale(struct ad5421_state *st)
290 {
291  unsigned int min, max;
292 
293  ad5421_get_current_min_max(st, &min, &max);
294  return ((max - min) * 1000) / (1 << 16);
295 }
296 
297 static int ad5421_read_raw(struct iio_dev *indio_dev,
298  struct iio_chan_spec const *chan, int *val, int *val2, long m)
299 {
300  struct ad5421_state *st = iio_priv(indio_dev);
301  int ret;
302 
303  if (chan->type != IIO_CURRENT)
304  return -EINVAL;
305 
306  switch (m) {
307  case IIO_CHAN_INFO_RAW:
308  ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
309  if (ret < 0)
310  return ret;
311  *val = ret;
312  return IIO_VAL_INT;
313  case IIO_CHAN_INFO_SCALE:
314  *val = 0;
315  *val2 = ad5421_get_scale(st);
316  return IIO_VAL_INT_PLUS_MICRO;
318  *val = ad5421_get_offset(st);
319  return IIO_VAL_INT;
321  ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
322  if (ret < 0)
323  return ret;
324  *val = ret - 32768;
325  return IIO_VAL_INT;
327  ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
328  if (ret < 0)
329  return ret;
330  *val = ret;
331  return IIO_VAL_INT;
332  }
333 
334  return -EINVAL;
335 }
336 
337 static int ad5421_write_raw(struct iio_dev *indio_dev,
338  struct iio_chan_spec const *chan, int val, int val2, long mask)
339 {
340  const unsigned int max_val = 1 << 16;
341 
342  switch (mask) {
343  case IIO_CHAN_INFO_RAW:
344  if (val >= max_val || val < 0)
345  return -EINVAL;
346 
347  return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
349  val += 32768;
350  if (val >= max_val || val < 0)
351  return -EINVAL;
352 
353  return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
355  if (val >= max_val || val < 0)
356  return -EINVAL;
357 
358  return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
359  default:
360  break;
361  }
362 
363  return -EINVAL;
364 }
365 
366 static int ad5421_write_event_config(struct iio_dev *indio_dev,
367  u64 event_code, int state)
368 {
369  struct ad5421_state *st = iio_priv(indio_dev);
370  unsigned int mask;
371 
372  switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
373  case IIO_CURRENT:
374  if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
377  else
379  break;
380  case IIO_TEMP:
382  break;
383  default:
384  return -EINVAL;
385  }
386 
387  mutex_lock(&indio_dev->mlock);
388  if (state)
389  st->fault_mask |= mask;
390  else
391  st->fault_mask &= ~mask;
392  mutex_unlock(&indio_dev->mlock);
393 
394  return 0;
395 }
396 
397 static int ad5421_read_event_config(struct iio_dev *indio_dev,
398  u64 event_code)
399 {
400  struct ad5421_state *st = iio_priv(indio_dev);
401  unsigned int mask;
402 
403  switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
404  case IIO_CURRENT:
405  if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
408  else
410  break;
411  case IIO_TEMP:
413  break;
414  default:
415  return -EINVAL;
416  }
417 
418  return (bool)(st->fault_mask & mask);
419 }
420 
421 static int ad5421_read_event_value(struct iio_dev *indio_dev, u64 event_code,
422  int *val)
423 {
424  int ret;
425 
426  switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
427  case IIO_CURRENT:
428  ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
429  if (ret < 0)
430  return ret;
431  *val = ret;
432  break;
433  case IIO_TEMP:
434  *val = 140000;
435  break;
436  default:
437  return -EINVAL;
438  }
439 
440  return 0;
441 }
442 
443 static const struct iio_info ad5421_info = {
444  .read_raw = ad5421_read_raw,
445  .write_raw = ad5421_write_raw,
446  .read_event_config = ad5421_read_event_config,
447  .write_event_config = ad5421_write_event_config,
448  .read_event_value = ad5421_read_event_value,
449  .driver_module = THIS_MODULE,
450 };
451 
452 static int __devinit ad5421_probe(struct spi_device *spi)
453 {
454  struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
455  struct iio_dev *indio_dev;
456  struct ad5421_state *st;
457  int ret;
458 
459  indio_dev = iio_device_alloc(sizeof(*st));
460  if (indio_dev == NULL) {
461  dev_err(&spi->dev, "Failed to allocate iio device\n");
462  return -ENOMEM;
463  }
464 
465  st = iio_priv(indio_dev);
466  spi_set_drvdata(spi, indio_dev);
467 
468  st->spi = spi;
469 
470  indio_dev->dev.parent = &spi->dev;
471  indio_dev->name = "ad5421";
472  indio_dev->info = &ad5421_info;
473  indio_dev->modes = INDIO_DIRECT_MODE;
474  indio_dev->channels = ad5421_channels;
475  indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
476 
479 
480  if (pdata) {
481  st->current_range = pdata->current_range;
482  if (pdata->external_vref)
484  } else {
486  }
487 
488  /* write initial ctrl register value */
489  ad5421_update_ctrl(indio_dev, 0, 0);
490 
491  if (spi->irq) {
492  ret = request_threaded_irq(spi->irq,
493  NULL,
494  ad5421_fault_handler,
496  "ad5421 fault",
497  indio_dev);
498  if (ret)
499  goto error_free;
500  }
501 
502  ret = iio_device_register(indio_dev);
503  if (ret) {
504  dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
505  goto error_free_irq;
506  }
507 
508  return 0;
509 
510 error_free_irq:
511  if (spi->irq)
512  free_irq(spi->irq, indio_dev);
513 error_free:
514  iio_device_free(indio_dev);
515 
516  return ret;
517 }
518 
519 static int __devexit ad5421_remove(struct spi_device *spi)
520 {
521  struct iio_dev *indio_dev = spi_get_drvdata(spi);
522 
523  iio_device_unregister(indio_dev);
524  if (spi->irq)
525  free_irq(spi->irq, indio_dev);
526  iio_device_free(indio_dev);
527 
528  return 0;
529 }
530 
531 static struct spi_driver ad5421_driver = {
532  .driver = {
533  .name = "ad5421",
534  .owner = THIS_MODULE,
535  },
536  .probe = ad5421_probe,
537  .remove = __devexit_p(ad5421_remove),
538 };
539 module_spi_driver(ad5421_driver);
540 
541 MODULE_AUTHOR("Lars-Peter Clausen <[email protected]>");
542 MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
543 MODULE_LICENSE("GPL v2");
544 MODULE_ALIAS("spi:ad5421");