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ahci.h File Reference
#include <linux/clk.h>
#include <linux/libata.h>

Go to the source code of this file.

Data Structures

struct  ahci_cmd_hdr
 
struct  ahci_sg
 
struct  ahci_em_priv
 
struct  ahci_port_priv
 
struct  ahci_host_priv
 

Macros

#define EM_CTRL_MSG_TYPE   0x000f0000
 
#define EM_MSG_LED_HBA_PORT   0x0000000f
 
#define EM_MSG_LED_PMP_SLOT   0x0000ff00
 
#define EM_MSG_LED_VALUE   0xffff0000
 
#define EM_MSG_LED_VALUE_ACTIVITY   0x00070000
 
#define EM_MSG_LED_VALUE_OFF   0xfff80000
 
#define EM_MSG_LED_VALUE_ON   0x00010000
 
#define AHCI_HFLAGS(flags)   .private_data = (void *)(flags)
 
#define AHCI_SHT(drv_name)
 

Enumerations

enum  {
  AHCI_MAX_PORTS = 32, AHCI_MAX_SG = 168, AHCI_DMA_BOUNDARY = 0xffffffff, AHCI_MAX_CMDS = 32,
  AHCI_CMD_SZ = 32, AHCI_CMD_SLOT_SZ = AHCI_MAX_CMDS * AHCI_CMD_SZ, AHCI_RX_FIS_SZ = 256, AHCI_CMD_TBL_CDB = 0x40,
  AHCI_CMD_TBL_HDR_SZ = 0x80, AHCI_CMD_TBL_SZ = AHCI_CMD_TBL_HDR_SZ + (AHCI_MAX_SG * 16), AHCI_CMD_TBL_AR_SZ = AHCI_CMD_TBL_SZ * AHCI_MAX_CMDS, AHCI_PORT_PRIV_DMA_SZ,
  AHCI_PORT_PRIV_FBS_DMA_SZ, AHCI_IRQ_ON_SG = (1 << 31), AHCI_CMD_ATAPI = (1 << 5), AHCI_CMD_WRITE = (1 << 6),
  AHCI_CMD_PREFETCH = (1 << 7), AHCI_CMD_RESET = (1 << 8), AHCI_CMD_CLR_BUSY = (1 << 10), RX_FIS_PIO_SETUP = 0x20,
  RX_FIS_D2H_REG = 0x40, RX_FIS_SDB = 0x58, RX_FIS_UNK = 0x60, HOST_CAP = 0x00,
  HOST_CTL = 0x04, HOST_IRQ_STAT = 0x08, HOST_PORTS_IMPL = 0x0c, HOST_VERSION = 0x10,
  HOST_EM_LOC = 0x1c, HOST_EM_CTL = 0x20, HOST_CAP2 = 0x24, HOST_RESET = (1 << 0),
  HOST_IRQ_EN = (1 << 1), HOST_AHCI_EN = (1 << 31), HOST_CAP_SXS = (1 << 5), HOST_CAP_EMS = (1 << 6),
  HOST_CAP_CCC = (1 << 7), HOST_CAP_PART = (1 << 13), HOST_CAP_SSC = (1 << 14), HOST_CAP_PIO_MULTI = (1 << 15),
  HOST_CAP_FBS = (1 << 16), HOST_CAP_PMP = (1 << 17), HOST_CAP_ONLY = (1 << 18), HOST_CAP_CLO = (1 << 24),
  HOST_CAP_LED = (1 << 25), HOST_CAP_ALPM = (1 << 26), HOST_CAP_SSS = (1 << 27), HOST_CAP_MPS = (1 << 28),
  HOST_CAP_SNTF = (1 << 29), HOST_CAP_NCQ = (1 << 30), HOST_CAP_64 = (1 << 31), HOST_CAP2_BOH = (1 << 0),
  HOST_CAP2_NVMHCI = (1 << 1), HOST_CAP2_APST = (1 << 2), HOST_CAP2_SDS = (1 << 3), HOST_CAP2_SADM = (1 << 4),
  HOST_CAP2_DESO = (1 << 5), PORT_LST_ADDR = 0x00, PORT_LST_ADDR_HI = 0x04, PORT_FIS_ADDR = 0x08,
  PORT_FIS_ADDR_HI = 0x0c, PORT_IRQ_STAT = 0x10, PORT_IRQ_MASK = 0x14, PORT_CMD = 0x18,
  PORT_TFDATA = 0x20, PORT_SIG = 0x24, PORT_CMD_ISSUE = 0x38, PORT_SCR_STAT = 0x28,
  PORT_SCR_CTL = 0x2c, PORT_SCR_ERR = 0x30, PORT_SCR_ACT = 0x34, PORT_SCR_NTF = 0x3c,
  PORT_FBS = 0x40, PORT_DEVSLP = 0x44, PORT_IRQ_COLD_PRES = (1 << 31), PORT_IRQ_TF_ERR = (1 << 30),
  PORT_IRQ_HBUS_ERR = (1 << 29), PORT_IRQ_HBUS_DATA_ERR = (1 << 28), PORT_IRQ_IF_ERR = (1 << 27), PORT_IRQ_IF_NONFATAL = (1 << 26),
  PORT_IRQ_OVERFLOW = (1 << 24), PORT_IRQ_BAD_PMP = (1 << 23), PORT_IRQ_PHYRDY = (1 << 22), PORT_IRQ_DEV_ILCK = (1 << 7),
  PORT_IRQ_CONNECT = (1 << 6), PORT_IRQ_SG_DONE = (1 << 5), PORT_IRQ_UNK_FIS = (1 << 4), PORT_IRQ_SDB_FIS = (1 << 3),
  PORT_IRQ_DMAS_FIS = (1 << 2), PORT_IRQ_PIOS_FIS = (1 << 1), PORT_IRQ_D2H_REG_FIS = (1 << 0), PORT_IRQ_FREEZE,
  PORT_IRQ_ERROR, DEF_PORT_IRQ, PORT_CMD_ASP = (1 << 27), PORT_CMD_ALPE = (1 << 26),
  PORT_CMD_ATAPI = (1 << 24), PORT_CMD_FBSCP = (1 << 22), PORT_CMD_PMP = (1 << 17), PORT_CMD_LIST_ON = (1 << 15),
  PORT_CMD_FIS_ON = (1 << 14), PORT_CMD_FIS_RX = (1 << 4), PORT_CMD_CLO = (1 << 3), PORT_CMD_POWER_ON = (1 << 2),
  PORT_CMD_SPIN_UP = (1 << 1), PORT_CMD_START = (1 << 0), PORT_CMD_ICC_MASK = (0xf << 28), PORT_CMD_ICC_ACTIVE = (0x1 << 28),
  PORT_CMD_ICC_PARTIAL = (0x2 << 28), PORT_CMD_ICC_SLUMBER = (0x6 << 28), PORT_FBS_DWE_OFFSET = 16, PORT_FBS_ADO_OFFSET = 12,
  PORT_FBS_DEV_OFFSET = 8, PORT_FBS_DEV_MASK = (0xf << PORT_FBS_DEV_OFFSET), PORT_FBS_SDE = (1 << 2), PORT_FBS_DEC = (1 << 1),
  PORT_FBS_EN = (1 << 0), PORT_DEVSLP_DM_OFFSET = 25, PORT_DEVSLP_DM_MASK = (0xf << 25), PORT_DEVSLP_DITO_OFFSET = 15,
  PORT_DEVSLP_MDAT_OFFSET = 10, PORT_DEVSLP_DETO_OFFSET = 2, PORT_DEVSLP_DSP = (1 << 1), PORT_DEVSLP_ADSE = (1 << 0),
  AHCI_HFLAG_NO_NCQ = (1 << 0), AHCI_HFLAG_IGN_IRQ_IF_ERR = (1 << 1), AHCI_HFLAG_IGN_SERR_INTERNAL = (1 << 2), AHCI_HFLAG_32BIT_ONLY = (1 << 3),
  AHCI_HFLAG_MV_PATA = (1 << 4), AHCI_HFLAG_NO_MSI = (1 << 5), AHCI_HFLAG_NO_PMP = (1 << 6), AHCI_HFLAG_SECT255 = (1 << 8),
  AHCI_HFLAG_YES_NCQ = (1 << 9), AHCI_HFLAG_NO_SUSPEND = (1 << 10), AHCI_HFLAG_SRST_TOUT_IS_OFFLINE = (1 << 11), AHCI_HFLAG_NO_SNTF = (1 << 12),
  AHCI_HFLAG_NO_FPDMA_AA = (1 << 13), AHCI_HFLAG_YES_FBS = (1 << 14), AHCI_HFLAG_DELAY_ENGINE = (1 << 15), AHCI_FLAG_COMMON,
  ICH_MAP = 0x90, EM_MAX_SLOTS = 8, EM_MAX_RETRY = 5, EM_CTL_RST = (1 << 9),
  EM_CTL_TM = (1 << 8), EM_CTL_MR = (1 << 0), EM_CTL_ALHD = (1 << 26), EM_CTL_XMT = (1 << 25),
  EM_CTL_SMB = (1 << 24), EM_CTL_SGPIO = (1 << 19), EM_CTL_SES = (1 << 18), EM_CTL_SAFTE = (1 << 17),
  EM_CTL_LED = (1 << 16), EM_MSG_TYPE_LED = (1 << 0), EM_MSG_TYPE_SAFTE = (1 << 1), EM_MSG_TYPE_SES2 = (1 << 2),
  EM_MSG_TYPE_SGPIO = (1 << 3)
}
 

Functions

unsigned int ahci_dev_classify (struct ata_port *ap)
 
void ahci_fill_cmd_slot (struct ahci_port_priv *pp, unsigned int tag, u32 opts)
 
void ahci_save_initial_config (struct device *dev, struct ahci_host_priv *hpriv, unsigned int force_port_map, unsigned int mask_port_map)
 
void ahci_init_controller (struct ata_host *host)
 
int ahci_reset_controller (struct ata_host *host)
 
int ahci_do_softreset (struct ata_link *link, unsigned int *class, int pmp, unsigned long deadline, int(*check_ready)(struct ata_link *link))
 
int ahci_stop_engine (struct ata_port *ap)
 
void ahci_start_engine (struct ata_port *ap)
 
int ahci_check_ready (struct ata_link *link)
 
int ahci_kick_engine (struct ata_port *ap)
 
int ahci_port_resume (struct ata_port *ap)
 
void ahci_set_em_messages (struct ahci_host_priv *hpriv, struct ata_port_info *pi)
 
int ahci_reset_em (struct ata_host *host)
 
irqreturn_t ahci_interrupt (int irq, void *dev_instance)
 
void ahci_print_info (struct ata_host *host, const char *scc_s)
 

Variables

int ahci_ignore_sss
 
struct device_attributeahci_shost_attrs []
 
struct device_attributeahci_sdev_attrs []
 
struct ata_port_operations ahci_ops
 
struct ata_port_operations ahci_pmp_retry_srst_ops
 

Macro Definition Documentation

#define AHCI_HFLAGS (   flags)    .private_data = (void *)(flags)

Definition at line 214 of file ahci.h.

#define AHCI_SHT (   drv_name)
Value:
ATA_NCQ_SHT(drv_name), \
.can_queue = AHCI_MAX_CMDS - 1, \
.sg_tablesize = AHCI_MAX_SG, \
.dma_boundary = AHCI_DMA_BOUNDARY, \
.shost_attrs = ahci_shost_attrs, \
.sdev_attrs = ahci_sdev_attrs

Definition at line 328 of file ahci.h.

#define EM_CTRL_MSG_TYPE   0x000f0000

Definition at line 42 of file ahci.h.

#define EM_MSG_LED_HBA_PORT   0x0000000f

Definition at line 45 of file ahci.h.

#define EM_MSG_LED_PMP_SLOT   0x0000ff00

Definition at line 46 of file ahci.h.

#define EM_MSG_LED_VALUE   0xffff0000

Definition at line 47 of file ahci.h.

#define EM_MSG_LED_VALUE_ACTIVITY   0x00070000

Definition at line 48 of file ahci.h.

#define EM_MSG_LED_VALUE_OFF   0xfff80000

Definition at line 49 of file ahci.h.

#define EM_MSG_LED_VALUE_ON   0x00010000

Definition at line 50 of file ahci.h.

Enumeration Type Documentation

anonymous enum
Enumerator:
AHCI_MAX_PORTS 
AHCI_MAX_SG 
AHCI_DMA_BOUNDARY 
AHCI_MAX_CMDS 
AHCI_CMD_SZ 
AHCI_CMD_SLOT_SZ 
AHCI_RX_FIS_SZ 
AHCI_CMD_TBL_CDB 
AHCI_CMD_TBL_HDR_SZ 
AHCI_CMD_TBL_SZ 
AHCI_CMD_TBL_AR_SZ 
AHCI_PORT_PRIV_DMA_SZ 
AHCI_PORT_PRIV_FBS_DMA_SZ 
AHCI_IRQ_ON_SG 
AHCI_CMD_ATAPI 
AHCI_CMD_WRITE 
AHCI_CMD_PREFETCH 
AHCI_CMD_RESET 
AHCI_CMD_CLR_BUSY 
RX_FIS_PIO_SETUP 
RX_FIS_D2H_REG 
RX_FIS_SDB 
RX_FIS_UNK 
HOST_CAP 
HOST_CTL 
HOST_IRQ_STAT 
HOST_PORTS_IMPL 
HOST_VERSION 
HOST_EM_LOC 
HOST_EM_CTL 
HOST_CAP2 
HOST_RESET 
HOST_IRQ_EN 
HOST_AHCI_EN 
HOST_CAP_SXS 
HOST_CAP_EMS 
HOST_CAP_CCC 
HOST_CAP_PART 
HOST_CAP_SSC 
HOST_CAP_PIO_MULTI 
HOST_CAP_FBS 
HOST_CAP_PMP 
HOST_CAP_ONLY 
HOST_CAP_CLO 
HOST_CAP_LED 
HOST_CAP_ALPM 
HOST_CAP_SSS 
HOST_CAP_MPS 
HOST_CAP_SNTF 
HOST_CAP_NCQ 
HOST_CAP_64 
HOST_CAP2_BOH 
HOST_CAP2_NVMHCI 
HOST_CAP2_APST 
HOST_CAP2_SDS 
HOST_CAP2_SADM 
HOST_CAP2_DESO 
PORT_LST_ADDR 
PORT_LST_ADDR_HI 
PORT_FIS_ADDR 
PORT_FIS_ADDR_HI 
PORT_IRQ_STAT 
PORT_IRQ_MASK 
PORT_CMD 
PORT_TFDATA 
PORT_SIG 
PORT_CMD_ISSUE 
PORT_SCR_STAT 
PORT_SCR_CTL 
PORT_SCR_ERR 
PORT_SCR_ACT 
PORT_SCR_NTF 
PORT_FBS 
PORT_DEVSLP 
PORT_IRQ_COLD_PRES 
PORT_IRQ_TF_ERR 
PORT_IRQ_HBUS_ERR 
PORT_IRQ_HBUS_DATA_ERR 
PORT_IRQ_IF_ERR 
PORT_IRQ_IF_NONFATAL 
PORT_IRQ_OVERFLOW 
PORT_IRQ_BAD_PMP 
PORT_IRQ_PHYRDY 
PORT_IRQ_DEV_ILCK 
PORT_IRQ_CONNECT 
PORT_IRQ_SG_DONE 
PORT_IRQ_UNK_FIS 
PORT_IRQ_SDB_FIS 
PORT_IRQ_DMAS_FIS 
PORT_IRQ_PIOS_FIS 
PORT_IRQ_D2H_REG_FIS 
PORT_IRQ_FREEZE 
PORT_IRQ_ERROR 
DEF_PORT_IRQ 
PORT_CMD_ASP 
PORT_CMD_ALPE 
PORT_CMD_ATAPI 
PORT_CMD_FBSCP 
PORT_CMD_PMP 
PORT_CMD_LIST_ON 
PORT_CMD_FIS_ON 
PORT_CMD_FIS_RX 
PORT_CMD_CLO 
PORT_CMD_POWER_ON 
PORT_CMD_SPIN_UP 
PORT_CMD_START 
PORT_CMD_ICC_MASK 
PORT_CMD_ICC_ACTIVE 
PORT_CMD_ICC_PARTIAL 
PORT_CMD_ICC_SLUMBER 
PORT_FBS_DWE_OFFSET 
PORT_FBS_ADO_OFFSET 
PORT_FBS_DEV_OFFSET 
PORT_FBS_DEV_MASK 
PORT_FBS_SDE 
PORT_FBS_DEC 
PORT_FBS_EN 
PORT_DEVSLP_DM_OFFSET 
PORT_DEVSLP_DM_MASK 
PORT_DEVSLP_DITO_OFFSET 
PORT_DEVSLP_MDAT_OFFSET 
PORT_DEVSLP_DETO_OFFSET 
PORT_DEVSLP_DSP 
PORT_DEVSLP_ADSE 
AHCI_HFLAG_NO_NCQ 
AHCI_HFLAG_IGN_IRQ_IF_ERR 
AHCI_HFLAG_IGN_SERR_INTERNAL 
AHCI_HFLAG_32BIT_ONLY 
AHCI_HFLAG_MV_PATA 
AHCI_HFLAG_NO_MSI 
AHCI_HFLAG_NO_PMP 
AHCI_HFLAG_SECT255 
AHCI_HFLAG_YES_NCQ 
AHCI_HFLAG_NO_SUSPEND 
AHCI_HFLAG_SRST_TOUT_IS_OFFLINE 
AHCI_HFLAG_NO_SNTF 
AHCI_HFLAG_NO_FPDMA_AA 
AHCI_HFLAG_YES_FBS 
AHCI_HFLAG_DELAY_ENGINE 
AHCI_FLAG_COMMON 
ICH_MAP 
EM_MAX_SLOTS 
EM_MAX_RETRY 
EM_CTL_RST 
EM_CTL_TM 
EM_CTL_MR 
EM_CTL_ALHD 
EM_CTL_XMT 
EM_CTL_SMB 
EM_CTL_SGPIO 
EM_CTL_SES 
EM_CTL_SAFTE 
EM_CTL_LED 
EM_MSG_TYPE_LED 
EM_MSG_TYPE_SAFTE 
EM_MSG_TYPE_SES2 
EM_MSG_TYPE_SGPIO 

Definition at line 52 of file ahci.h.

Function Documentation

int ahci_check_ready ( struct ata_link link)

Definition at line 1329 of file libahci.c.

unsigned int ahci_dev_classify ( struct ata_port ap)

Definition at line 1158 of file libahci.c.

int ahci_do_softreset ( struct ata_link link,
unsigned int class,
int  pmp,
unsigned long  deadline,
int(*)(struct ata_link *link check_ready 
)

Definition at line 1263 of file libahci.c.

void ahci_fill_cmd_slot ( struct ahci_port_priv pp,
unsigned int  tag,
u32  opts 
)

Definition at line 1174 of file libahci.c.

void ahci_init_controller ( struct ata_host host)

Definition at line 1121 of file libahci.c.

irqreturn_t ahci_interrupt ( int  irq,
void dev_instance 
)

Definition at line 1746 of file libahci.c.

int ahci_kick_engine ( struct ata_port ap)

Definition at line 1188 of file libahci.c.

int ahci_port_resume ( struct ata_port ap)

Definition at line 2094 of file libahci.c.

void ahci_print_info ( struct ata_host host,
const char scc_s 
)

Definition at line 2216 of file libahci.c.

int ahci_reset_controller ( struct ata_host host)

Definition at line 815 of file libahci.c.

int ahci_reset_em ( struct ata_host host)

Definition at line 936 of file libahci.c.

void ahci_save_initial_config ( struct device dev,
struct ahci_host_priv hpriv,
unsigned int  force_port_map,
unsigned int  mask_port_map 
)

ahci_save_initial_config - Save and fixup initial config values : target AHCI device : host private area to store config values : force port map to a specified value : mask out particular bits from port map

Some registers containing configuration info might be setup by BIOS and might be cleared on reset. This function saves the initial values of those registers into such that they can be restored after controller reset.

If inconsistent, config values are fixed up by this function.

LOCKING: None.

Definition at line 399 of file libahci.c.

void ahci_set_em_messages ( struct ahci_host_priv hpriv,
struct ata_port_info pi 
)

Definition at line 2289 of file libahci.c.

void ahci_start_engine ( struct ata_port ap)

Definition at line 567 of file libahci.c.

int ahci_stop_engine ( struct ata_port ap)

Definition at line 580 of file libahci.c.

Variable Documentation

int ahci_ignore_sss

Definition at line 51 of file libahci.c.

Definition at line 148 of file libahci.c.

struct ata_port_operations ahci_pmp_retry_srst_ops

Definition at line 185 of file libahci.c.

struct device_attribute* ahci_sdev_attrs[]

Definition at line 141 of file libahci.c.

struct device_attribute* ahci_shost_attrs[]

Definition at line 127 of file libahci.c.