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aic94xx_dump.c
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1 /*
2  * Aic94xx SAS/SATA driver dump interface.
3  *
4  * Copyright (C) 2004 Adaptec, Inc. All rights reserved.
5  * Copyright (C) 2004 David Chaw <[email protected]>
6  * Copyright (C) 2005 Luben Tuikov <[email protected]>
7  *
8  * This file is licensed under GPLv2.
9  *
10  * This file is part of the aic94xx driver.
11  *
12  * The aic94xx driver is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; version 2 of the
15  * License.
16  *
17  * The aic94xx driver is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20  * General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with the aic94xx driver; if not, write to the Free Software
24  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
25  *
26  * 2005/07/14/LT Complete overhaul of this file. Update pages, register
27  * locations, names, etc. Make use of macros. Print more information.
28  * Print all cseq and lseq mip and mdp.
29  *
30  */
31 
32 #include <linux/pci.h>
33 #include "aic94xx.h"
34 #include "aic94xx_reg.h"
35 #include "aic94xx_reg_def.h"
36 #include "aic94xx_sas.h"
37 
38 #include "aic94xx_dump.h"
39 
40 #ifdef ASD_DEBUG
41 
42 #define MD(x) (1 << (x))
43 #define MODE_COMMON (1 << 31)
44 #define MODE_0_7 (0xFF)
45 
46 static const struct lseq_cio_regs {
47  char *name;
48  u32 offs;
49  u8 width;
50  u32 mode;
51 } LSEQmCIOREGS[] = {
52  {"LmMnSCBPTR", 0x20, 16, MD(0)|MD(1)|MD(2)|MD(3)|MD(4) },
53  {"LmMnDDBPTR", 0x22, 16, MD(0)|MD(1)|MD(2)|MD(3)|MD(4) },
54  {"LmREQMBX", 0x30, 32, MODE_COMMON },
55  {"LmRSPMBX", 0x34, 32, MODE_COMMON },
56  {"LmMnINT", 0x38, 32, MODE_0_7 },
57  {"LmMnINTEN", 0x3C, 32, MODE_0_7 },
58  {"LmXMTPRIMD", 0x40, 32, MODE_COMMON },
59  {"LmXMTPRIMCS", 0x44, 8, MODE_COMMON },
60  {"LmCONSTAT", 0x45, 8, MODE_COMMON },
61  {"LmMnDMAERRS", 0x46, 8, MD(0)|MD(1) },
62  {"LmMnSGDMAERRS", 0x47, 8, MD(0)|MD(1) },
63  {"LmMnEXPHDRP", 0x48, 8, MD(0) },
64  {"LmMnSASAALIGN", 0x48, 8, MD(1) },
65  {"LmMnMSKHDRP", 0x49, 8, MD(0) },
66  {"LmMnSTPALIGN", 0x49, 8, MD(1) },
67  {"LmMnRCVHDRP", 0x4A, 8, MD(0) },
68  {"LmMnXMTHDRP", 0x4A, 8, MD(1) },
69  {"LmALIGNMODE", 0x4B, 8, MD(1) },
70  {"LmMnEXPRCVCNT", 0x4C, 32, MD(0) },
71  {"LmMnXMTCNT", 0x4C, 32, MD(1) },
72  {"LmMnCURRTAG", 0x54, 16, MD(0) },
73  {"LmMnPREVTAG", 0x56, 16, MD(0) },
74  {"LmMnACKOFS", 0x58, 8, MD(1) },
75  {"LmMnXFRLVL", 0x59, 8, MD(0)|MD(1) },
76  {"LmMnSGDMACTL", 0x5A, 8, MD(0)|MD(1) },
77  {"LmMnSGDMASTAT", 0x5B, 8, MD(0)|MD(1) },
78  {"LmMnDDMACTL", 0x5C, 8, MD(0)|MD(1) },
79  {"LmMnDDMASTAT", 0x5D, 8, MD(0)|MD(1) },
80  {"LmMnDDMAMODE", 0x5E, 16, MD(0)|MD(1) },
81  {"LmMnPIPECTL", 0x61, 8, MD(0)|MD(1) },
82  {"LmMnACTSCB", 0x62, 16, MD(0)|MD(1) },
83  {"LmMnSGBHADR", 0x64, 8, MD(0)|MD(1) },
84  {"LmMnSGBADR", 0x65, 8, MD(0)|MD(1) },
85  {"LmMnSGDCNT", 0x66, 8, MD(0)|MD(1) },
86  {"LmMnSGDMADR", 0x68, 32, MD(0)|MD(1) },
87  {"LmMnSGDMADR", 0x6C, 32, MD(0)|MD(1) },
88  {"LmMnXFRCNT", 0x70, 32, MD(0)|MD(1) },
89  {"LmMnXMTCRC", 0x74, 32, MD(1) },
90  {"LmCURRTAG", 0x74, 16, MD(0) },
91  {"LmPREVTAG", 0x76, 16, MD(0) },
92  {"LmMnDPSEL", 0x7B, 8, MD(0)|MD(1) },
93  {"LmDPTHSTAT", 0x7C, 8, MODE_COMMON },
94  {"LmMnHOLDLVL", 0x7D, 8, MD(0) },
95  {"LmMnSATAFS", 0x7E, 8, MD(1) },
96  {"LmMnCMPLTSTAT", 0x7F, 8, MD(0)|MD(1) },
97  {"LmPRMSTAT0", 0x80, 32, MODE_COMMON },
98  {"LmPRMSTAT1", 0x84, 32, MODE_COMMON },
99  {"LmGPRMINT", 0x88, 8, MODE_COMMON },
100  {"LmMnCURRSCB", 0x8A, 16, MD(0) },
101  {"LmPRMICODE", 0x8C, 32, MODE_COMMON },
102  {"LmMnRCVCNT", 0x90, 16, MD(0) },
103  {"LmMnBUFSTAT", 0x92, 16, MD(0) },
104  {"LmMnXMTHDRSIZE",0x92, 8, MD(1) },
105  {"LmMnXMTSIZE", 0x93, 8, MD(1) },
106  {"LmMnTGTXFRCNT", 0x94, 32, MD(0) },
107  {"LmMnEXPROFS", 0x98, 32, MD(0) },
108  {"LmMnXMTROFS", 0x98, 32, MD(1) },
109  {"LmMnRCVROFS", 0x9C, 32, MD(0) },
110  {"LmCONCTL", 0xA0, 16, MODE_COMMON },
111  {"LmBITLTIMER", 0xA2, 16, MODE_COMMON },
112  {"LmWWNLOW", 0xA8, 32, MODE_COMMON },
113  {"LmWWNHIGH", 0xAC, 32, MODE_COMMON },
114  {"LmMnFRMERR", 0xB0, 32, MD(0) },
115  {"LmMnFRMERREN", 0xB4, 32, MD(0) },
116  {"LmAWTIMER", 0xB8, 16, MODE_COMMON },
117  {"LmAWTCTL", 0xBA, 8, MODE_COMMON },
118  {"LmMnHDRCMPS", 0xC0, 32, MD(0) },
119  {"LmMnXMTSTAT", 0xC4, 8, MD(1) },
120  {"LmHWTSTATEN", 0xC5, 8, MODE_COMMON },
121  {"LmMnRRDYRC", 0xC6, 8, MD(0) },
122  {"LmMnRRDYTC", 0xC6, 8, MD(1) },
123  {"LmHWTSTAT", 0xC7, 8, MODE_COMMON },
124  {"LmMnDATABUFADR",0xC8, 16, MD(0)|MD(1) },
125  {"LmDWSSTATUS", 0xCB, 8, MODE_COMMON },
126  {"LmMnACTSTAT", 0xCE, 16, MD(0)|MD(1) },
127  {"LmMnREQSCB", 0xD2, 16, MD(0)|MD(1) },
128  {"LmXXXPRIM", 0xD4, 32, MODE_COMMON },
129  {"LmRCVASTAT", 0xD9, 8, MODE_COMMON },
130  {"LmINTDIS1", 0xDA, 8, MODE_COMMON },
131  {"LmPSTORESEL", 0xDB, 8, MODE_COMMON },
132  {"LmPSTORE", 0xDC, 32, MODE_COMMON },
133  {"LmPRIMSTAT0EN", 0xE0, 32, MODE_COMMON },
134  {"LmPRIMSTAT1EN", 0xE4, 32, MODE_COMMON },
135  {"LmDONETCTL", 0xF2, 16, MODE_COMMON },
136  {NULL, 0, 0, 0 }
137 };
138 /*
139 static struct lseq_cio_regs LSEQmOOBREGS[] = {
140  {"OOB_BFLTR" ,0x100, 8, MD(5)},
141  {"OOB_INIT_MIN" ,0x102,16, MD(5)},
142  {"OOB_INIT_MAX" ,0x104,16, MD(5)},
143  {"OOB_INIT_NEG" ,0x106,16, MD(5)},
144  {"OOB_SAS_MIN" ,0x108,16, MD(5)},
145  {"OOB_SAS_MAX" ,0x10A,16, MD(5)},
146  {"OOB_SAS_NEG" ,0x10C,16, MD(5)},
147  {"OOB_WAKE_MIN" ,0x10E,16, MD(5)},
148  {"OOB_WAKE_MAX" ,0x110,16, MD(5)},
149  {"OOB_WAKE_NEG" ,0x112,16, MD(5)},
150  {"OOB_IDLE_MAX" ,0x114,16, MD(5)},
151  {"OOB_BURST_MAX" ,0x116,16, MD(5)},
152  {"OOB_XMIT_BURST" ,0x118, 8, MD(5)},
153  {"OOB_SEND_PAIRS" ,0x119, 8, MD(5)},
154  {"OOB_INIT_IDLE" ,0x11A, 8, MD(5)},
155  {"OOB_INIT_NEGO" ,0x11C, 8, MD(5)},
156  {"OOB_SAS_IDLE" ,0x11E, 8, MD(5)},
157  {"OOB_SAS_NEGO" ,0x120, 8, MD(5)},
158  {"OOB_WAKE_IDLE" ,0x122, 8, MD(5)},
159  {"OOB_WAKE_NEGO" ,0x124, 8, MD(5)},
160  {"OOB_DATA_KBITS" ,0x126, 8, MD(5)},
161  {"OOB_BURST_DATA" ,0x128,32, MD(5)},
162  {"OOB_ALIGN_0_DATA" ,0x12C,32, MD(5)},
163  {"OOB_ALIGN_1_DATA" ,0x130,32, MD(5)},
164  {"OOB_SYNC_DATA" ,0x134,32, MD(5)},
165  {"OOB_D10_2_DATA" ,0x138,32, MD(5)},
166  {"OOB_PHY_RST_CNT" ,0x13C,32, MD(5)},
167  {"OOB_SIG_GEN" ,0x140, 8, MD(5)},
168  {"OOB_XMIT" ,0x141, 8, MD(5)},
169  {"FUNCTION_MAKS" ,0x142, 8, MD(5)},
170  {"OOB_MODE" ,0x143, 8, MD(5)},
171  {"CURRENT_STATUS" ,0x144, 8, MD(5)},
172  {"SPEED_MASK" ,0x145, 8, MD(5)},
173  {"PRIM_COUNT" ,0x146, 8, MD(5)},
174  {"OOB_SIGNALS" ,0x148, 8, MD(5)},
175  {"OOB_DATA_DET" ,0x149, 8, MD(5)},
176  {"OOB_TIME_OUT" ,0x14C, 8, MD(5)},
177  {"OOB_TIMER_ENABLE" ,0x14D, 8, MD(5)},
178  {"OOB_STATUS" ,0x14E, 8, MD(5)},
179  {"HOT_PLUG_DELAY" ,0x150, 8, MD(5)},
180  {"RCD_DELAY" ,0x151, 8, MD(5)},
181  {"COMSAS_TIMER" ,0x152, 8, MD(5)},
182  {"SNTT_DELAY" ,0x153, 8, MD(5)},
183  {"SPD_CHNG_DELAY" ,0x154, 8, MD(5)},
184  {"SNLT_DELAY" ,0x155, 8, MD(5)},
185  {"SNWT_DELAY" ,0x156, 8, MD(5)},
186  {"ALIGN_DELAY" ,0x157, 8, MD(5)},
187  {"INT_ENABLE_0" ,0x158, 8, MD(5)},
188  {"INT_ENABLE_1" ,0x159, 8, MD(5)},
189  {"INT_ENABLE_2" ,0x15A, 8, MD(5)},
190  {"INT_ENABLE_3" ,0x15B, 8, MD(5)},
191  {"OOB_TEST_REG" ,0x15C, 8, MD(5)},
192  {"PHY_CONTROL_0" ,0x160, 8, MD(5)},
193  {"PHY_CONTROL_1" ,0x161, 8, MD(5)},
194  {"PHY_CONTROL_2" ,0x162, 8, MD(5)},
195  {"PHY_CONTROL_3" ,0x163, 8, MD(5)},
196  {"PHY_OOB_CAL_TX" ,0x164, 8, MD(5)},
197  {"PHY_OOB_CAL_RX" ,0x165, 8, MD(5)},
198  {"OOB_PHY_CAL_TX" ,0x166, 8, MD(5)},
199  {"OOB_PHY_CAL_RX" ,0x167, 8, MD(5)},
200  {"PHY_CONTROL_4" ,0x168, 8, MD(5)},
201  {"PHY_TEST" ,0x169, 8, MD(5)},
202  {"PHY_PWR_CTL" ,0x16A, 8, MD(5)},
203  {"PHY_PWR_DELAY" ,0x16B, 8, MD(5)},
204  {"OOB_SM_CON" ,0x16C, 8, MD(5)},
205  {"ADDR_TRAP_1" ,0x16D, 8, MD(5)},
206  {"ADDR_NEXT_1" ,0x16E, 8, MD(5)},
207  {"NEXT_ST_1" ,0x16F, 8, MD(5)},
208  {"OOB_SM_STATE" ,0x170, 8, MD(5)},
209  {"ADDR_TRAP_2" ,0x171, 8, MD(5)},
210  {"ADDR_NEXT_2" ,0x172, 8, MD(5)},
211  {"NEXT_ST_2" ,0x173, 8, MD(5)},
212  {NULL, 0, 0, 0 }
213 };
214 */
215 #define STR_8BIT " %30s[0x%04x]:0x%02x\n"
216 #define STR_16BIT " %30s[0x%04x]:0x%04x\n"
217 #define STR_32BIT " %30s[0x%04x]:0x%08x\n"
218 #define STR_64BIT " %30s[0x%04x]:0x%llx\n"
219 
220 #define PRINT_REG_8bit(_ha, _n, _r) asd_printk(STR_8BIT, #_n, _n, \
221  asd_read_reg_byte(_ha, _r))
222 #define PRINT_REG_16bit(_ha, _n, _r) asd_printk(STR_16BIT, #_n, _n, \
223  asd_read_reg_word(_ha, _r))
224 #define PRINT_REG_32bit(_ha, _n, _r) asd_printk(STR_32BIT, #_n, _n, \
225  asd_read_reg_dword(_ha, _r))
226 
227 #define PRINT_CREG_8bit(_ha, _n) asd_printk(STR_8BIT, #_n, _n, \
228  asd_read_reg_byte(_ha, C##_n))
229 #define PRINT_CREG_16bit(_ha, _n) asd_printk(STR_16BIT, #_n, _n, \
230  asd_read_reg_word(_ha, C##_n))
231 #define PRINT_CREG_32bit(_ha, _n) asd_printk(STR_32BIT, #_n, _n, \
232  asd_read_reg_dword(_ha, C##_n))
233 
234 #define MSTR_8BIT " Mode:%02d %30s[0x%04x]:0x%02x\n"
235 #define MSTR_16BIT " Mode:%02d %30s[0x%04x]:0x%04x\n"
236 #define MSTR_32BIT " Mode:%02d %30s[0x%04x]:0x%08x\n"
237 
238 #define PRINT_MREG_8bit(_ha, _m, _n, _r) asd_printk(MSTR_8BIT, _m, #_n, _n, \
239  asd_read_reg_byte(_ha, _r))
240 #define PRINT_MREG_16bit(_ha, _m, _n, _r) asd_printk(MSTR_16BIT, _m, #_n, _n, \
241  asd_read_reg_word(_ha, _r))
242 #define PRINT_MREG_32bit(_ha, _m, _n, _r) asd_printk(MSTR_32BIT, _m, #_n, _n, \
243  asd_read_reg_dword(_ha, _r))
244 
245 /* can also be used for MD when the register is mode aware already */
246 #define PRINT_MIS_byte(_ha, _n) asd_printk(STR_8BIT, #_n,CSEQ_##_n-CMAPPEDSCR,\
247  asd_read_reg_byte(_ha, CSEQ_##_n))
248 #define PRINT_MIS_word(_ha, _n) asd_printk(STR_16BIT,#_n,CSEQ_##_n-CMAPPEDSCR,\
249  asd_read_reg_word(_ha, CSEQ_##_n))
250 #define PRINT_MIS_dword(_ha, _n) \
251  asd_printk(STR_32BIT,#_n,CSEQ_##_n-CMAPPEDSCR,\
252  asd_read_reg_dword(_ha, CSEQ_##_n))
253 #define PRINT_MIS_qword(_ha, _n) \
254  asd_printk(STR_64BIT, #_n,CSEQ_##_n-CMAPPEDSCR, \
255  (unsigned long long)(((u64)asd_read_reg_dword(_ha, CSEQ_##_n)) \
256  | (((u64)asd_read_reg_dword(_ha, (CSEQ_##_n)+4))<<32)))
257 
258 #define CMDP_REG(_n, _m) (_m*(CSEQ_PAGE_SIZE*2)+CSEQ_##_n)
259 #define PRINT_CMDP_word(_ha, _n) \
260 asd_printk("%20s 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n", \
261  #_n, \
262  asd_read_reg_word(_ha, CMDP_REG(_n, 0)), \
263  asd_read_reg_word(_ha, CMDP_REG(_n, 1)), \
264  asd_read_reg_word(_ha, CMDP_REG(_n, 2)), \
265  asd_read_reg_word(_ha, CMDP_REG(_n, 3)), \
266  asd_read_reg_word(_ha, CMDP_REG(_n, 4)), \
267  asd_read_reg_word(_ha, CMDP_REG(_n, 5)), \
268  asd_read_reg_word(_ha, CMDP_REG(_n, 6)), \
269  asd_read_reg_word(_ha, CMDP_REG(_n, 7)))
270 
271 #define PRINT_CMDP_byte(_ha, _n) \
272 asd_printk("%20s 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n", \
273  #_n, \
274  asd_read_reg_byte(_ha, CMDP_REG(_n, 0)), \
275  asd_read_reg_byte(_ha, CMDP_REG(_n, 1)), \
276  asd_read_reg_byte(_ha, CMDP_REG(_n, 2)), \
277  asd_read_reg_byte(_ha, CMDP_REG(_n, 3)), \
278  asd_read_reg_byte(_ha, CMDP_REG(_n, 4)), \
279  asd_read_reg_byte(_ha, CMDP_REG(_n, 5)), \
280  asd_read_reg_byte(_ha, CMDP_REG(_n, 6)), \
281  asd_read_reg_byte(_ha, CMDP_REG(_n, 7)))
282 
283 static void asd_dump_cseq_state(struct asd_ha_struct *asd_ha)
284 {
285  int mode;
286 
287  asd_printk("CSEQ STATE\n");
288 
289  asd_printk("ARP2 REGISTERS\n");
290 
291  PRINT_CREG_32bit(asd_ha, ARP2CTL);
292  PRINT_CREG_32bit(asd_ha, ARP2INT);
293  PRINT_CREG_32bit(asd_ha, ARP2INTEN);
294  PRINT_CREG_8bit(asd_ha, MODEPTR);
295  PRINT_CREG_8bit(asd_ha, ALTMODE);
296  PRINT_CREG_8bit(asd_ha, FLAG);
297  PRINT_CREG_8bit(asd_ha, ARP2INTCTL);
298  PRINT_CREG_16bit(asd_ha, STACK);
299  PRINT_CREG_16bit(asd_ha, PRGMCNT);
300  PRINT_CREG_16bit(asd_ha, ACCUM);
301  PRINT_CREG_16bit(asd_ha, SINDEX);
302  PRINT_CREG_16bit(asd_ha, DINDEX);
303  PRINT_CREG_8bit(asd_ha, SINDIR);
304  PRINT_CREG_8bit(asd_ha, DINDIR);
305  PRINT_CREG_8bit(asd_ha, JUMLDIR);
306  PRINT_CREG_8bit(asd_ha, ARP2HALTCODE);
307  PRINT_CREG_16bit(asd_ha, CURRADDR);
308  PRINT_CREG_16bit(asd_ha, LASTADDR);
309  PRINT_CREG_16bit(asd_ha, NXTLADDR);
310 
311  asd_printk("IOP REGISTERS\n");
312 
313  PRINT_REG_32bit(asd_ha, BISTCTL1, CBISTCTL);
314  PRINT_CREG_32bit(asd_ha, MAPPEDSCR);
315 
316  asd_printk("CIO REGISTERS\n");
317 
318  for (mode = 0; mode < 9; mode++)
319  PRINT_MREG_16bit(asd_ha, mode, MnSCBPTR, CMnSCBPTR(mode));
320  PRINT_MREG_16bit(asd_ha, 15, MnSCBPTR, CMnSCBPTR(15));
321 
322  for (mode = 0; mode < 9; mode++)
323  PRINT_MREG_16bit(asd_ha, mode, MnDDBPTR, CMnDDBPTR(mode));
324  PRINT_MREG_16bit(asd_ha, 15, MnDDBPTR, CMnDDBPTR(15));
325 
326  for (mode = 0; mode < 8; mode++)
327  PRINT_MREG_32bit(asd_ha, mode, MnREQMBX, CMnREQMBX(mode));
328  for (mode = 0; mode < 8; mode++)
329  PRINT_MREG_32bit(asd_ha, mode, MnRSPMBX, CMnRSPMBX(mode));
330  for (mode = 0; mode < 8; mode++)
331  PRINT_MREG_32bit(asd_ha, mode, MnINT, CMnINT(mode));
332  for (mode = 0; mode < 8; mode++)
333  PRINT_MREG_32bit(asd_ha, mode, MnINTEN, CMnINTEN(mode));
334 
335  PRINT_CREG_8bit(asd_ha, SCRATCHPAGE);
336  for (mode = 0; mode < 8; mode++)
337  PRINT_MREG_8bit(asd_ha, mode, MnSCRATCHPAGE,
338  CMnSCRATCHPAGE(mode));
339 
340  PRINT_REG_32bit(asd_ha, CLINKCON, CLINKCON);
341  PRINT_REG_8bit(asd_ha, CCONMSK, CCONMSK);
342  PRINT_REG_8bit(asd_ha, CCONEXIST, CCONEXIST);
343  PRINT_REG_16bit(asd_ha, CCONMODE, CCONMODE);
344  PRINT_REG_32bit(asd_ha, CTIMERCALC, CTIMERCALC);
345  PRINT_REG_8bit(asd_ha, CINTDIS, CINTDIS);
346 
347  asd_printk("SCRATCH MEMORY\n");
348 
349  asd_printk("MIP 4 >>>>>\n");
350  PRINT_MIS_word(asd_ha, Q_EXE_HEAD);
351  PRINT_MIS_word(asd_ha, Q_EXE_TAIL);
352  PRINT_MIS_word(asd_ha, Q_DONE_HEAD);
353  PRINT_MIS_word(asd_ha, Q_DONE_TAIL);
354  PRINT_MIS_word(asd_ha, Q_SEND_HEAD);
355  PRINT_MIS_word(asd_ha, Q_SEND_TAIL);
356  PRINT_MIS_word(asd_ha, Q_DMA2CHIM_HEAD);
357  PRINT_MIS_word(asd_ha, Q_DMA2CHIM_TAIL);
358  PRINT_MIS_word(asd_ha, Q_COPY_HEAD);
359  PRINT_MIS_word(asd_ha, Q_COPY_TAIL);
360  PRINT_MIS_word(asd_ha, REG0);
361  PRINT_MIS_word(asd_ha, REG1);
362  PRINT_MIS_dword(asd_ha, REG2);
363  PRINT_MIS_byte(asd_ha, LINK_CTL_Q_MAP);
364  PRINT_MIS_byte(asd_ha, MAX_CSEQ_MODE);
365  PRINT_MIS_byte(asd_ha, FREE_LIST_HACK_COUNT);
366 
367  asd_printk("MIP 5 >>>>\n");
368  PRINT_MIS_qword(asd_ha, EST_NEXUS_REQ_QUEUE);
369  PRINT_MIS_qword(asd_ha, EST_NEXUS_REQ_COUNT);
370  PRINT_MIS_word(asd_ha, Q_EST_NEXUS_HEAD);
371  PRINT_MIS_word(asd_ha, Q_EST_NEXUS_TAIL);
372  PRINT_MIS_word(asd_ha, NEED_EST_NEXUS_SCB);
373  PRINT_MIS_byte(asd_ha, EST_NEXUS_REQ_HEAD);
374  PRINT_MIS_byte(asd_ha, EST_NEXUS_REQ_TAIL);
375  PRINT_MIS_byte(asd_ha, EST_NEXUS_SCB_OFFSET);
376 
377  asd_printk("MIP 6 >>>>\n");
378  PRINT_MIS_word(asd_ha, INT_ROUT_RET_ADDR0);
379  PRINT_MIS_word(asd_ha, INT_ROUT_RET_ADDR1);
380  PRINT_MIS_word(asd_ha, INT_ROUT_SCBPTR);
381  PRINT_MIS_byte(asd_ha, INT_ROUT_MODE);
382  PRINT_MIS_byte(asd_ha, ISR_SCRATCH_FLAGS);
383  PRINT_MIS_word(asd_ha, ISR_SAVE_SINDEX);
384  PRINT_MIS_word(asd_ha, ISR_SAVE_DINDEX);
385  PRINT_MIS_word(asd_ha, Q_MONIRTT_HEAD);
386  PRINT_MIS_word(asd_ha, Q_MONIRTT_TAIL);
387  PRINT_MIS_byte(asd_ha, FREE_SCB_MASK);
388  PRINT_MIS_word(asd_ha, BUILTIN_FREE_SCB_HEAD);
389  PRINT_MIS_word(asd_ha, BUILTIN_FREE_SCB_TAIL);
390  PRINT_MIS_word(asd_ha, EXTENDED_FREE_SCB_HEAD);
391  PRINT_MIS_word(asd_ha, EXTENDED_FREE_SCB_TAIL);
392 
393  asd_printk("MIP 7 >>>>\n");
394  PRINT_MIS_qword(asd_ha, EMPTY_REQ_QUEUE);
395  PRINT_MIS_qword(asd_ha, EMPTY_REQ_COUNT);
396  PRINT_MIS_word(asd_ha, Q_EMPTY_HEAD);
397  PRINT_MIS_word(asd_ha, Q_EMPTY_TAIL);
398  PRINT_MIS_word(asd_ha, NEED_EMPTY_SCB);
399  PRINT_MIS_byte(asd_ha, EMPTY_REQ_HEAD);
400  PRINT_MIS_byte(asd_ha, EMPTY_REQ_TAIL);
401  PRINT_MIS_byte(asd_ha, EMPTY_SCB_OFFSET);
402  PRINT_MIS_word(asd_ha, PRIMITIVE_DATA);
403  PRINT_MIS_dword(asd_ha, TIMEOUT_CONST);
404 
405  asd_printk("MDP 0 >>>>\n");
406  asd_printk("%-20s %6s %6s %6s %6s %6s %6s %6s %6s\n",
407  "Mode: ", "0", "1", "2", "3", "4", "5", "6", "7");
408  PRINT_CMDP_word(asd_ha, LRM_SAVE_SINDEX);
409  PRINT_CMDP_word(asd_ha, LRM_SAVE_SCBPTR);
410  PRINT_CMDP_word(asd_ha, Q_LINK_HEAD);
411  PRINT_CMDP_word(asd_ha, Q_LINK_TAIL);
412  PRINT_CMDP_byte(asd_ha, LRM_SAVE_SCRPAGE);
413 
414  asd_printk("MDP 0 Mode 8 >>>>\n");
415  PRINT_MIS_word(asd_ha, RET_ADDR);
416  PRINT_MIS_word(asd_ha, RET_SCBPTR);
417  PRINT_MIS_word(asd_ha, SAVE_SCBPTR);
418  PRINT_MIS_word(asd_ha, EMPTY_TRANS_CTX);
419  PRINT_MIS_word(asd_ha, RESP_LEN);
420  PRINT_MIS_word(asd_ha, TMF_SCBPTR);
421  PRINT_MIS_word(asd_ha, GLOBAL_PREV_SCB);
422  PRINT_MIS_word(asd_ha, GLOBAL_HEAD);
423  PRINT_MIS_word(asd_ha, CLEAR_LU_HEAD);
424  PRINT_MIS_byte(asd_ha, TMF_OPCODE);
425  PRINT_MIS_byte(asd_ha, SCRATCH_FLAGS);
426  PRINT_MIS_word(asd_ha, HSB_SITE);
427  PRINT_MIS_word(asd_ha, FIRST_INV_SCB_SITE);
428  PRINT_MIS_word(asd_ha, FIRST_INV_DDB_SITE);
429 
430  asd_printk("MDP 1 Mode 8 >>>>\n");
431  PRINT_MIS_qword(asd_ha, LUN_TO_CLEAR);
432  PRINT_MIS_qword(asd_ha, LUN_TO_CHECK);
433 
434  asd_printk("MDP 2 Mode 8 >>>>\n");
435  PRINT_MIS_qword(asd_ha, HQ_NEW_POINTER);
436  PRINT_MIS_qword(asd_ha, HQ_DONE_BASE);
437  PRINT_MIS_dword(asd_ha, HQ_DONE_POINTER);
438  PRINT_MIS_byte(asd_ha, HQ_DONE_PASS);
439 }
440 
441 #define PRINT_LREG_8bit(_h, _lseq, _n) \
442  asd_printk(STR_8BIT, #_n, _n, asd_read_reg_byte(_h, Lm##_n(_lseq)))
443 #define PRINT_LREG_16bit(_h, _lseq, _n) \
444  asd_printk(STR_16BIT, #_n, _n, asd_read_reg_word(_h, Lm##_n(_lseq)))
445 #define PRINT_LREG_32bit(_h, _lseq, _n) \
446  asd_printk(STR_32BIT, #_n, _n, asd_read_reg_dword(_h, Lm##_n(_lseq)))
447 
448 #define PRINT_LMIP_byte(_h, _lseq, _n) \
449  asd_printk(STR_8BIT, #_n, LmSEQ_##_n(_lseq)-LmSCRATCH(_lseq), \
450  asd_read_reg_byte(_h, LmSEQ_##_n(_lseq)))
451 #define PRINT_LMIP_word(_h, _lseq, _n) \
452  asd_printk(STR_16BIT, #_n, LmSEQ_##_n(_lseq)-LmSCRATCH(_lseq), \
453  asd_read_reg_word(_h, LmSEQ_##_n(_lseq)))
454 #define PRINT_LMIP_dword(_h, _lseq, _n) \
455  asd_printk(STR_32BIT, #_n, LmSEQ_##_n(_lseq)-LmSCRATCH(_lseq), \
456  asd_read_reg_dword(_h, LmSEQ_##_n(_lseq)))
457 #define PRINT_LMIP_qword(_h, _lseq, _n) \
458  asd_printk(STR_64BIT, #_n, LmSEQ_##_n(_lseq)-LmSCRATCH(_lseq), \
459  (unsigned long long)(((unsigned long long) \
460  asd_read_reg_dword(_h, LmSEQ_##_n(_lseq))) \
461  | (((unsigned long long) \
462  asd_read_reg_dword(_h, LmSEQ_##_n(_lseq)+4))<<32)))
463 
464 static void asd_print_lseq_cio_reg(struct asd_ha_struct *asd_ha,
465  u32 lseq_cio_addr, int i)
466 {
467  switch (LSEQmCIOREGS[i].width) {
468  case 8:
469  asd_printk("%20s[0x%x]: 0x%02x\n", LSEQmCIOREGS[i].name,
470  LSEQmCIOREGS[i].offs,
471  asd_read_reg_byte(asd_ha, lseq_cio_addr +
472  LSEQmCIOREGS[i].offs));
473 
474  break;
475  case 16:
476  asd_printk("%20s[0x%x]: 0x%04x\n", LSEQmCIOREGS[i].name,
477  LSEQmCIOREGS[i].offs,
478  asd_read_reg_word(asd_ha, lseq_cio_addr +
479  LSEQmCIOREGS[i].offs));
480 
481  break;
482  case 32:
483  asd_printk("%20s[0x%x]: 0x%08x\n", LSEQmCIOREGS[i].name,
484  LSEQmCIOREGS[i].offs,
485  asd_read_reg_dword(asd_ha, lseq_cio_addr +
486  LSEQmCIOREGS[i].offs));
487  break;
488  }
489 }
490 
491 static void asd_dump_lseq_state(struct asd_ha_struct *asd_ha, int lseq)
492 {
493  u32 moffs;
494  int mode;
495 
496  asd_printk("LSEQ %d STATE\n", lseq);
497 
498  asd_printk("LSEQ%d: ARP2 REGISTERS\n", lseq);
499  PRINT_LREG_32bit(asd_ha, lseq, ARP2CTL);
500  PRINT_LREG_32bit(asd_ha, lseq, ARP2INT);
501  PRINT_LREG_32bit(asd_ha, lseq, ARP2INTEN);
502  PRINT_LREG_8bit(asd_ha, lseq, MODEPTR);
503  PRINT_LREG_8bit(asd_ha, lseq, ALTMODE);
504  PRINT_LREG_8bit(asd_ha, lseq, FLAG);
505  PRINT_LREG_8bit(asd_ha, lseq, ARP2INTCTL);
506  PRINT_LREG_16bit(asd_ha, lseq, STACK);
507  PRINT_LREG_16bit(asd_ha, lseq, PRGMCNT);
508  PRINT_LREG_16bit(asd_ha, lseq, ACCUM);
509  PRINT_LREG_16bit(asd_ha, lseq, SINDEX);
510  PRINT_LREG_16bit(asd_ha, lseq, DINDEX);
511  PRINT_LREG_8bit(asd_ha, lseq, SINDIR);
512  PRINT_LREG_8bit(asd_ha, lseq, DINDIR);
513  PRINT_LREG_8bit(asd_ha, lseq, JUMLDIR);
514  PRINT_LREG_8bit(asd_ha, lseq, ARP2HALTCODE);
515  PRINT_LREG_16bit(asd_ha, lseq, CURRADDR);
516  PRINT_LREG_16bit(asd_ha, lseq, LASTADDR);
517  PRINT_LREG_16bit(asd_ha, lseq, NXTLADDR);
518 
519  asd_printk("LSEQ%d: IOP REGISTERS\n", lseq);
520 
521  PRINT_LREG_32bit(asd_ha, lseq, MODECTL);
522  PRINT_LREG_32bit(asd_ha, lseq, DBGMODE);
523  PRINT_LREG_32bit(asd_ha, lseq, CONTROL);
524  PRINT_REG_32bit(asd_ha, BISTCTL0, LmBISTCTL0(lseq));
525  PRINT_REG_32bit(asd_ha, BISTCTL1, LmBISTCTL1(lseq));
526 
527  asd_printk("LSEQ%d: CIO REGISTERS\n", lseq);
528  asd_printk("Mode common:\n");
529 
530  for (mode = 0; mode < 8; mode++) {
531  u32 lseq_cio_addr = LmSEQ_PHY_BASE(mode, lseq);
532  int i;
533 
534  for (i = 0; LSEQmCIOREGS[i].name; i++)
535  if (LSEQmCIOREGS[i].mode == MODE_COMMON)
536  asd_print_lseq_cio_reg(asd_ha,lseq_cio_addr,i);
537  }
538 
539  asd_printk("Mode unique:\n");
540  for (mode = 0; mode < 8; mode++) {
541  u32 lseq_cio_addr = LmSEQ_PHY_BASE(mode, lseq);
542  int i;
543 
544  asd_printk("Mode %d\n", mode);
545  for (i = 0; LSEQmCIOREGS[i].name; i++) {
546  if (!(LSEQmCIOREGS[i].mode & (1 << mode)))
547  continue;
548  asd_print_lseq_cio_reg(asd_ha, lseq_cio_addr, i);
549  }
550  }
551 
552  asd_printk("SCRATCH MEMORY\n");
553 
554  asd_printk("LSEQ%d MIP 0 >>>>\n", lseq);
555  PRINT_LMIP_word(asd_ha, lseq, Q_TGTXFR_HEAD);
556  PRINT_LMIP_word(asd_ha, lseq, Q_TGTXFR_TAIL);
557  PRINT_LMIP_byte(asd_ha, lseq, LINK_NUMBER);
558  PRINT_LMIP_byte(asd_ha, lseq, SCRATCH_FLAGS);
559  PRINT_LMIP_dword(asd_ha, lseq, CONNECTION_STATE);
560  PRINT_LMIP_word(asd_ha, lseq, CONCTL);
561  PRINT_LMIP_byte(asd_ha, lseq, CONSTAT);
562  PRINT_LMIP_byte(asd_ha, lseq, CONNECTION_MODES);
563  PRINT_LMIP_word(asd_ha, lseq, REG1_ISR);
564  PRINT_LMIP_word(asd_ha, lseq, REG2_ISR);
565  PRINT_LMIP_word(asd_ha, lseq, REG3_ISR);
566  PRINT_LMIP_qword(asd_ha, lseq,REG0_ISR);
567 
568  asd_printk("LSEQ%d MIP 1 >>>>\n", lseq);
569  PRINT_LMIP_word(asd_ha, lseq, EST_NEXUS_SCBPTR0);
570  PRINT_LMIP_word(asd_ha, lseq, EST_NEXUS_SCBPTR1);
571  PRINT_LMIP_word(asd_ha, lseq, EST_NEXUS_SCBPTR2);
572  PRINT_LMIP_word(asd_ha, lseq, EST_NEXUS_SCBPTR3);
573  PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_OPCODE0);
574  PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_OPCODE1);
575  PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_OPCODE2);
576  PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_OPCODE3);
577  PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_HEAD);
578  PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_TAIL);
579  PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_BUF_AVAIL);
580  PRINT_LMIP_dword(asd_ha, lseq, TIMEOUT_CONST);
581  PRINT_LMIP_word(asd_ha, lseq, ISR_SAVE_SINDEX);
582  PRINT_LMIP_word(asd_ha, lseq, ISR_SAVE_DINDEX);
583 
584  asd_printk("LSEQ%d MIP 2 >>>>\n", lseq);
585  PRINT_LMIP_word(asd_ha, lseq, EMPTY_SCB_PTR0);
586  PRINT_LMIP_word(asd_ha, lseq, EMPTY_SCB_PTR1);
587  PRINT_LMIP_word(asd_ha, lseq, EMPTY_SCB_PTR2);
588  PRINT_LMIP_word(asd_ha, lseq, EMPTY_SCB_PTR3);
589  PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_OPCD0);
590  PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_OPCD1);
591  PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_OPCD2);
592  PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_OPCD3);
593  PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_HEAD);
594  PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_TAIL);
595  PRINT_LMIP_byte(asd_ha, lseq, EMPTY_BUFS_AVAIL);
596 
597  asd_printk("LSEQ%d MIP 3 >>>>\n", lseq);
598  PRINT_LMIP_dword(asd_ha, lseq, DEV_PRES_TMR_TOUT_CONST);
599  PRINT_LMIP_dword(asd_ha, lseq, SATA_INTERLOCK_TIMEOUT);
600  PRINT_LMIP_dword(asd_ha, lseq, SRST_ASSERT_TIMEOUT);
601  PRINT_LMIP_dword(asd_ha, lseq, RCV_FIS_TIMEOUT);
602  PRINT_LMIP_dword(asd_ha, lseq, ONE_MILLISEC_TIMEOUT);
603  PRINT_LMIP_dword(asd_ha, lseq, TEN_MS_COMINIT_TIMEOUT);
604  PRINT_LMIP_dword(asd_ha, lseq, SMP_RCV_TIMEOUT);
605 
606  for (mode = 0; mode < 3; mode++) {
607  asd_printk("LSEQ%d MDP 0 MODE %d >>>>\n", lseq, mode);
608  moffs = mode * LSEQ_MODE_SCRATCH_SIZE;
609 
610  asd_printk(STR_16BIT, "RET_ADDR", 0,
611  asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR(lseq)
612  + moffs));
613  asd_printk(STR_16BIT, "REG0_MODE", 2,
614  asd_read_reg_word(asd_ha, LmSEQ_REG0_MODE(lseq)
615  + moffs));
616  asd_printk(STR_16BIT, "MODE_FLAGS", 4,
617  asd_read_reg_word(asd_ha, LmSEQ_MODE_FLAGS(lseq)
618  + moffs));
619  asd_printk(STR_16BIT, "RET_ADDR2", 0x6,
620  asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR2(lseq)
621  + moffs));
622  asd_printk(STR_16BIT, "RET_ADDR1", 0x8,
623  asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR1(lseq)
624  + moffs));
625  asd_printk(STR_8BIT, "OPCODE_TO_CSEQ", 0xB,
626  asd_read_reg_byte(asd_ha, LmSEQ_OPCODE_TO_CSEQ(lseq)
627  + moffs));
628  asd_printk(STR_16BIT, "DATA_TO_CSEQ", 0xC,
629  asd_read_reg_word(asd_ha, LmSEQ_DATA_TO_CSEQ(lseq)
630  + moffs));
631  }
632 
633  asd_printk("LSEQ%d MDP 0 MODE 5 >>>>\n", lseq);
634  moffs = LSEQ_MODE5_PAGE0_OFFSET;
635  asd_printk(STR_16BIT, "RET_ADDR", 0,
636  asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR(lseq) + moffs));
637  asd_printk(STR_16BIT, "REG0_MODE", 2,
638  asd_read_reg_word(asd_ha, LmSEQ_REG0_MODE(lseq) + moffs));
639  asd_printk(STR_16BIT, "MODE_FLAGS", 4,
640  asd_read_reg_word(asd_ha, LmSEQ_MODE_FLAGS(lseq) + moffs));
641  asd_printk(STR_16BIT, "RET_ADDR2", 0x6,
642  asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR2(lseq) + moffs));
643  asd_printk(STR_16BIT, "RET_ADDR1", 0x8,
644  asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR1(lseq) + moffs));
645  asd_printk(STR_8BIT, "OPCODE_TO_CSEQ", 0xB,
646  asd_read_reg_byte(asd_ha, LmSEQ_OPCODE_TO_CSEQ(lseq) + moffs));
647  asd_printk(STR_16BIT, "DATA_TO_CSEQ", 0xC,
648  asd_read_reg_word(asd_ha, LmSEQ_DATA_TO_CSEQ(lseq) + moffs));
649 
650  asd_printk("LSEQ%d MDP 0 MODE 0 >>>>\n", lseq);
651  PRINT_LMIP_word(asd_ha, lseq, FIRST_INV_DDB_SITE);
652  PRINT_LMIP_word(asd_ha, lseq, EMPTY_TRANS_CTX);
653  PRINT_LMIP_word(asd_ha, lseq, RESP_LEN);
654  PRINT_LMIP_word(asd_ha, lseq, FIRST_INV_SCB_SITE);
655  PRINT_LMIP_dword(asd_ha, lseq, INTEN_SAVE);
656  PRINT_LMIP_byte(asd_ha, lseq, LINK_RST_FRM_LEN);
657  PRINT_LMIP_byte(asd_ha, lseq, LINK_RST_PROTOCOL);
658  PRINT_LMIP_byte(asd_ha, lseq, RESP_STATUS);
659  PRINT_LMIP_byte(asd_ha, lseq, LAST_LOADED_SGE);
660  PRINT_LMIP_byte(asd_ha, lseq, SAVE_SCBPTR);
661 
662  asd_printk("LSEQ%d MDP 0 MODE 1 >>>>\n", lseq);
663  PRINT_LMIP_word(asd_ha, lseq, Q_XMIT_HEAD);
664  PRINT_LMIP_word(asd_ha, lseq, M1_EMPTY_TRANS_CTX);
665  PRINT_LMIP_word(asd_ha, lseq, INI_CONN_TAG);
666  PRINT_LMIP_byte(asd_ha, lseq, FAILED_OPEN_STATUS);
667  PRINT_LMIP_byte(asd_ha, lseq, XMIT_REQUEST_TYPE);
668  PRINT_LMIP_byte(asd_ha, lseq, M1_RESP_STATUS);
669  PRINT_LMIP_byte(asd_ha, lseq, M1_LAST_LOADED_SGE);
670  PRINT_LMIP_word(asd_ha, lseq, M1_SAVE_SCBPTR);
671 
672  asd_printk("LSEQ%d MDP 0 MODE 2 >>>>\n", lseq);
673  PRINT_LMIP_word(asd_ha, lseq, PORT_COUNTER);
674  PRINT_LMIP_word(asd_ha, lseq, PM_TABLE_PTR);
675  PRINT_LMIP_word(asd_ha, lseq, SATA_INTERLOCK_TMR_SAVE);
676  PRINT_LMIP_word(asd_ha, lseq, IP_BITL);
677  PRINT_LMIP_word(asd_ha, lseq, COPY_SMP_CONN_TAG);
678  PRINT_LMIP_byte(asd_ha, lseq, P0M2_OFFS1AH);
679 
680  asd_printk("LSEQ%d MDP 0 MODE 4/5 >>>>\n", lseq);
681  PRINT_LMIP_byte(asd_ha, lseq, SAVED_OOB_STATUS);
682  PRINT_LMIP_byte(asd_ha, lseq, SAVED_OOB_MODE);
683  PRINT_LMIP_word(asd_ha, lseq, Q_LINK_HEAD);
684  PRINT_LMIP_byte(asd_ha, lseq, LINK_RST_ERR);
685  PRINT_LMIP_byte(asd_ha, lseq, SAVED_OOB_SIGNALS);
686  PRINT_LMIP_byte(asd_ha, lseq, SAS_RESET_MODE);
687  PRINT_LMIP_byte(asd_ha, lseq, LINK_RESET_RETRY_COUNT);
688  PRINT_LMIP_byte(asd_ha, lseq, NUM_LINK_RESET_RETRIES);
689  PRINT_LMIP_word(asd_ha, lseq, OOB_INT_ENABLES);
690  PRINT_LMIP_word(asd_ha, lseq, NOTIFY_TIMER_TIMEOUT);
691  PRINT_LMIP_word(asd_ha, lseq, NOTIFY_TIMER_DOWN_COUNT);
692 
693  asd_printk("LSEQ%d MDP 1 MODE 0 >>>>\n", lseq);
694  PRINT_LMIP_qword(asd_ha, lseq, SG_LIST_PTR_ADDR0);
695  PRINT_LMIP_qword(asd_ha, lseq, SG_LIST_PTR_ADDR1);
696 
697  asd_printk("LSEQ%d MDP 1 MODE 1 >>>>\n", lseq);
698  PRINT_LMIP_qword(asd_ha, lseq, M1_SG_LIST_PTR_ADDR0);
699  PRINT_LMIP_qword(asd_ha, lseq, M1_SG_LIST_PTR_ADDR1);
700 
701  asd_printk("LSEQ%d MDP 1 MODE 2 >>>>\n", lseq);
702  PRINT_LMIP_dword(asd_ha, lseq, INVALID_DWORD_COUNT);
703  PRINT_LMIP_dword(asd_ha, lseq, DISPARITY_ERROR_COUNT);
704  PRINT_LMIP_dword(asd_ha, lseq, LOSS_OF_SYNC_COUNT);
705 
706  asd_printk("LSEQ%d MDP 1 MODE 4/5 >>>>\n", lseq);
707  PRINT_LMIP_dword(asd_ha, lseq, FRAME_TYPE_MASK);
708  PRINT_LMIP_dword(asd_ha, lseq, HASHED_SRC_ADDR_MASK_PRINT);
709  PRINT_LMIP_byte(asd_ha, lseq, NUM_FILL_BYTES_MASK);
710  PRINT_LMIP_word(asd_ha, lseq, TAG_MASK);
711  PRINT_LMIP_word(asd_ha, lseq, TARGET_PORT_XFER_TAG);
712  PRINT_LMIP_dword(asd_ha, lseq, DATA_OFFSET);
713 
714  asd_printk("LSEQ%d MDP 2 MODE 0 >>>>\n", lseq);
715  PRINT_LMIP_dword(asd_ha, lseq, SMP_RCV_TIMER_TERM_TS);
716  PRINT_LMIP_byte(asd_ha, lseq, DEVICE_BITS);
717  PRINT_LMIP_word(asd_ha, lseq, SDB_DDB);
718  PRINT_LMIP_word(asd_ha, lseq, SDB_NUM_TAGS);
719  PRINT_LMIP_word(asd_ha, lseq, SDB_CURR_TAG);
720 
721  asd_printk("LSEQ%d MDP 2 MODE 1 >>>>\n", lseq);
722  PRINT_LMIP_qword(asd_ha, lseq, TX_ID_ADDR_FRAME);
723  PRINT_LMIP_dword(asd_ha, lseq, OPEN_TIMER_TERM_TS);
724  PRINT_LMIP_dword(asd_ha, lseq, SRST_AS_TIMER_TERM_TS);
725  PRINT_LMIP_dword(asd_ha, lseq, LAST_LOADED_SG_EL);
726 
727  asd_printk("LSEQ%d MDP 2 MODE 2 >>>>\n", lseq);
728  PRINT_LMIP_dword(asd_ha, lseq, CLOSE_TIMER_TERM_TS);
729  PRINT_LMIP_dword(asd_ha, lseq, BREAK_TIMER_TERM_TS);
730  PRINT_LMIP_dword(asd_ha, lseq, DWS_RESET_TIMER_TERM_TS);
731  PRINT_LMIP_dword(asd_ha, lseq, SATA_INTERLOCK_TIMER_TERM_TS);
732  PRINT_LMIP_dword(asd_ha, lseq, MCTL_TIMER_TERM_TS);
733 
734  asd_printk("LSEQ%d MDP 2 MODE 4/5 >>>>\n", lseq);
735  PRINT_LMIP_dword(asd_ha, lseq, COMINIT_TIMER_TERM_TS);
736  PRINT_LMIP_dword(asd_ha, lseq, RCV_ID_TIMER_TERM_TS);
737  PRINT_LMIP_dword(asd_ha, lseq, RCV_FIS_TIMER_TERM_TS);
738  PRINT_LMIP_dword(asd_ha, lseq, DEV_PRES_TIMER_TERM_TS);
739 }
740 
741 #if 0
742 
748 void asd_dump_target_ddb(struct asd_ha_struct *asd_ha, u16 site_no)
749 {
750  if (site_no >= asd_ha->hw_prof.max_ddbs)
751  return;
752 
753 #define DDB_FIELDB(__name) \
754  asd_ddbsite_read_byte(asd_ha, site_no, \
755  offsetof(struct asd_ddb_ssp_smp_target_port, __name))
756 #define DDB2_FIELDB(__name) \
757  asd_ddbsite_read_byte(asd_ha, site_no, \
758  offsetof(struct asd_ddb_stp_sata_target_port, __name))
759 #define DDB_FIELDW(__name) \
760  asd_ddbsite_read_word(asd_ha, site_no, \
761  offsetof(struct asd_ddb_ssp_smp_target_port, __name))
762 
763 #define DDB_FIELDD(__name) \
764  asd_ddbsite_read_dword(asd_ha, site_no, \
765  offsetof(struct asd_ddb_ssp_smp_target_port, __name))
766 
767  asd_printk("DDB: 0x%02x\n", site_no);
768  asd_printk("conn_type: 0x%02x\n", DDB_FIELDB(conn_type));
769  asd_printk("conn_rate: 0x%02x\n", DDB_FIELDB(conn_rate));
770  asd_printk("init_conn_tag: 0x%04x\n", be16_to_cpu(DDB_FIELDW(init_conn_tag)));
771  asd_printk("send_queue_head: 0x%04x\n", be16_to_cpu(DDB_FIELDW(send_queue_head)));
772  asd_printk("sq_suspended: 0x%02x\n", DDB_FIELDB(sq_suspended));
773  asd_printk("DDB Type: 0x%02x\n", DDB_FIELDB(ddb_type));
774  asd_printk("AWT Default: 0x%04x\n", DDB_FIELDW(awt_def));
775  asd_printk("compat_features: 0x%02x\n", DDB_FIELDB(compat_features));
776  asd_printk("Pathway Blocked Count: 0x%02x\n",
777  DDB_FIELDB(pathway_blocked_count));
778  asd_printk("arb_wait_time: 0x%04x\n", DDB_FIELDW(arb_wait_time));
779  asd_printk("more_compat_features: 0x%08x\n",
780  DDB_FIELDD(more_compat_features));
781  asd_printk("Conn Mask: 0x%02x\n", DDB_FIELDB(conn_mask));
782  asd_printk("flags: 0x%02x\n", DDB_FIELDB(flags));
783  asd_printk("flags2: 0x%02x\n", DDB2_FIELDB(flags2));
784  asd_printk("ExecQ Tail: 0x%04x\n",DDB_FIELDW(exec_queue_tail));
785  asd_printk("SendQ Tail: 0x%04x\n",DDB_FIELDW(send_queue_tail));
786  asd_printk("Active Task Count: 0x%04x\n",
787  DDB_FIELDW(active_task_count));
788  asd_printk("ITNL Reason: 0x%02x\n", DDB_FIELDB(itnl_reason));
789  asd_printk("ITNL Timeout Const: 0x%04x\n", DDB_FIELDW(itnl_timeout));
790  asd_printk("ITNL timestamp: 0x%08x\n", DDB_FIELDD(itnl_timestamp));
791 }
792 
793 void asd_dump_ddb_0(struct asd_ha_struct *asd_ha)
794 {
795 #define DDB0_FIELDB(__name) \
796  asd_ddbsite_read_byte(asd_ha, 0, \
797  offsetof(struct asd_ddb_seq_shared, __name))
798 #define DDB0_FIELDW(__name) \
799  asd_ddbsite_read_word(asd_ha, 0, \
800  offsetof(struct asd_ddb_seq_shared, __name))
801 
802 #define DDB0_FIELDD(__name) \
803  asd_ddbsite_read_dword(asd_ha,0 , \
804  offsetof(struct asd_ddb_seq_shared, __name))
805 
806 #define DDB0_FIELDA(__name, _o) \
807  asd_ddbsite_read_byte(asd_ha, 0, \
808  offsetof(struct asd_ddb_seq_shared, __name)+_o)
809 
810 
811  asd_printk("DDB: 0\n");
812  asd_printk("q_free_ddb_head:%04x\n", DDB0_FIELDW(q_free_ddb_head));
813  asd_printk("q_free_ddb_tail:%04x\n", DDB0_FIELDW(q_free_ddb_tail));
814  asd_printk("q_free_ddb_cnt:%04x\n", DDB0_FIELDW(q_free_ddb_cnt));
815  asd_printk("q_used_ddb_head:%04x\n", DDB0_FIELDW(q_used_ddb_head));
816  asd_printk("q_used_ddb_tail:%04x\n", DDB0_FIELDW(q_used_ddb_tail));
817  asd_printk("shared_mem_lock:%04x\n", DDB0_FIELDW(shared_mem_lock));
818  asd_printk("smp_conn_tag:%04x\n", DDB0_FIELDW(smp_conn_tag));
819  asd_printk("est_nexus_buf_cnt:%04x\n", DDB0_FIELDW(est_nexus_buf_cnt));
820  asd_printk("est_nexus_buf_thresh:%04x\n",
821  DDB0_FIELDW(est_nexus_buf_thresh));
822  asd_printk("conn_not_active:%02x\n", DDB0_FIELDB(conn_not_active));
823  asd_printk("phy_is_up:%02x\n", DDB0_FIELDB(phy_is_up));
824  asd_printk("port_map_by_links:%02x %02x %02x %02x "
825  "%02x %02x %02x %02x\n",
826  DDB0_FIELDA(port_map_by_links, 0),
827  DDB0_FIELDA(port_map_by_links, 1),
828  DDB0_FIELDA(port_map_by_links, 2),
829  DDB0_FIELDA(port_map_by_links, 3),
830  DDB0_FIELDA(port_map_by_links, 4),
831  DDB0_FIELDA(port_map_by_links, 5),
832  DDB0_FIELDA(port_map_by_links, 6),
833  DDB0_FIELDA(port_map_by_links, 7));
834 }
835 
836 static void asd_dump_scb_site(struct asd_ha_struct *asd_ha, u16 site_no)
837 {
838 
839 #define SCB_FIELDB(__name) \
840  asd_scbsite_read_byte(asd_ha, site_no, sizeof(struct scb_header) \
841  + offsetof(struct initiate_ssp_task, __name))
842 #define SCB_FIELDW(__name) \
843  asd_scbsite_read_word(asd_ha, site_no, sizeof(struct scb_header) \
844  + offsetof(struct initiate_ssp_task, __name))
845 #define SCB_FIELDD(__name) \
846  asd_scbsite_read_dword(asd_ha, site_no, sizeof(struct scb_header) \
847  + offsetof(struct initiate_ssp_task, __name))
848 
849  asd_printk("Total Xfer Len: 0x%08x.\n", SCB_FIELDD(total_xfer_len));
850  asd_printk("Frame Type: 0x%02x.\n", SCB_FIELDB(ssp_frame.frame_type));
851  asd_printk("Tag: 0x%04x.\n", SCB_FIELDW(ssp_frame.tag));
852  asd_printk("Target Port Xfer Tag: 0x%04x.\n",
853  SCB_FIELDW(ssp_frame.tptt));
854  asd_printk("Data Offset: 0x%08x.\n", SCB_FIELDW(ssp_frame.data_offs));
855  asd_printk("Retry Count: 0x%02x.\n", SCB_FIELDB(retry_count));
856 }
857 
862 void asd_dump_scb_sites(struct asd_ha_struct *asd_ha)
863 {
864  u16 site_no;
865 
866  for (site_no = 0; site_no < asd_ha->hw_prof.max_scbs; site_no++) {
867  u8 opcode;
868 
869  if (!SCB_SITE_VALID(site_no))
870  continue;
871 
872  /* We are only interested in SCB sites currently used.
873  */
874  opcode = asd_scbsite_read_byte(asd_ha, site_no,
875  offsetof(struct scb_header,
876  opcode));
877  if (opcode == 0xFF)
878  continue;
879 
880  asd_printk("\nSCB: 0x%x\n", site_no);
881  asd_dump_scb_site(asd_ha, site_no);
882  }
883 }
884 
885 #endif /* 0 */
886 
892 void asd_dump_seq_state(struct asd_ha_struct *asd_ha, u8 lseq_mask)
893 {
894  int lseq;
895 
896  asd_dump_cseq_state(asd_ha);
897 
898  if (lseq_mask != 0)
899  for_each_sequencer(lseq_mask, lseq_mask, lseq)
900  asd_dump_lseq_state(asd_ha, lseq);
901 }
902 
903 void asd_dump_frame_rcvd(struct asd_phy *phy,
904  struct done_list_struct *dl)
905 {
906  unsigned long flags;
907  int i;
908 
909  switch ((dl->status_block[1] & 0x70) >> 3) {
910  case SAS_PROTOCOL_STP:
911  ASD_DPRINTK("STP proto device-to-host FIS:\n");
912  break;
913  default:
914  case SAS_PROTOCOL_SSP:
915  ASD_DPRINTK("SAS proto IDENTIFY:\n");
916  break;
917  }
918  spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags);
919  for (i = 0; i < phy->sas_phy.frame_rcvd_size; i+=4)
920  ASD_DPRINTK("%02x: %02x %02x %02x %02x\n",
921  i,
922  phy->frame_rcvd[i],
923  phy->frame_rcvd[i+1],
924  phy->frame_rcvd[i+2],
925  phy->frame_rcvd[i+3]);
926  spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags);
927 }
928 
929 #if 0
930 
931 static void asd_dump_scb(struct asd_ascb *ascb, int ind)
932 {
933  asd_printk("scb%d: vaddr: 0x%p, dma_handle: 0x%llx, next: 0x%llx, "
934  "index:%d, opcode:0x%02x\n",
935  ind, ascb->dma_scb.vaddr,
936  (unsigned long long)ascb->dma_scb.dma_handle,
937  (unsigned long long)
938  le64_to_cpu(ascb->scb->header.next_scb),
939  le16_to_cpu(ascb->scb->header.index),
940  ascb->scb->header.opcode);
941 }
942 
943 void asd_dump_scb_list(struct asd_ascb *ascb, int num)
944 {
945  int i = 0;
946 
947  asd_printk("dumping %d scbs:\n", num);
948 
949  asd_dump_scb(ascb, i++);
950  --num;
951 
952  if (num > 0 && !list_empty(&ascb->list)) {
953  struct list_head *el;
954 
955  list_for_each(el, &ascb->list) {
956  struct asd_ascb *s = list_entry(el, struct asd_ascb,
957  list);
958  asd_dump_scb(s, i++);
959  if (--num <= 0)
960  break;
961  }
962  }
963 }
964 
965 #endif /* 0 */
966 
967 #endif /* ASD_DEBUG */
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