#include <linux/time.h>
#include <linux/spinlock.h>
#include <linux/pm.h>
#include <linux/types.h>
#include <asm/io.h>

Data Structures
struct	ali_chip

struct	st_fifo_entry

struct	st_fifo

struct	frame_cb

struct	tx_fifo

struct	ali_ircc_cb

Macros
#define	BANK0 0x20

#define	BANK1 0x21

#define	BANK2 0x22

#define	BANK3 0x23

#define	FIR_MCR 0x07 /* Master Control Register */

#define	FIR_DR 0x00 /* Alias 0, FIR Data Register (R/W) */

#define	FIR_IER 0x01 /* Alias 1, FIR Interrupt Enable Register (R/W) */

#define	FIR_IIR 0x02 /* Alias 2, FIR Interrupt Identification Register (Read only) */

#define	FIR_LCR_A 0x03 /* Alias 3, FIR Line Control Register A (R/W) */

#define	FIR_LCR_B 0x04 /* Alias 4, FIR Line Control Register B (R/W) */

#define	FIR_LSR 0x05 /* Alias 5, FIR Line Status Register (R/W) */

#define	FIR_BSR 0x06 /* Alias 6, FIR Bus Status Register (Read only) */

#define	IER_FIFO 0x10 /* FIR FIFO Interrupt Enable */

#define	IER_TIMER 0x20 /* Timer Interrupt Enable */

#define	IER_EOM 0x40 /* End of Message Interrupt Enable */

#define	IER_ACT 0x80 /* Active Frame Interrupt Enable */

#define	IIR_FIFO 0x10 /* FIR FIFO Interrupt */

#define	IIR_TIMER 0x20 /* Timer Interrupt */

#define	IIR_EOM 0x40 /* End of Message Interrupt */

#define	IIR_ACT 0x80 /* Active Frame Interrupt */

#define	LCR_A_FIFO_RESET 0x80 /* FIFO Reset */

#define	LCR_B_BW 0x10 /* Brick Wall */

#define	LCR_B_SIP 0x20 /* SIP Enable */

#define	LCR_B_TX_MODE 0x40 /* Transmit Mode */

#define	LCR_B_RX_MODE 0x80 /* Receive Mode */

#define	LSR_FIR_LSA 0x00 /* FIR Line Status Address */

#define	LSR_FRAME_ABORT 0x08 /* Frame Abort */

#define	LSR_CRC_ERROR 0x10 /* CRC Error */

#define	LSR_SIZE_ERROR 0x20 /* Size Error */

#define	LSR_FRAME_ERROR 0x40 /* Frame Error */

#define	LSR_FIFO_UR 0x80 /* FIFO Underrun */

#define	LSR_FIFO_OR 0x80 /* FIFO Overrun */

#define	BSR_FIFO_NOT_EMPTY 0x80 /* FIFO Not Empty */

#define	FIR_CR 0x00 /* Alias 0, FIR Configuration Register (R/W) */

#define	FIR_FIFO_TR 0x01 /* Alias 1, FIR FIFO Threshold Register (R/W) */

#define	FIR_DMA_TR 0x02 /* Alias 2, FIR DMA Threshold Register (R/W) */

#define	FIR_TIMER_IIR 0x03 /* Alias 3, FIR Timer interrupt interval register (W/O) */

#define	FIR_FIFO_FR 0x03 /* Alias 3, FIR FIFO Flag register (R/O) */

#define	FIR_FIFO_RAR 0x04 /* Alias 4, FIR FIFO Read Address register (R/O) */

#define	FIR_FIFO_WAR 0x05 /* Alias 5, FIR FIFO Write Address register (R/O) */

#define	FIR_TR 0x06 /* Alias 6, Test REgister (W/O) */

#define	CR_DMA_EN 0x01 /* DMA Enable */

#define	CR_DMA_BURST 0x02 /* DMA Burst Mode */

#define	CR_TIMER_EN 0x08 /* Timer Enable */

#define	TIMER_IIR_500 0x00 /* 500 us */

#define	TIMER_IIR_1ms 0x01 /* 1 ms */

#define	TIMER_IIR_2ms 0x02 /* 2 ms */

#define	TIMER_IIR_4ms 0x03 /* 4 ms */

#define	FIR_IRDA_CR 0x00 /* Alias 0, IrDA Control Register (R/W) */

#define	FIR_BOF_CR 0x01 /* Alias 1, BOF Count Register (R/W) */

#define	FIR_BW_CR 0x02 /* Alias 2, Brick Wall Count Register (R/W) */

#define	FIR_TX_DSR_HI 0x03 /* Alias 3, TX Data Size Register (high) (R/W) */

#define	FIR_TX_DSR_LO 0x04 /* Alias 4, TX Data Size Register (low) (R/W) */

#define	FIR_RX_DSR_HI 0x05 /* Alias 5, RX Data Size Register (high) (R/W) */

#define	FIR_RX_DSR_LO 0x06 /* Alias 6, RX Data Size Register (low) (R/W) */

#define	IRDA_CR_HDLC1152 0x80 /* 1.152Mbps HDLC Select */

#define	IRDA_CR_CRC 0X40 /* CRC Select. */

#define	IRDA_CR_HDLC 0x20 /* HDLC select. */

#define	IRDA_CR_HP_MODE 0x10 /* HP mode (read only) */

#define	IRDA_CR_SD_ST 0x08 /* SD/MODE State. */

#define	IRDA_CR_FIR_SIN 0x04 /* FIR SIN Select. */

#define	IRDA_CR_ITTX_0 0x02 /* SOUT State. IRTX force to 0 */

#define	IRDA_CR_ITTX_1 0x03 /* SOUT State. IRTX force to 1 */

#define	FIR_ID_VR 0x00 /* Alias 0, FIR ID Version Register (R/O) */

#define	FIR_MODULE_CR 0x01 /* Alias 1, FIR Module Control Register (R/W) */

#define	FIR_IO_BASE_HI 0x02 /* Alias 2, FIR Higher I/O Base Address Register (R/O) */

#define	FIR_IO_BASE_LO 0x03 /* Alias 3, FIR Lower I/O Base Address Register (R/O) */

#define	FIR_IRQ_CR 0x04 /* Alias 4, FIR IRQ Channel Register (R/O) */

#define	FIR_DMA_CR 0x05 /* Alias 5, FIR DMA Channel Register (R/O) */

#define	DMA_TX_MODE 0x08 /* Mem to I/O, ++, demand. */

#define	DMA_RX_MODE 0x04 /* I/O to mem, ++, demand. */

#define	MAX_TX_WINDOW 7

#define	MAX_RX_WINDOW 7

#define	TX_FIFO_Threshold 8

#define	RX_FIFO_Threshold 1

#define	TX_DMA_Threshold 1

#define	RX_DMA_Threshold 1

Typedefs
typedef struct ali_chip	ali_chip_t

Macro Definition Documentation

#define BANK0 0x20

Definition at line 36 of file ali-ircc.h.

#define BANK1 0x21

Definition at line 37 of file ali-ircc.h.

#define BANK2 0x22

Definition at line 38 of file ali-ircc.h.

#define BANK3 0x23

Definition at line 39 of file ali-ircc.h.

#define BSR_FIFO_NOT_EMPTY 0x80 /* FIFO Not Empty */

Definition at line 84 of file ali-ircc.h.

#define CR_DMA_BURST 0x02 /* DMA Burst Mode */

Definition at line 98 of file ali-ircc.h.

#define CR_DMA_EN 0x01 /* DMA Enable */

Definition at line 97 of file ali-ircc.h.

#define CR_TIMER_EN 0x08 /* Timer Enable */

Definition at line 99 of file ali-ircc.h.

#define DMA_RX_MODE 0x04 /* I/O to mem, ++, demand. */

Definition at line 149 of file ali-ircc.h.

#define DMA_TX_MODE 0x08 /* Mem to I/O, ++, demand. */

Definition at line 148 of file ali-ircc.h.

#define FIR_BOF_CR 0x01 /* Alias 1, BOF Count Register (R/W) */

Definition at line 109 of file ali-ircc.h.

#define FIR_BSR 0x06 /* Alias 6, FIR Bus Status Register (Read only) */

Definition at line 50 of file ali-ircc.h.

#define FIR_BW_CR 0x02 /* Alias 2, Brick Wall Count Register (R/W) */

Definition at line 110 of file ali-ircc.h.

#define FIR_CR 0x00 /* Alias 0, FIR Configuration Register (R/W) */

Definition at line 87 of file ali-ircc.h.

#define FIR_DMA_CR 0x05 /* Alias 5, FIR DMA Channel Register (R/O) */

Definition at line 132 of file ali-ircc.h.

#define FIR_DMA_TR 0x02 /* Alias 2, FIR DMA Threshold Register (R/W) */

Definition at line 89 of file ali-ircc.h.

#define FIR_DR 0x00 /* Alias 0, FIR Data Register (R/W) */

Definition at line 44 of file ali-ircc.h.

#define FIR_FIFO_FR 0x03 /* Alias 3, FIR FIFO Flag register (R/O) */

Definition at line 91 of file ali-ircc.h.

#define FIR_FIFO_RAR 0x04 /* Alias 4, FIR FIFO Read Address register (R/O) */

Definition at line 92 of file ali-ircc.h.

#define FIR_FIFO_TR 0x01 /* Alias 1, FIR FIFO Threshold Register (R/W) */

Definition at line 88 of file ali-ircc.h.

#define FIR_FIFO_WAR 0x05 /* Alias 5, FIR FIFO Write Address register (R/O) */

Definition at line 93 of file ali-ircc.h.

#define FIR_ID_VR 0x00 /* Alias 0, FIR ID Version Register (R/O) */

Definition at line 127 of file ali-ircc.h.

#define FIR_IER 0x01 /* Alias 1, FIR Interrupt Enable Register (R/W) */

Definition at line 45 of file ali-ircc.h.

#define FIR_IIR 0x02 /* Alias 2, FIR Interrupt Identification Register (Read only) */

Definition at line 46 of file ali-ircc.h.

#define FIR_IO_BASE_HI 0x02 /* Alias 2, FIR Higher I/O Base Address Register (R/O) */

Definition at line 129 of file ali-ircc.h.

#define FIR_IO_BASE_LO 0x03 /* Alias 3, FIR Lower I/O Base Address Register (R/O) */

Definition at line 130 of file ali-ircc.h.

#define FIR_IRDA_CR 0x00 /* Alias 0, IrDA Control Register (R/W) */

Definition at line 108 of file ali-ircc.h.

#define FIR_IRQ_CR 0x04 /* Alias 4, FIR IRQ Channel Register (R/O) */

Definition at line 131 of file ali-ircc.h.

#define FIR_LCR_A 0x03 /* Alias 3, FIR Line Control Register A (R/W) */

Definition at line 47 of file ali-ircc.h.

#define FIR_LCR_B 0x04 /* Alias 4, FIR Line Control Register B (R/W) */

Definition at line 48 of file ali-ircc.h.

#define FIR_LSR 0x05 /* Alias 5, FIR Line Status Register (R/W) */

Definition at line 49 of file ali-ircc.h.

#define FIR_MCR 0x07 /* Master Control Register */

Definition at line 41 of file ali-ircc.h.

#define FIR_MODULE_CR 0x01 /* Alias 1, FIR Module Control Register (R/W) */

Definition at line 128 of file ali-ircc.h.

#define FIR_RX_DSR_HI 0x05 /* Alias 5, RX Data Size Register (high) (R/W) */

Definition at line 113 of file ali-ircc.h.

#define FIR_RX_DSR_LO 0x06 /* Alias 6, RX Data Size Register (low) (R/W) */

Definition at line 114 of file ali-ircc.h.

#define FIR_TIMER_IIR 0x03 /* Alias 3, FIR Timer interrupt interval register (W/O) */

Definition at line 90 of file ali-ircc.h.

#define FIR_TR 0x06 /* Alias 6, Test REgister (W/O) */

Definition at line 94 of file ali-ircc.h.

#define FIR_TX_DSR_HI 0x03 /* Alias 3, TX Data Size Register (high) (R/W) */

Definition at line 111 of file ali-ircc.h.

#define FIR_TX_DSR_LO 0x04 /* Alias 4, TX Data Size Register (low) (R/W) */

Definition at line 112 of file ali-ircc.h.

#define IER_ACT 0x80 /* Active Frame Interrupt Enable */

Definition at line 57 of file ali-ircc.h.

#define IER_EOM 0x40 /* End of Message Interrupt Enable */

Definition at line 56 of file ali-ircc.h.

#define IER_FIFO 0x10 /* FIR FIFO Interrupt Enable */

Definition at line 54 of file ali-ircc.h.

#define IER_TIMER 0x20 /* Timer Interrupt Enable */

Definition at line 55 of file ali-ircc.h.

#define IIR_ACT 0x80 /* Active Frame Interrupt */

Definition at line 63 of file ali-ircc.h.

#define IIR_EOM 0x40 /* End of Message Interrupt */

Definition at line 62 of file ali-ircc.h.

#define IIR_FIFO 0x10 /* FIR FIFO Interrupt */

Definition at line 60 of file ali-ircc.h.

#define IIR_TIMER 0x20 /* Timer Interrupt */

Definition at line 61 of file ali-ircc.h.

#define IRDA_CR_CRC 0X40 /* CRC Select. */

Definition at line 118 of file ali-ircc.h.

#define IRDA_CR_FIR_SIN 0x04 /* FIR SIN Select. */

Definition at line 122 of file ali-ircc.h.

#define IRDA_CR_HDLC 0x20 /* HDLC select. */

Definition at line 119 of file ali-ircc.h.

#define IRDA_CR_HDLC1152 0x80 /* 1.152Mbps HDLC Select */

Definition at line 117 of file ali-ircc.h.

#define IRDA_CR_HP_MODE 0x10 /* HP mode (read only) */

Definition at line 120 of file ali-ircc.h.

#define IRDA_CR_ITTX_0 0x02 /* SOUT State. IRTX force to 0 */

Definition at line 123 of file ali-ircc.h.

#define IRDA_CR_ITTX_1 0x03 /* SOUT State. IRTX force to 1 */

Definition at line 124 of file ali-ircc.h.

#define IRDA_CR_SD_ST 0x08 /* SD/MODE State. */

Definition at line 121 of file ali-ircc.h.

#define LCR_A_FIFO_RESET 0x80 /* FIFO Reset */

Definition at line 66 of file ali-ircc.h.

#define LCR_B_BW 0x10 /* Brick Wall */

Definition at line 69 of file ali-ircc.h.

#define LCR_B_RX_MODE 0x80 /* Receive Mode */

Definition at line 72 of file ali-ircc.h.

#define LCR_B_SIP 0x20 /* SIP Enable */

Definition at line 70 of file ali-ircc.h.

#define LCR_B_TX_MODE 0x40 /* Transmit Mode */

Definition at line 71 of file ali-ircc.h.

#define LSR_CRC_ERROR 0x10 /* CRC Error */

Definition at line 77 of file ali-ircc.h.

#define LSR_FIFO_OR 0x80 /* FIFO Overrun */

Definition at line 81 of file ali-ircc.h.

#define LSR_FIFO_UR 0x80 /* FIFO Underrun */

Definition at line 80 of file ali-ircc.h.

#define LSR_FIR_LSA 0x00 /* FIR Line Status Address */

Definition at line 75 of file ali-ircc.h.

#define LSR_FRAME_ABORT 0x08 /* Frame Abort */

Definition at line 76 of file ali-ircc.h.

#define LSR_FRAME_ERROR 0x40 /* Frame Error */

Definition at line 79 of file ali-ircc.h.

#define LSR_SIZE_ERROR 0x20 /* Size Error */

Definition at line 78 of file ali-ircc.h.

#define MAX_RX_WINDOW 7

Definition at line 152 of file ali-ircc.h.

#define MAX_TX_WINDOW 7

Definition at line 151 of file ali-ircc.h.

#define RX_DMA_Threshold 1

Definition at line 157 of file ali-ircc.h.

#define RX_FIFO_Threshold 1

Definition at line 155 of file ali-ircc.h.

#define TIMER_IIR_1ms 0x01 /* 1 ms */

Definition at line 103 of file ali-ircc.h.

#define TIMER_IIR_2ms 0x02 /* 2 ms */

Definition at line 104 of file ali-ircc.h.

#define TIMER_IIR_4ms 0x03 /* 4 ms */

Definition at line 105 of file ali-ircc.h.

#define TIMER_IIR_500 0x00 /* 500 us */

Definition at line 102 of file ali-ircc.h.

#define TX_DMA_Threshold 1

Definition at line 156 of file ali-ircc.h.

#define TX_FIFO_Threshold 8

Definition at line 154 of file ali-ircc.h.

Typedef Documentation

typedef struct ali_chip ali_chip_t

Definition at line 144 of file ali-ircc.h.

Data Structures

Macros

Typedefs

Macro Definition Documentation

Typedef Documentation