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ali14xx.c
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1 /*
2  * Copyright (C) 1996 Linus Torvalds & author (see below)
3  */
4 
5 /*
6  * ALI M14xx chipset EIDE controller
7  *
8  * Works for ALI M1439/1443/1445/1487/1489 chipsets.
9  *
10  * Adapted from code developed by [email protected]. -ml
11  * Derek's notes follow:
12  *
13  * I think the code should be pretty understandable,
14  * but I'll be happy to (try to) answer questions.
15  *
16  * The critical part is in the setupDrive function. The initRegisters
17  * function doesn't seem to be necessary, but the DOS driver does it, so
18  * I threw it in.
19  *
20  * I've only tested this on my system, which only has one disk. I posted
21  * it to comp.sys.linux.hardware, so maybe some other people will try it
22  * out.
23  *
24  * Derek Noonburg ([email protected])
25  * 95-sep-26
26  *
27  * Update 96-jul-13:
28  *
29  * I've since upgraded to two disks and a CD-ROM, with no trouble, and
30  * I've also heard from several others who have used it successfully.
31  * This driver appears to work with both the 1443/1445 and the 1487/1489
32  * chipsets. I've added support for PIO mode 4 for the 1487. This
33  * seems to work just fine on the 1443 also, although I'm not sure it's
34  * advertised as supporting mode 4. (I've been running a WDC AC21200 in
35  * mode 4 for a while now with no trouble.) -Derek
36  */
37 
38 #include <linux/module.h>
39 #include <linux/types.h>
40 #include <linux/kernel.h>
41 #include <linux/delay.h>
42 #include <linux/timer.h>
43 #include <linux/mm.h>
44 #include <linux/ioport.h>
45 #include <linux/blkdev.h>
46 #include <linux/ide.h>
47 #include <linux/init.h>
48 
49 #include <asm/io.h>
50 
51 #define DRV_NAME "ali14xx"
52 
53 /* port addresses for auto-detection */
54 #define ALI_NUM_PORTS 4
55 static const int ports[ALI_NUM_PORTS] __initconst =
56  { 0x074, 0x0f4, 0x034, 0x0e4 };
57 
58 /* register initialization data */
59 typedef struct { u8 reg, data; } RegInitializer;
60 
61 static const RegInitializer initData[] __initconst = {
62  {0x01, 0x0f}, {0x02, 0x00}, {0x03, 0x00}, {0x04, 0x00},
63  {0x05, 0x00}, {0x06, 0x00}, {0x07, 0x2b}, {0x0a, 0x0f},
64  {0x25, 0x00}, {0x26, 0x00}, {0x27, 0x00}, {0x28, 0x00},
65  {0x29, 0x00}, {0x2a, 0x00}, {0x2f, 0x00}, {0x2b, 0x00},
66  {0x2c, 0x00}, {0x2d, 0x00}, {0x2e, 0x00}, {0x30, 0x00},
67  {0x31, 0x00}, {0x32, 0x00}, {0x33, 0x00}, {0x34, 0xff},
68  {0x35, 0x03}, {0x00, 0x00}
69 };
70 
71 /* timing parameter registers for each drive */
72 static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = {
73  {0x03, 0x26, 0x04, 0x27}, /* drive 0 */
74  {0x05, 0x28, 0x06, 0x29}, /* drive 1 */
75  {0x2b, 0x30, 0x2c, 0x31}, /* drive 2 */
76  {0x2d, 0x32, 0x2e, 0x33}, /* drive 3 */
77 };
78 
79 static int basePort; /* base port address */
80 static int regPort; /* port for register number */
81 static int dataPort; /* port for register data */
82 static u8 regOn; /* output to base port to access registers */
83 static u8 regOff; /* output to base port to close registers */
84 
85 /*------------------------------------------------------------------------*/
86 
87 /*
88  * Read a controller register.
89  */
90 static inline u8 inReg(u8 reg)
91 {
92  outb_p(reg, regPort);
93  return inb(dataPort);
94 }
95 
96 /*
97  * Write a controller register.
98  */
99 static void outReg(u8 data, u8 reg)
100 {
101  outb_p(reg, regPort);
102  outb_p(data, dataPort);
103 }
104 
105 static DEFINE_SPINLOCK(ali14xx_lock);
106 
107 /*
108  * Set PIO mode for the specified drive.
109  * This function computes timing parameters
110  * and sets controller registers accordingly.
111  */
112 static void ali14xx_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
113 {
114  int driveNum;
115  int time1, time2;
116  u8 param1, param2, param3, param4;
117  unsigned long flags;
118  int bus_speed = ide_vlb_clk ? ide_vlb_clk : 50;
119  const u8 pio = drive->pio_mode - XFER_PIO_0;
120  struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
121 
122  /* calculate timing, according to PIO mode */
123  time1 = ide_pio_cycle_time(drive, pio);
124  time2 = t->active;
125  param3 = param1 = (time2 * bus_speed + 999) / 1000;
126  param4 = param2 = (time1 * bus_speed + 999) / 1000 - param1;
127  if (pio < 3) {
128  param3 += 8;
129  param4 += 8;
130  }
131  printk(KERN_DEBUG "%s: PIO mode%d, t1=%dns, t2=%dns, cycles = %d+%d, %d+%d\n",
132  drive->name, pio, time1, time2, param1, param2, param3, param4);
133 
134  /* stuff timing parameters into controller registers */
135  driveNum = (drive->hwif->index << 1) + (drive->dn & 1);
136  spin_lock_irqsave(&ali14xx_lock, flags);
137  outb_p(regOn, basePort);
138  outReg(param1, regTab[driveNum].reg1);
139  outReg(param2, regTab[driveNum].reg2);
140  outReg(param3, regTab[driveNum].reg3);
141  outReg(param4, regTab[driveNum].reg4);
142  outb_p(regOff, basePort);
143  spin_unlock_irqrestore(&ali14xx_lock, flags);
144 }
145 
146 /*
147  * Auto-detect the IDE controller port.
148  */
149 static int __init findPort(void)
150 {
151  int i;
152  u8 t;
153  unsigned long flags;
154 
155  local_irq_save(flags);
156  for (i = 0; i < ALI_NUM_PORTS; ++i) {
157  basePort = ports[i];
158  regOff = inb(basePort);
159  for (regOn = 0x30; regOn <= 0x33; ++regOn) {
160  outb_p(regOn, basePort);
161  if (inb(basePort) == regOn) {
162  regPort = basePort + 4;
163  dataPort = basePort + 8;
164  t = inReg(0) & 0xf0;
165  outb_p(regOff, basePort);
166  local_irq_restore(flags);
167  if (t != 0x50)
168  return 0;
169  return 1; /* success */
170  }
171  }
172  outb_p(regOff, basePort);
173  }
174  local_irq_restore(flags);
175  return 0;
176 }
177 
178 /*
179  * Initialize controller registers with default values.
180  */
181 static int __init initRegisters(void)
182 {
183  const RegInitializer *p;
184  u8 t;
185  unsigned long flags;
186 
187  local_irq_save(flags);
188  outb_p(regOn, basePort);
189  for (p = initData; p->reg != 0; ++p)
190  outReg(p->data, p->reg);
191  outb_p(0x01, regPort);
192  t = inb(regPort) & 0x01;
193  outb_p(regOff, basePort);
194  local_irq_restore(flags);
195  return t;
196 }
197 
198 static const struct ide_port_ops ali14xx_port_ops = {
199  .set_pio_mode = ali14xx_set_pio_mode,
200 };
201 
202 static const struct ide_port_info ali14xx_port_info = {
203  .name = DRV_NAME,
204  .chipset = ide_ali14xx,
205  .port_ops = &ali14xx_port_ops,
206  .host_flags = IDE_HFLAG_NO_DMA,
207  .pio_mask = ATA_PIO4,
208 };
209 
210 static int __init ali14xx_probe(void)
211 {
212  printk(KERN_DEBUG "ali14xx: base=0x%03x, regOn=0x%02x.\n",
213  basePort, regOn);
214 
215  /* initialize controller registers */
216  if (!initRegisters()) {
217  printk(KERN_ERR "ali14xx: Chip initialization failed.\n");
218  return 1;
219  }
220 
221  return ide_legacy_device_add(&ali14xx_port_info, 0);
222 }
223 
224 static bool probe_ali14xx;
225 
226 module_param_named(probe, probe_ali14xx, bool, 0);
227 MODULE_PARM_DESC(probe, "probe for ALI M14xx chipsets");
228 
229 static int __init ali14xx_init(void)
230 {
231  if (probe_ali14xx == 0)
232  goto out;
233 
234  /* auto-detect IDE controller port */
235  if (findPort()) {
236  if (ali14xx_probe())
237  return -ENODEV;
238  return 0;
239  }
240  printk(KERN_ERR "ali14xx: not found.\n");
241 out:
242  return -ENODEV;
243 }
244 
245 module_init(ali14xx_init);
246 
247 MODULE_AUTHOR("see local file");
248 MODULE_DESCRIPTION("support of ALI 14XX IDE chipsets");
249 MODULE_LICENSE("GPL");