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time.c
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1 /*
2  * linux/arch/arm/mach-w90x900/time.c
3  *
4  * Based on linux/arch/arm/plat-s3c24xx/time.c by Ben Dooks
5  *
6  * Copyright (c) 2009 Nuvoton technology corporation
7  * All rights reserved.
8  *
9  * Wan ZongShun <[email protected]>
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * (at your option) any later version.
15  *
16  */
17 
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/init.h>
21 #include <linux/interrupt.h>
22 #include <linux/err.h>
23 #include <linux/clk.h>
24 #include <linux/io.h>
25 #include <linux/leds.h>
26 #include <linux/clocksource.h>
27 #include <linux/clockchips.h>
28 
29 #include <asm/mach-types.h>
30 #include <asm/mach/irq.h>
31 #include <asm/mach/time.h>
32 
33 #include <mach/map.h>
34 #include <mach/regs-timer.h>
35 
36 #include "nuc9xx.h"
37 
38 #define RESETINT 0x1f
39 #define PERIOD (0x01 << 27)
40 #define ONESHOT (0x00 << 27)
41 #define COUNTEN (0x01 << 30)
42 #define INTEN (0x01 << 29)
43 
44 #define TICKS_PER_SEC 100
45 #define PRESCALE 0x63 /* Divider = prescale + 1 */
46 
47 #define TDR_SHIFT 24
48 
49 static unsigned int timer0_load;
50 
51 static void nuc900_clockevent_setmode(enum clock_event_mode mode,
52  struct clock_event_device *clk)
53 {
54  unsigned int val;
55 
56  val = __raw_readl(REG_TCSR0);
57  val &= ~(0x03 << 27);
58 
59  switch (mode) {
60  case CLOCK_EVT_MODE_PERIODIC:
61  __raw_writel(timer0_load, REG_TICR0);
62  val |= (PERIOD | COUNTEN | INTEN | PRESCALE);
63  break;
64 
65  case CLOCK_EVT_MODE_ONESHOT:
66  val |= (ONESHOT | COUNTEN | INTEN | PRESCALE);
67  break;
68 
69  case CLOCK_EVT_MODE_UNUSED:
70  case CLOCK_EVT_MODE_SHUTDOWN:
71  case CLOCK_EVT_MODE_RESUME:
72  break;
73  }
74 
75  __raw_writel(val, REG_TCSR0);
76 }
77 
78 static int nuc900_clockevent_setnextevent(unsigned long evt,
79  struct clock_event_device *clk)
80 {
81  unsigned int val;
82 
83  __raw_writel(evt, REG_TICR0);
84 
85  val = __raw_readl(REG_TCSR0);
86  val |= (COUNTEN | INTEN | PRESCALE);
87  __raw_writel(val, REG_TCSR0);
88 
89  return 0;
90 }
91 
92 static struct clock_event_device nuc900_clockevent_device = {
93  .name = "nuc900-timer0",
94  .shift = 32,
95  .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
96  .set_mode = nuc900_clockevent_setmode,
97  .set_next_event = nuc900_clockevent_setnextevent,
98  .rating = 300,
99 };
100 
101 /*IRQ handler for the timer*/
102 
103 static irqreturn_t nuc900_timer0_interrupt(int irq, void *dev_id)
104 {
105  struct clock_event_device *evt = &nuc900_clockevent_device;
106 
107  __raw_writel(0x01, REG_TISR); /* clear TIF0 */
108 
109  evt->event_handler(evt);
110  return IRQ_HANDLED;
111 }
112 
113 static struct irqaction nuc900_timer0_irq = {
114  .name = "nuc900-timer0",
116  .handler = nuc900_timer0_interrupt,
117 };
118 
119 static void __init nuc900_clockevents_init(void)
120 {
121  unsigned int rate;
122  struct clk *clk = clk_get(NULL, "timer0");
123 
124  BUG_ON(IS_ERR(clk));
125 
126  __raw_writel(0x00, REG_TCSR0);
127 
128  clk_enable(clk);
129  rate = clk_get_rate(clk) / (PRESCALE + 1);
130 
131  timer0_load = (rate / TICKS_PER_SEC);
132 
134  setup_irq(IRQ_TIMER0, &nuc900_timer0_irq);
135 
136  nuc900_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC,
137  nuc900_clockevent_device.shift);
138  nuc900_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff,
139  &nuc900_clockevent_device);
140  nuc900_clockevent_device.min_delta_ns = clockevent_delta2ns(0xf,
141  &nuc900_clockevent_device);
142  nuc900_clockevent_device.cpumask = cpumask_of(0);
143 
144  clockevents_register_device(&nuc900_clockevent_device);
145 }
146 
147 static void __init nuc900_clocksource_init(void)
148 {
149  unsigned int val;
150  unsigned int rate;
151  struct clk *clk = clk_get(NULL, "timer1");
152 
153  BUG_ON(IS_ERR(clk));
154 
155  __raw_writel(0x00, REG_TCSR1);
156 
157  clk_enable(clk);
158  rate = clk_get_rate(clk) / (PRESCALE + 1);
159 
160  __raw_writel(0xffffffff, REG_TICR1);
161 
162  val = __raw_readl(REG_TCSR1);
163  val |= (COUNTEN | PERIOD | PRESCALE);
164  __raw_writel(val, REG_TCSR1);
165 
166  clocksource_mmio_init(REG_TDR1, "nuc900-timer1", rate, 200,
168 }
169 
170 static void __init nuc900_timer_init(void)
171 {
172  nuc900_clocksource_init();
173  nuc900_clockevents_init();
174 }
175 
177  .init = nuc900_timer_init,
178 };