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Macros
dma.h File Reference

Go to the source code of this file.

Macros

#define CH_SPORT0_RX   0
 
#define CH_SPORT0_TX   1
 
#define CH_SPORT1_RX   2
 
#define CH_SPORT1_TX   3
 
#define CH_SPI0   4
 
#define CH_SPI1   5
 
#define CH_UART0_RX   6
 
#define CH_UART0_TX   7
 
#define CH_UART1_RX   8
 
#define CH_UART1_TX   9
 
#define CH_ATAPI_RX   10
 
#define CH_ATAPI_TX   11
 
#define CH_EPPI0   12
 
#define CH_EPPI1   13
 
#define CH_EPPI2   14
 
#define CH_PIXC_IMAGE   15
 
#define CH_PIXC_OVERLAY   16
 
#define CH_PIXC_OUTPUT   17
 
#define CH_SPORT2_RX   18
 
#define CH_SPORT2_TX   19
 
#define CH_SPORT3_RX   20
 
#define CH_SPORT3_TX   21
 
#define CH_SDH   22
 
#define CH_NFC   22
 
#define CH_SPI2   23
 
#define CH_UART2_RX   18
 
#define IRQ_UART2_RX   BFIN_IRQ(33) /* UART2 RX (DMA18) Interrupt */
 
#define CH_UART2_TX   19
 
#define IRQ_UART2_TX   BFIN_IRQ(34) /* UART2 TX (DMA19) Interrupt */
 
#define CH_UART3_RX   20
 
#define IRQ_UART3_RX   BFIN_IRQ(35) /* UART3 RX (DMA20) Interrupt */
 
#define CH_UART3_TX   21
 
#define IRQ_UART3_TX   BFIN_IRQ(36) /* UART3 TX (DMA21) Interrupt */
 
#define CH_MEM_STREAM0_DEST   24
 
#define CH_MEM_STREAM0_SRC   25
 
#define CH_MEM_STREAM1_DEST   26
 
#define CH_MEM_STREAM1_SRC   27
 
#define CH_MEM_STREAM2_DEST   28
 
#define CH_MEM_STREAM2_SRC   29
 
#define CH_MEM_STREAM3_DEST   30
 
#define CH_MEM_STREAM3_SRC   31
 
#define MAX_DMA_CHANNELS   32
 

Macro Definition Documentation

#define CH_ATAPI_RX   10

Definition at line 21 of file dma.h.

#define CH_ATAPI_TX   11

Definition at line 22 of file dma.h.

#define CH_EPPI0   12

Definition at line 23 of file dma.h.

#define CH_EPPI1   13

Definition at line 24 of file dma.h.

#define CH_EPPI2   14

Definition at line 25 of file dma.h.

#define CH_MEM_STREAM0_DEST   24

Definition at line 61 of file dma.h.

#define CH_MEM_STREAM0_SRC   25

Definition at line 62 of file dma.h.

#define CH_MEM_STREAM1_DEST   26

Definition at line 63 of file dma.h.

#define CH_MEM_STREAM1_SRC   27

Definition at line 64 of file dma.h.

#define CH_MEM_STREAM2_DEST   28

Definition at line 65 of file dma.h.

#define CH_MEM_STREAM2_SRC   29

Definition at line 66 of file dma.h.

#define CH_MEM_STREAM3_DEST   30

Definition at line 67 of file dma.h.

#define CH_MEM_STREAM3_SRC   31

Definition at line 68 of file dma.h.

#define CH_NFC   22

Definition at line 34 of file dma.h.

#define CH_PIXC_IMAGE   15

Definition at line 26 of file dma.h.

#define CH_PIXC_OUTPUT   17

Definition at line 28 of file dma.h.

#define CH_PIXC_OVERLAY   16

Definition at line 27 of file dma.h.

#define CH_SDH   22

Definition at line 33 of file dma.h.

#define CH_SPI0   4

Definition at line 15 of file dma.h.

#define CH_SPI1   5

Definition at line 16 of file dma.h.

#define CH_SPI2   23

Definition at line 35 of file dma.h.

#define CH_SPORT0_RX   0

Definition at line 11 of file dma.h.

#define CH_SPORT0_TX   1

Definition at line 12 of file dma.h.

#define CH_SPORT1_RX   2

Definition at line 13 of file dma.h.

#define CH_SPORT1_TX   3

Definition at line 14 of file dma.h.

#define CH_SPORT2_RX   18

Definition at line 29 of file dma.h.

#define CH_SPORT2_TX   19

Definition at line 30 of file dma.h.

#define CH_SPORT3_RX   20

Definition at line 31 of file dma.h.

#define CH_SPORT3_TX   21

Definition at line 32 of file dma.h.

#define CH_UART0_RX   6

Definition at line 17 of file dma.h.

#define CH_UART0_TX   7

Definition at line 18 of file dma.h.

#define CH_UART1_RX   8

Definition at line 19 of file dma.h.

#define CH_UART1_TX   9

Definition at line 20 of file dma.h.

#define CH_UART2_RX   18

Definition at line 43 of file dma.h.

#define CH_UART2_TX   19

Definition at line 45 of file dma.h.

#define CH_UART3_RX   20

Definition at line 55 of file dma.h.

#define CH_UART3_TX   21

Definition at line 57 of file dma.h.

#define IRQ_UART2_RX   BFIN_IRQ(33) /* UART2 RX (DMA18) Interrupt */

Definition at line 44 of file dma.h.

#define IRQ_UART2_TX   BFIN_IRQ(34) /* UART2 TX (DMA19) Interrupt */

Definition at line 46 of file dma.h.

#define IRQ_UART3_RX   BFIN_IRQ(35) /* UART3 RX (DMA20) Interrupt */

Definition at line 56 of file dma.h.

#define IRQ_UART3_TX   BFIN_IRQ(36) /* UART3 TX (DMA21) Interrupt */

Definition at line 58 of file dma.h.

#define MAX_DMA_CHANNELS   32

Definition at line 70 of file dma.h.