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Linux Kernel
3.7.1
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All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
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Linux Kernel
3.7.1
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#include <linux/suspend.h>#include <linux/io.h>#include <linux/interrupt.h>#include <linux/gpio.h>#include <linux/irq.h>#include <linux/delay.h>#include <linux/syscore_ops.h>#include <asm/dpmc.h>#include <asm/pm.h>#include <mach/pm.h>#include <asm/blackfin.h>#include <asm/mem_init.h>Go to the source code of this file.
Data Structures | |
| struct | STRUCT_ROM_SYSCTRL |
| struct | bfin_pm_data |
Macros | |
| #define | BITP_ROM_WUA_CHKHDR 24 |
| #define | BITP_ROM_WUA_DDRLOCK 7 |
| #define | BITP_ROM_WUA_DDRDLLEN 6 |
| #define | BITP_ROM_WUA_DDR 5 |
| #define | BITP_ROM_WUA_CGU 4 |
| #define | BITP_ROM_WUA_MEMBOOT 2 |
| #define | BITP_ROM_WUA_EN 1 |
| #define | BITM_ROM_WUA_CHKHDR (0xFF000000) |
| #define | ENUM_ROM_WUA_CHKHDR_AD 0xAD000000 |
| #define | BITM_ROM_WUA_DDRLOCK (0x00000080) |
| #define | BITM_ROM_WUA_DDRDLLEN (0x00000040) |
| #define | BITM_ROM_WUA_DDR (0x00000020) |
| #define | BITM_ROM_WUA_CGU (0x00000010) |
| #define | BITM_ROM_WUA_MEMBOOT (0x00000002) |
| #define | BITM_ROM_WUA_EN (0x00000001) |
| #define | BITP_ROM_SYSCTRL_CGU_LOCKINGEN 28 /* unlocks CGU_CTL register */ |
| #define | BITP_ROM_SYSCTRL_WUA_OVERRIDE 24 |
| #define | BITP_ROM_SYSCTRL_WUA_DDRDLLEN 20 /* Saves the DDR DLL and PADS registers to the DPM registers */ |
| #define | BITP_ROM_SYSCTRL_WUA_DDR 19 /* Saves the DDR registers to the DPM registers */ |
| #define | BITP_ROM_SYSCTRL_WUA_CGU 18 /* Saves the CGU registers into DPM registers */ |
| #define | BITP_ROM_SYSCTRL_WUA_DPMWRITE 17 /* Saves the Syscontrol structure structure contents into DPM registers */ |
| #define | BITP_ROM_SYSCTRL_WUA_EN 16 /* reads current PLL and DDR configuration into structure */ |
| #define | BITP_ROM_SYSCTRL_DDR_WRITE 13 /* writes the DDR registers from Syscontrol structure for wakeup initialization of DDR */ |
| #define | BITP_ROM_SYSCTRL_DDR_READ 12 /* Read the DDR registers into the Syscontrol structure for storing prior to hibernate */ |
| #define | BITP_ROM_SYSCTRL_CGU_AUTODIS 11 /* Disables auto handling of UPDT and ALGN fields */ |
| #define | BITP_ROM_SYSCTRL_CGU_CLKOUTSEL 7 /* access CGU_CLKOUTSEL register */ |
| #define | BITP_ROM_SYSCTRL_CGU_DIV 6 /* access CGU_DIV register */ |
| #define | BITP_ROM_SYSCTRL_CGU_STAT 5 /* access CGU_STAT register */ |
| #define | BITP_ROM_SYSCTRL_CGU_CTL 4 /* access CGU_CTL register */ |
| #define | BITP_ROM_SYSCTRL_CGU_RTNSTAT 2 /* Update structure STAT field upon error */ |
| #define | BITP_ROM_SYSCTRL_WRITE 1 /* write registers */ |
| #define | BITP_ROM_SYSCTRL_READ 0 /* read registers */ |
| #define | BITM_ROM_SYSCTRL_CGU_READ (0x00000001) /* Read CGU registers */ |
| #define | BITM_ROM_SYSCTRL_CGU_WRITE (0x00000002) /* Write registers */ |
| #define | BITM_ROM_SYSCTRL_CGU_RTNSTAT (0x00000004) /* Update structure STAT field upon error or after a write operation */ |
| #define | BITM_ROM_SYSCTRL_CGU_CTL (0x00000010) /* Access CGU_CTL register */ |
| #define | BITM_ROM_SYSCTRL_CGU_STAT (0x00000020) /* Access CGU_STAT register */ |
| #define | BITM_ROM_SYSCTRL_CGU_DIV (0x00000040) /* Access CGU_DIV register */ |
| #define | BITM_ROM_SYSCTRL_CGU_CLKOUTSEL (0x00000080) /* Access CGU_CLKOUTSEL register */ |
| #define | BITM_ROM_SYSCTRL_CGU_AUTODIS (0x00000800) /* Disables auto handling of UPDT and ALGN fields */ |
| #define | BITM_ROM_SYSCTRL_DDR_READ (0x00001000) /* Reads the contents of the DDR registers and stores them into the structure */ |
| #define | BITM_ROM_SYSCTRL_DDR_WRITE (0x00002000) /* Writes the DDR registers from the structure, only really intented for wakeup functionality and not for full DDR configuration */ |
| #define | BITM_ROM_SYSCTRL_WUA_EN (0x00010000) /* Wakeup entry or exit opertation enable */ |
| #define | BITM_ROM_SYSCTRL_WUA_DPMWRITE (0x00020000) /* When set indicates a restore of the PLL and DDR is to be performed otherwise a save is required */ |
| #define | BITM_ROM_SYSCTRL_WUA_CGU (0x00040000) /* Only applicable for a PLL and DDR save operation to the DPM, saves the current settings if cleared or the contents of the structure if set */ |
| #define | BITM_ROM_SYSCTRL_WUA_DDR (0x00080000) /* Only applicable for a PLL and DDR save operation to the DPM, saves the current settings if cleared or the contents of the structure if set */ |
| #define | BITM_ROM_SYSCTRL_WUA_DDRDLLEN (0x00100000) /* Enables saving/restoring of the DDR DLLCTL register */ |
| #define | BITM_ROM_SYSCTRL_WUA_OVERRIDE (0x01000000) |
| #define | BITM_ROM_SYSCTRL_CGU_LOCKINGEN (0x10000000) /* Unlocks the CGU_CTL register */ |
| #define | FUNC_ROM_SYSCONTROL 0xC8000080 |
| #define | IRQ_SID(irq) ((irq) - IVG15) |
Functions | |
| __attribute__ ((l1_data)) | |
| __attribute__ ((l1_text)) | |
| asmlinkage void | enter_deepsleep (void) |
| void | bfin_hibernate (unsigned long mask, unsigned long pol_mask) |
| void | bf609_cpu_pm_enter (suspend_state_t state) |
| int | bf609_cpu_pm_prepare (void) |
| void | bf609_cpu_pm_finish (void) |
| late_initcall (bf609_init_pm) | |
Variables | |
| struct bfin_pm_data | bf609_pm_data |
| struct STRUCT_ROM_SYSCTRL | configvalues |
| uint32_t | dactionflags |
| #define BITM_ROM_SYSCTRL_CGU_AUTODIS (0x00000800) /* Disables auto handling of UPDT and ALGN fields */ |
| #define BITM_ROM_SYSCTRL_CGU_CLKOUTSEL (0x00000080) /* Access CGU_CLKOUTSEL register */ |
| #define BITM_ROM_SYSCTRL_CGU_CTL (0x00000010) /* Access CGU_CTL register */ |
| #define BITM_ROM_SYSCTRL_CGU_DIV (0x00000040) /* Access CGU_DIV register */ |
| #define BITM_ROM_SYSCTRL_CGU_LOCKINGEN (0x10000000) /* Unlocks the CGU_CTL register */ |
| #define BITM_ROM_SYSCTRL_CGU_READ (0x00000001) /* Read CGU registers */ |
| #define BITM_ROM_SYSCTRL_CGU_RTNSTAT (0x00000004) /* Update structure STAT field upon error or after a write operation */ |
| #define BITM_ROM_SYSCTRL_CGU_STAT (0x00000020) /* Access CGU_STAT register */ |
| #define BITM_ROM_SYSCTRL_CGU_WRITE (0x00000002) /* Write registers */ |
| #define BITM_ROM_SYSCTRL_DDR_READ (0x00001000) /* Reads the contents of the DDR registers and stores them into the structure */ |
| #define BITM_ROM_SYSCTRL_DDR_WRITE (0x00002000) /* Writes the DDR registers from the structure, only really intented for wakeup functionality and not for full DDR configuration */ |
| #define BITM_ROM_SYSCTRL_WUA_CGU (0x00040000) /* Only applicable for a PLL and DDR save operation to the DPM, saves the current settings if cleared or the contents of the structure if set */ |
| #define BITM_ROM_SYSCTRL_WUA_DDR (0x00080000) /* Only applicable for a PLL and DDR save operation to the DPM, saves the current settings if cleared or the contents of the structure if set */ |
| #define BITM_ROM_SYSCTRL_WUA_DDRDLLEN (0x00100000) /* Enables saving/restoring of the DDR DLLCTL register */ |
| #define BITM_ROM_SYSCTRL_WUA_DPMWRITE (0x00020000) /* When set indicates a restore of the PLL and DDR is to be performed otherwise a save is required */ |
| #define BITM_ROM_SYSCTRL_WUA_EN (0x00010000) /* Wakeup entry or exit opertation enable */ |
| #define BITP_ROM_SYSCTRL_CGU_CLKOUTSEL 7 /* access CGU_CLKOUTSEL register */ |
| #define BITP_ROM_SYSCTRL_CGU_CTL 4 /* access CGU_CTL register */ |
| #define BITP_ROM_SYSCTRL_CGU_DIV 6 /* access CGU_DIV register */ |
| #define BITP_ROM_SYSCTRL_CGU_LOCKINGEN 28 /* unlocks CGU_CTL register */ |
| #define BITP_ROM_SYSCTRL_CGU_STAT 5 /* access CGU_STAT register */ |
| __attribute__ | ( | (l1_data) | ) |
| __attribute__ | ( | (l1_text) | ) |
| void bf609_cpu_pm_enter | ( | suspend_state_t | state | ) |
| asmlinkage void enter_deepsleep | ( | void | ) |
| late_initcall | ( | bf609_init_pm | ) |
| struct bfin_pm_data bf609_pm_data |
| struct STRUCT_ROM_SYSCTRL configvalues |
1.8.2