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Linux Kernel
3.7.1
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#include <linux/module.h>#include <linux/init.h>#include <linux/kernel.h>#include <linux/debugfs.h>#include <linux/dmaengine.h>#include <linux/seq_file.h>#include <linux/interrupt.h>#include <linux/delay.h>#include <linux/dma-mapping.h>#include <linux/platform_device.h>#include <linux/timer.h>#include <linux/clk.h>#include <linux/of.h>#include <linux/of_gpio.h>#include <linux/of_device.h>#include <linux/omap-dma.h>#include <linux/mmc/host.h>#include <linux/mmc/core.h>#include <linux/mmc/mmc.h>#include <linux/io.h>#include <linux/gpio.h>#include <linux/regulator/consumer.h>#include <linux/pm_runtime.h>#include <mach/hardware.h>#include <plat/mmc.h>#include <plat/cpu.h>Go to the source code of this file.
Data Structures | |
| struct | omap_hsmmc_next |
| struct | omap_hsmmc_host |
Macros | |
| #define | OMAP_HSMMC_SYSSTATUS 0x0014 |
| #define | OMAP_HSMMC_CON 0x002C |
| #define | OMAP_HSMMC_BLK 0x0104 |
| #define | OMAP_HSMMC_ARG 0x0108 |
| #define | OMAP_HSMMC_CMD 0x010C |
| #define | OMAP_HSMMC_RSP10 0x0110 |
| #define | OMAP_HSMMC_RSP32 0x0114 |
| #define | OMAP_HSMMC_RSP54 0x0118 |
| #define | OMAP_HSMMC_RSP76 0x011C |
| #define | OMAP_HSMMC_DATA 0x0120 |
| #define | OMAP_HSMMC_HCTL 0x0128 |
| #define | OMAP_HSMMC_SYSCTL 0x012C |
| #define | OMAP_HSMMC_STAT 0x0130 |
| #define | OMAP_HSMMC_IE 0x0134 |
| #define | OMAP_HSMMC_ISE 0x0138 |
| #define | OMAP_HSMMC_CAPA 0x0140 |
| #define | VS18 (1 << 26) |
| #define | VS30 (1 << 25) |
| #define | SDVS18 (0x5 << 9) |
| #define | SDVS30 (0x6 << 9) |
| #define | SDVS33 (0x7 << 9) |
| #define | SDVS_MASK 0x00000E00 |
| #define | SDVSCLR 0xFFFFF1FF |
| #define | SDVSDET 0x00000400 |
| #define | AUTOIDLE 0x1 |
| #define | SDBP (1 << 8) |
| #define | DTO 0xe |
| #define | ICE 0x1 |
| #define | ICS 0x2 |
| #define | CEN (1 << 2) |
| #define | CLKD_MASK 0x0000FFC0 |
| #define | CLKD_SHIFT 6 |
| #define | DTO_MASK 0x000F0000 |
| #define | DTO_SHIFT 16 |
| #define | INT_EN_MASK 0x307F0033 |
| #define | BWR_ENABLE (1 << 4) |
| #define | BRR_ENABLE (1 << 5) |
| #define | DTO_ENABLE (1 << 20) |
| #define | INIT_STREAM (1 << 1) |
| #define | DP_SELECT (1 << 21) |
| #define | DDIR (1 << 4) |
| #define | DMA_EN 0x1 |
| #define | MSBS (1 << 5) |
| #define | BCE (1 << 1) |
| #define | FOUR_BIT (1 << 1) |
| #define | DDR (1 << 19) |
| #define | DW8 (1 << 5) |
| #define | CC 0x1 |
| #define | TC 0x02 |
| #define | OD 0x1 |
| #define | ERR (1 << 15) |
| #define | CMD_TIMEOUT (1 << 16) |
| #define | DATA_TIMEOUT (1 << 20) |
| #define | CMD_CRC (1 << 17) |
| #define | DATA_CRC (1 << 21) |
| #define | CARD_ERR (1 << 28) |
| #define | STAT_CLEAR 0xFFFFFFFF |
| #define | INIT_STREAM_CMD 0x00000000 |
| #define | DUAL_VOLT_OCR_BIT 7 |
| #define | SRC (1 << 25) |
| #define | SRD (1 << 26) |
| #define | SOFTRESET (1 << 1) |
| #define | RESETDONE (1 << 0) |
| #define | MMC_AUTOSUSPEND_DELAY 100 |
| #define | MMC_TIMEOUT_MS 20 |
| #define | OMAP_MMC_MIN_CLOCK 400000 |
| #define | OMAP_MMC_MAX_CLOCK 52000000 |
| #define | DRIVER_NAME "omap_hsmmc" |
| #define | mmc_slot(host) (host->pdata->slots[host->slot_id]) |
| #define | OMAP_HSMMC_READ(base, reg) __raw_readl((base) + OMAP_HSMMC_##reg) |
| #define | OMAP_HSMMC_WRITE(base, reg, val) __raw_writel((val), (base) + OMAP_HSMMC_##reg) |
| #define | omap_hsmmc_suspend_cdirq NULL |
| #define | omap_hsmmc_resume_cdirq NULL |
| #define | omap_hsmmc_suspend NULL |
| #define | omap_hsmmc_resume NULL |
Functions | |
| module_platform_driver (omap_hsmmc_driver) | |
| MODULE_DESCRIPTION ("OMAP High Speed Multimedia Card driver") | |
| MODULE_LICENSE ("GPL") | |
| MODULE_ALIAS ("platform:"DRIVER_NAME) | |
| MODULE_AUTHOR ("Texas Instruments Inc") | |
| #define AUTOIDLE 0x1 |
Definition at line 71 of file omap_hsmmc.c.
| #define BCE (1 << 1) |
Definition at line 90 of file omap_hsmmc.c.
| #define BRR_ENABLE (1 << 5) |
Definition at line 83 of file omap_hsmmc.c.
| #define BWR_ENABLE (1 << 4) |
Definition at line 82 of file omap_hsmmc.c.
| #define CARD_ERR (1 << 28) |
Definition at line 102 of file omap_hsmmc.c.
| #define CC 0x1 |
Definition at line 94 of file omap_hsmmc.c.
| #define CEN (1 << 2) |
Definition at line 76 of file omap_hsmmc.c.
| #define CLKD_MASK 0x0000FFC0 |
Definition at line 77 of file omap_hsmmc.c.
| #define CLKD_SHIFT 6 |
Definition at line 78 of file omap_hsmmc.c.
| #define CMD_CRC (1 << 17) |
Definition at line 100 of file omap_hsmmc.c.
| #define CMD_TIMEOUT (1 << 16) |
Definition at line 98 of file omap_hsmmc.c.
| #define DATA_CRC (1 << 21) |
Definition at line 101 of file omap_hsmmc.c.
| #define DATA_TIMEOUT (1 << 20) |
Definition at line 99 of file omap_hsmmc.c.
| #define DDIR (1 << 4) |
Definition at line 87 of file omap_hsmmc.c.
| #define DDR (1 << 19) |
Definition at line 92 of file omap_hsmmc.c.
| #define DMA_EN 0x1 |
Definition at line 88 of file omap_hsmmc.c.
| #define DP_SELECT (1 << 21) |
Definition at line 86 of file omap_hsmmc.c.
| #define DRIVER_NAME "omap_hsmmc" |
Definition at line 115 of file omap_hsmmc.c.
| #define DTO 0xe |
Definition at line 73 of file omap_hsmmc.c.
| #define DTO_ENABLE (1 << 20) |
Definition at line 84 of file omap_hsmmc.c.
| #define DTO_MASK 0x000F0000 |
Definition at line 79 of file omap_hsmmc.c.
| #define DTO_SHIFT 16 |
Definition at line 80 of file omap_hsmmc.c.
| #define DUAL_VOLT_OCR_BIT 7 |
Definition at line 105 of file omap_hsmmc.c.
| #define DW8 (1 << 5) |
Definition at line 93 of file omap_hsmmc.c.
| #define ERR (1 << 15) |
Definition at line 97 of file omap_hsmmc.c.
| #define FOUR_BIT (1 << 1) |
Definition at line 91 of file omap_hsmmc.c.
| #define ICE 0x1 |
Definition at line 74 of file omap_hsmmc.c.
| #define ICS 0x2 |
Definition at line 75 of file omap_hsmmc.c.
| #define INIT_STREAM (1 << 1) |
Definition at line 85 of file omap_hsmmc.c.
| #define INIT_STREAM_CMD 0x00000000 |
Definition at line 104 of file omap_hsmmc.c.
| #define INT_EN_MASK 0x307F0033 |
Definition at line 81 of file omap_hsmmc.c.
| #define MMC_AUTOSUSPEND_DELAY 100 |
Definition at line 111 of file omap_hsmmc.c.
Definition at line 122 of file omap_hsmmc.c.
| #define MMC_TIMEOUT_MS 20 |
Definition at line 112 of file omap_hsmmc.c.
| #define MSBS (1 << 5) |
Definition at line 89 of file omap_hsmmc.c.
| #define OD 0x1 |
Definition at line 96 of file omap_hsmmc.c.
| #define OMAP_HSMMC_ARG 0x0108 |
Definition at line 49 of file omap_hsmmc.c.
| #define OMAP_HSMMC_BLK 0x0104 |
Definition at line 48 of file omap_hsmmc.c.
| #define OMAP_HSMMC_CAPA 0x0140 |
Definition at line 61 of file omap_hsmmc.c.
| #define OMAP_HSMMC_CMD 0x010C |
Definition at line 50 of file omap_hsmmc.c.
| #define OMAP_HSMMC_CON 0x002C |
Definition at line 47 of file omap_hsmmc.c.
| #define OMAP_HSMMC_DATA 0x0120 |
Definition at line 55 of file omap_hsmmc.c.
| #define OMAP_HSMMC_HCTL 0x0128 |
Definition at line 56 of file omap_hsmmc.c.
| #define OMAP_HSMMC_IE 0x0134 |
Definition at line 59 of file omap_hsmmc.c.
| #define OMAP_HSMMC_ISE 0x0138 |
Definition at line 60 of file omap_hsmmc.c.
| #define OMAP_HSMMC_READ | ( | base, | |
| reg | |||
| ) | __raw_readl((base) + OMAP_HSMMC_##reg) |
Definition at line 127 of file omap_hsmmc.c.
| #define omap_hsmmc_resume NULL |
Definition at line 2118 of file omap_hsmmc.c.
| #define omap_hsmmc_resume_cdirq NULL |
Definition at line 229 of file omap_hsmmc.c.
| #define OMAP_HSMMC_RSP10 0x0110 |
Definition at line 51 of file omap_hsmmc.c.
| #define OMAP_HSMMC_RSP32 0x0114 |
Definition at line 52 of file omap_hsmmc.c.
| #define OMAP_HSMMC_RSP54 0x0118 |
Definition at line 53 of file omap_hsmmc.c.
| #define OMAP_HSMMC_RSP76 0x011C |
Definition at line 54 of file omap_hsmmc.c.
| #define OMAP_HSMMC_STAT 0x0130 |
Definition at line 58 of file omap_hsmmc.c.
| #define omap_hsmmc_suspend NULL |
Definition at line 2117 of file omap_hsmmc.c.
| #define omap_hsmmc_suspend_cdirq NULL |
Definition at line 228 of file omap_hsmmc.c.
| #define OMAP_HSMMC_SYSCTL 0x012C |
Definition at line 57 of file omap_hsmmc.c.
| #define OMAP_HSMMC_SYSSTATUS 0x0014 |
Definition at line 46 of file omap_hsmmc.c.
Definition at line 130 of file omap_hsmmc.c.
| #define OMAP_MMC_MAX_CLOCK 52000000 |
Definition at line 114 of file omap_hsmmc.c.
| #define OMAP_MMC_MIN_CLOCK 400000 |
Definition at line 113 of file omap_hsmmc.c.
| #define RESETDONE (1 << 0) |
Definition at line 109 of file omap_hsmmc.c.
| #define SDBP (1 << 8) |
Definition at line 72 of file omap_hsmmc.c.
| #define SDVS18 (0x5 << 9) |
Definition at line 65 of file omap_hsmmc.c.
| #define SDVS30 (0x6 << 9) |
Definition at line 66 of file omap_hsmmc.c.
| #define SDVS33 (0x7 << 9) |
Definition at line 67 of file omap_hsmmc.c.
| #define SDVS_MASK 0x00000E00 |
Definition at line 68 of file omap_hsmmc.c.
| #define SDVSCLR 0xFFFFF1FF |
Definition at line 69 of file omap_hsmmc.c.
| #define SDVSDET 0x00000400 |
Definition at line 70 of file omap_hsmmc.c.
| #define SOFTRESET (1 << 1) |
Definition at line 108 of file omap_hsmmc.c.
| #define SRC (1 << 25) |
Definition at line 106 of file omap_hsmmc.c.
| #define SRD (1 << 26) |
Definition at line 107 of file omap_hsmmc.c.
| #define STAT_CLEAR 0xFFFFFFFF |
Definition at line 103 of file omap_hsmmc.c.
| #define TC 0x02 |
Definition at line 95 of file omap_hsmmc.c.
| #define VS18 (1 << 26) |
Definition at line 63 of file omap_hsmmc.c.
| #define VS30 (1 << 25) |
Definition at line 64 of file omap_hsmmc.c.
| MODULE_ALIAS | ( | "platform:" | DRIVER_NAME | ) |
| MODULE_AUTHOR | ( | "Texas Instruments Inc" | ) |
| MODULE_DESCRIPTION | ( | "OMAP High Speed Multimedia Card driver" | ) |
| MODULE_LICENSE | ( | "GPL" | ) |
| module_platform_driver | ( | omap_hsmmc_driver | ) |
1.8.2