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arch
m32r
include
asm
tlbflush.h
Go to the documentation of this file.
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#ifndef _ASM_M32R_TLBFLUSH_H
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#define _ASM_M32R_TLBFLUSH_H
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#include <
asm/m32r.h
>
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/*
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* TLB flushing:
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*
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* - flush_tlb() flushes the current mm struct TLBs
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* - flush_tlb_all() flushes all processes TLBs
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* - flush_tlb_mm(mm) flushes the specified mm context TLB's
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* - flush_tlb_page(vma, vmaddr) flushes one page
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* - flush_tlb_range(vma, start, end) flushes a range of pages
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* - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
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*/
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extern
void
local_flush_tlb_all
(
void
);
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extern
void
local_flush_tlb_mm
(
struct
mm_struct
*);
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extern
void
local_flush_tlb_page
(
struct
vm_area_struct
*,
unsigned
long
);
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extern
void
local_flush_tlb_range
(
struct
vm_area_struct
*,
unsigned
long
,
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unsigned
long
);
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#ifndef CONFIG_SMP
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#ifdef CONFIG_MMU
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#define flush_tlb_all() local_flush_tlb_all()
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#define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
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#define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page)
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#define flush_tlb_range(vma, start, end) \
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local_flush_tlb_range(vma, start, end)
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#define flush_tlb_kernel_range(start, end) local_flush_tlb_all()
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#else
/* CONFIG_MMU */
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#define flush_tlb_all() do { } while (0)
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#define flush_tlb_mm(mm) do { } while (0)
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#define flush_tlb_page(vma, vmaddr) do { } while (0)
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#define flush_tlb_range(vma, start, end) do { } while (0)
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#endif
/* CONFIG_MMU */
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#else
/* CONFIG_SMP */
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extern
void
smp_flush_tlb_all
(
void
);
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extern
void
smp_flush_tlb_mm
(
struct
mm_struct
*);
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extern
void
smp_flush_tlb_page
(
struct
vm_area_struct
*,
unsigned
long
);
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extern
void
smp_flush_tlb_range
(
struct
vm_area_struct
*,
unsigned
long
,
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unsigned
long
);
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#define flush_tlb_all() smp_flush_tlb_all()
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#define flush_tlb_mm(mm) smp_flush_tlb_mm(mm)
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#define flush_tlb_page(vma, page) smp_flush_tlb_page(vma, page)
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#define flush_tlb_range(vma, start, end) \
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smp_flush_tlb_range(vma, start, end)
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#define flush_tlb_kernel_range(start, end) smp_flush_tlb_all()
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#endif
/* CONFIG_SMP */
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static
__inline__
void
__flush_tlb_page
(
unsigned
long
page
)
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{
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unsigned
int
tmpreg0, tmpreg1, tmpreg2;
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__asm__
__volatile__ (
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"seth %0, #high(%4) \n\t"
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"st %3, @(%5, %0) \n\t"
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"ldi %1, #1 \n\t"
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"st %1, @(%6, %0) \n\t"
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"add3 %1, %0, %7 \n\t"
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".fillinsn \n"
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"1: \n\t"
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"ld %2, @(%6, %0) \n\t"
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"bnez %2, 1b \n\t"
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"ld %0, @%1+ \n\t"
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"ld %1, @%1 \n\t"
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"st %2, @+%0 \n\t"
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"st %2, @+%1 \n\t"
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:
"=&r"
(tmpreg0),
"=&r"
(tmpreg1),
"=&r"
(tmpreg2)
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:
"r"
(page),
"i"
(
MMU_REG_BASE
),
"i"
(
MSVA_offset
),
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"i"
(
MTOP_offset
),
"i"
(
MIDXI_offset
)
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:
"memory"
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);
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}
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static
__inline__
void
__flush_tlb_all
(
void
)
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{
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unsigned
int
tmpreg0, tmpreg1;
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__asm__
__volatile__ (
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"seth %0, #high(%2) \n\t"
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"or3 %0, %0, #low(%2) \n\t"
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"ldi %1, #0xc \n\t"
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"st %1, @%0 \n\t"
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".fillinsn \n"
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"1: \n\t"
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"ld %1, @%0 \n\t"
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"bnez %1, 1b \n\t"
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:
"=&r"
(tmpreg0),
"=&r"
(tmpreg1)
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:
"i"
(
MTOP
) :
"memory"
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);
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}
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extern
void
update_mmu_cache
(
struct
vm_area_struct
*,
unsigned
long
,
pte_t
*);
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#endif
/* _ASM_M32R_TLBFLUSH_H */
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